From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id 8B868740037 for ; Thu, 3 Aug 2023 11:04:34 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=pmaLCn7f8O64s6r/5eo5yt+RCUQSvzC7qy8WNKsYGg0=; c=relaxed/simple; d=groups.io; h=From:To:Cc:References:In-Reply-To:Subject:Date:Message-ID:MIME-Version:Thread-Index:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Type:Content-Transfer-Encoding:Content-Language; s=20140610; t=1691060673; v=1; b=Cu+a5rqU/Qi3BrbhQhc0dvenCqpoB1cZ0TMeS/NwqNqZQ4+ifjpBH/uqlfQyDZi8+8/Xisqj dJ/BKuIJ0/i2M6qWojweJlOZz083lblWkbZxBzB9Fm8lcMJTglKyDpHJ/xW44pe9beTOJydnx3x VWgVc26/4BK8QEeM+cfuu2mA= X-Received: by 127.0.0.2 with SMTP id fynLYY7687511xNIMGkqDrNX; Thu, 03 Aug 2023 04:04:33 -0700 X-Received: from cxsh.intel-email.com (cxsh.intel-email.com [121.46.250.151]) by mx.groups.io with SMTP id smtpd.web11.11998.1691060669879589664 for ; Thu, 03 Aug 2023 04:04:31 -0700 X-Received: from cxsh.intel-email.com (localhost [127.0.0.1]) by cxsh.intel-email.com (Postfix) with ESMTP id D862EDDA789 for ; Thu, 3 Aug 2023 19:04:27 +0800 (CST) X-Received: from localhost (localhost [127.0.0.1]) by cxsh.intel-email.com (Postfix) with ESMTP id D3D13DDA7C6 for ; Thu, 3 Aug 2023 19:04:27 +0800 (CST) X-Received: from mail.byosoft.com.cn (mail.byosoft.com.cn [58.240.74.242]) by cxsh.intel-email.com (Postfix) with SMTP id E451EDDA7BC for ; Thu, 3 Aug 2023 19:04:24 +0800 (CST) X-Received: from DESKTOPS6D0PVI ([58.246.60.130]) (envelope-sender ) by 192.168.6.13 with ESMTP for ; Thu, 03 Aug 2023 19:04:19 +0800 X-WM-Sender: gaoliming@byosoft.com.cn X-Originating-IP: 58.246.60.130 X-WM-AuthFlag: YES X-WM-AuthUser: gaoliming@byosoft.com.cn From: "gaoliming via groups.io" To: , Cc: "'Michael D Kinney'" , "'Zhiguang Liu'" , "'Attar, AbdulLateef \(Abdul Lateef\)'" References: <20230801075725.1102-1-abner.chang@amd.com> <20230801075725.1102-2-abner.chang@amd.com> <004d01d9c503$fb23c720$f16b5560$@byosoft.com.cn> In-Reply-To: Subject: =?UTF-8?B?5Zue5aSNOiBbZWRrMi1kZXZlbF0gW1BBVENIIFYyIDEvNl0gTWRlUGtnL0luY2x1ZGU6IFVwZGF0ZSBkZWZpbml0aW9ucyBvZiBTUEkgcmVsYXRlZCBoZWFkZXIgZmlsZXM=?= Date: Thu, 3 Aug 2023 19:04:19 +0800 Message-ID: <000001d9c5fa$40b2dd20$c2189760$@byosoft.com.cn> MIME-Version: 1.0 Thread-Index: AQFXJdGtB9zHTJeIZpHVSnPOBChEGgE/Y14aAhxCwYMB3S2C3bCz4g3A Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,gaoliming@byosoft.com.cn List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: 1BpMY3ZNk3cZlfKYKP87oYRIx7686176AA= Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Content-Language: zh-cn X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=Cu+a5rqU; dmarc=none; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io Abner: The rule bases on the public spec. So, we need to wait for the spec.=20 Thanks Liming > -----=E9=82=AE=E4=BB=B6=E5=8E=9F=E4=BB=B6----- > =E5=8F=91=E4=BB=B6=E4=BA=BA: devel@edk2.groups.io = =E4=BB=A3=E8=A1=A8 Chang, Abner > via groups.io > =E5=8F=91=E9=80=81=E6=97=B6=E9=97=B4: 2023=E5=B9=B48=E6=9C=882=E6=97=A5 1= 5:49 > =E6=94=B6=E4=BB=B6=E4=BA=BA: gaoliming ; devel@= edk2.groups.io > =E6=8A=84=E9=80=81: 'Michael D Kinney' ; 'Zhi= guang Liu' > ; Attar, AbdulLateef (Abdul Lateef) > > =E4=B8=BB=E9=A2=98: Re: [edk2-devel] [PATCH V2 1/6] MdePkg/Include: Updat= e definitions of > SPI related header files >=20 > [AMD Official Use Only - General] >=20 > Hi Liming, > I think as the ECR already approved as the errata by PIWG, can we just > merged the code to save sometime? >=20 > Thanks > Abner >=20 > > -----Original Message----- > > From: gaoliming > > Sent: Wednesday, August 2, 2023 1:41 PM > > To: Chang, Abner ; devel@edk2.groups.io > > Cc: 'Michael D Kinney' ; 'Zhiguang Liu' > > ; Attar, AbdulLateef (Abdul Lateef) > > > > Subject: =E5=9B=9E=E5=A4=8D: [PATCH V2 1/6] MdePkg/Include: Update defi= nitions of SPI > related > > header files > > > > Caution: This message originated from an External Source. Use proper > caution > > when opening attachments, clicking links, or responding. > > > > > > Abner: > > PI 1.8 Errata has not been published. This change may be deferred unt= il > > new spec is public. > > > > Thanks > > Liming > > > -----=E9=82=AE=E4=BB=B6=E5=8E=9F=E4=BB=B6----- > > > =E5=8F=91=E4=BB=B6=E4=BA=BA: abner.chang@amd.com > > > =E5=8F=91=E9=80=81=E6=97=B6=E9=97=B4: 2023=E5=B9=B48=E6=9C=881=E6=97= =A5 15:57 > > > =E6=94=B6=E4=BB=B6=E4=BA=BA: devel@edk2.groups.io > > > =E6=8A=84=E9=80=81: Michael D Kinney ; Li= ming Gao > > > ; Zhiguang Liu ; > Abdul > > > Lateef Attar > > > =E4=B8=BB=E9=A2=98: [PATCH V2 1/6] MdePkg/Include: Update definitions= of SPI related > > > header files > > > > > > From: Abner Chang > > > > > > BZ#: 4471 > > > Update definitions according to PI spec v1.8 Errata as it > > > is approved in PIWG (Ticket #2394). > > > > > > Signed-off-by: Abner Chang > > > Cc: Michael D Kinney > > > Cc: Liming Gao > > > Cc: Zhiguang Liu > > > Cc: Abdul Lateef Attar > > > --- > > > MdePkg/Include/Protocol/SpiConfiguration.h | 8 ++++++++ > > > MdePkg/Include/Protocol/SpiHc.h | 14 ++++++++++++++ > > > MdePkg/Include/Protocol/SpiIo.h | 10 ++++++++++ > > > 3 files changed, 32 insertions(+) > > > > > > diff --git a/MdePkg/Include/Protocol/SpiConfiguration.h > > > b/MdePkg/Include/Protocol/SpiConfiguration.h > > > index 3f8fb9ff62c..cffdc8e232d 100644 > > > --- a/MdePkg/Include/Protocol/SpiConfiguration.h > > > +++ b/MdePkg/Include/Protocol/SpiConfiguration.h > > > @@ -2,6 +2,7 @@ > > > This file defines the SPI Configuration Protocol. > > > > > > Copyright (c) 2017, Intel Corporation. All rights reserved.
> > > + Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserve= d. > > > SPDX-License-Identifier: BSD-2-Clause-Patent > > > > > > @par Revision Reference: > > > @@ -168,6 +169,13 @@ typedef struct _EFI_SPI_BUS { > > > VOID *ClockParameter; > > > } EFI_SPI_BUS; > > > > > > +/// > > > +/// Definitions of SPI Part Attributes. > > > +/// > > > +#define SPI_PART_SUPPORTS_2_BIT_DATA_BUS_WIDTH BIT0 > > > +#define SPl_PART_SUPPORTS_4_B1T_DATA_BUS_WIDTH BIT1 > > > +#define SPl_PART_SUPPORTS_8_B1T_DATA_BUS_WIDTH BIT2 > > > + > > > /// > > > /// The EFI_SPI_PERIPHERAL data structure describes how a specific > block > > of > > > /// logic which is connected to the SPI bus. This data structure als= o > > selects > > > diff --git a/MdePkg/Include/Protocol/SpiHc.h > > > b/MdePkg/Include/Protocol/SpiHc.h > > > index 30128dd5c4d..645bfdefe9b 100644 > > > --- a/MdePkg/Include/Protocol/SpiHc.h > > > +++ b/MdePkg/Include/Protocol/SpiHc.h > > > @@ -2,6 +2,7 @@ > > > This file defines the SPI Host Controller Protocol. > > > > > > Copyright (c) 2017, Intel Corporation. All rights reserved.
> > > + Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserve= d. > > > SPDX-License-Identifier: BSD-2-Clause-Patent > > > > > > @par Revision Reference: > > > @@ -121,6 +122,19 @@ typedef EFI_STATUS > > > IN EFI_SPI_BUS_TRANSACTION *BusTransaction > > > ); > > > > > > +/// > > > +/// Definitions of SPI Host Controller Attributes. > > > +/// > > > +#define HC_SUPPORTS_WRITE_ONLY_OPERATIONS BIT0 > > > +#define HC_SUPPORTS_READ_ONLY_OPERATIONS BIT1 > > > +#define HC_SUPPORTS_WRITE_THEN_READ_OPERATIONS BIT2 > > > +#define HC_TX_FRAME_IN_MOST_SIGNIFICANT_BITS BIT3 > > > +#define HC_RX_FRAME_IN_MOST_SIGNIFICANT_BITS BIT4 > > > +#define HC_SUPPORTS_2_BIT_DATA_BUS_WIDTH BIT5 > > > +#define HC_SUPPORTS_4_BIT_DATA_BUS_WIDTH BIT6 > > > +#define HC_SUPPORTS_8_BIT_DATA_BUS_WIDTH BIT7 > > > +#define HC_TRANSFER_SIZE_INCLUDES_OPCODE BIT8 > > > +#define HC_TRANSFER_SIZE_INCLUDES_ADDRESS BIT9 > > > /// > > > /// Support a SPI data transaction between the SPI controller and a = SPI > > chip. > > > /// > > > diff --git a/MdePkg/Include/Protocol/SpiIo.h > > > b/MdePkg/Include/Protocol/SpiIo.h > > > index b4fc5e03b88..0ea881fd115 100644 > > > --- a/MdePkg/Include/Protocol/SpiIo.h > > > +++ b/MdePkg/Include/Protocol/SpiIo.h > > > @@ -2,6 +2,7 @@ > > > This file defines the SPI I/O Protocol. > > > > > > Copyright (c) 2017, Intel Corporation. All rights reserved.
> > > + Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserve= d. > > > SPDX-License-Identifier: BSD-2-Clause-Patent > > > > > > @par Revision Reference: > > > @@ -223,6 +224,15 @@ typedef struct _EFI_SPI_BUS_TRANSACTION { > > > UINT8 *ReadBuffer; > > > } EFI_SPI_BUS_TRANSACTION; > > > > > > +/// > > > +/// Definitions of SPI I/O Attributes. > > > +/// > > > +#define SPI_IO_SUPPORTS_2_BIT_DATA_BUS_WIDTH BIT0 > > > +#define SPI_IO_SUPPORTS_4_BIT_DATA_BUS_WIDTH BIT1 > > > +#define SPI_IO_SUPPORTS_8_BIT_DATA_BUS_WIDTH BIT2 > > > +#define SPI_IO_TRANSFER_SIZE_INCLUDES_OPCODE BIT3 > > > +#define SPI_IO_TRANSFER_SIZE_INCLUDES_ADDRESS BIT4 > > > + > > > /// > > > /// Support managed SPI data transactions between the SPI controller > and > > a > > > SPI > > > /// chip. > > > -- > > > 2.37.1.windows.1 > > > > >=20 >=20 >=20 >=20 >=20 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#107531): https://edk2.groups.io/g/devel/message/107531 Mute This Topic: https://groups.io/mt/100523524/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-