回复: [PATCH v1 1/1] Add MemoryFence implementation for RiscV64

["gaoliming" <gaoliming@byosoft.com.cn>]

Acked-by: Liming Gao <gaoliming@byosoft.com.cn>

> -----邮件原件-----
> 发件人: Chang, Abner (HPS SW/FW Technologist) <abner.chang@hpe.com>
> 发送时间: 2021年7月14日 22:12
> 收件人: Schaefer, Daniel <daniel.schaefer@hpe.com>; devel@edk2.groups.io
> 抄送: Michael D Kinney <michael.d.kinney@intel.com>; Liming Gao
> <gaoliming@byosoft.com.cn>; Zhiguang Liu <zhiguang.liu@intel.com>; Leif
> Lindholm <leif@nuviainc.com>
> 主题: RE: [PATCH v1 1/1] Add MemoryFence implementation for RiscV64
> 
> Reviewed-by: Abner Chang <abner.chang@hpe.com>
> 
> > -----Original Message-----
> > From: Schaefer, Daniel
> > Sent: Sunday, May 16, 2021 2:13 AM
> > To: devel@edk2.groups.io
> > Cc: Chang, Abner (HPS SW/FW Technologist) <abner.chang@hpe.com>;
> > Michael D Kinney <michael.d.kinney@intel.com>; Liming Gao
> > <gaoliming@byosoft.com.cn>; Zhiguang Liu <zhiguang.liu@intel.com>; Leif
> > Lindholm <leif@nuviainc.com>
> > Subject: [PATCH v1 1/1] Add MemoryFence implementation for RiscV64
> >
> > Cc: Abner Chang <abner.chang@hpe.com>
> > Cc: Michael D Kinney <michael.d.kinney@intel.com>
> > Cc: Liming Gao <gaoliming@byosoft.com.cn>
> > Cc: Zhiguang Liu <zhiguang.liu@intel.com>
> > Cc: Leif Lindholm <leif@nuviainc.com>
> > Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com>
> > ---
> >  MdePkg/Library/BaseLib/BaseLib.inf           |  1 +
> >  MdePkg/Library/BaseLib/RiscV64/MemoryFence.S | 33
> > ++++++++++++++++++++
> >  2 files changed, 34 insertions(+)
> >
> > diff --git a/MdePkg/Library/BaseLib/BaseLib.inf
> > b/MdePkg/Library/BaseLib/BaseLib.inf
> > index b76f3af380ea..b7ab5f632366 100644
> > --- a/MdePkg/Library/BaseLib/BaseLib.inf
> > +++ b/MdePkg/Library/BaseLib/BaseLib.inf
> > @@ -399,6 +399,7 @@
> >    RiscV64/DisableInterrupts.c
> >
> >    RiscV64/EnableInterrupts.c
> >
> >    RiscV64/CpuPause.c
> >
> > +  RiscV64/MemoryFence.S             | GCC
> >
> >    RiscV64/RiscVSetJumpLongJump.S    | GCC
> >
> >    RiscV64/RiscVCpuBreakpoint.S      | GCC
> >
> >    RiscV64/RiscVCpuPause.S           | GCC
> >
> > diff --git a/MdePkg/Library/BaseLib/RiscV64/MemoryFence.S
> > b/MdePkg/Library/BaseLib/RiscV64/MemoryFence.S
> > new file mode 100644
> > index 000000000000..283df9356a9a
> > --- /dev/null
> > +++ b/MdePkg/Library/BaseLib/RiscV64/MemoryFence.S
> > @@ -0,0 +1,33 @@
> >
+##-------------------------------------------------------------------------
-----
> >
> > +#
> >
> > +# MemoryFence() for RiscV64
> >
> > +
> >
> > +# Copyright (c) 2021, Hewlett Packard Enterprise Development. All
rights
> > reserved.
> >
> > +#
> >
> > +# SPDX-License-Identifier: BSD-2-Clause-Patent
> >
> > +#
> >
> >
+##-------------------------------------------------------------------------
-----
> >
> > +
> >
> > +.text
> >
> > +.p2align 2
> >
> > +
> >
> > +ASM_GLOBAL ASM_PFX(MemoryFence)
> >
> > +
> >
> > +
> >
> > +#/**
> >
> > +#  Used to serialize load and store operations.
> >
> > +#
> >
> > +#  All loads and stores that proceed calls to this function are
guaranteed
> to
> > be
> >
> > +#  globally visible when this function returns.
> >
> > +#
> >
> > +#**/
> >
> > +#VOID
> >
> > +#EFIAPI
> >
> > +#MemoryFence (
> >
> > +#  VOID
> >
> > +#  );
> >
> > +#
> >
> > +ASM_PFX(MemoryFence):
> >
> > +    // Fence on all memory and I/O
> >
> > +    fence
> >
> > +    ret
> >
> > --
> > 2.30.1