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From: "gaoliming" <gaoliming@byosoft.com.cn>
To: <devel@edk2.groups.io>,
	<rebecca@nuviainc.com>
Cc: "'Leif Lindholm'" <leif@nuviainc.com>,
	"'Ard Biesheuvel'" <ardb+tianocore@kernel.org>
References: <20210210150457.25897-1-rebecca@nuviainc.com>
In-Reply-To: <20210210150457.25897-1-rebecca@nuviainc.com>
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Date: Thu, 18 Feb 2021 11:33:22 +0800
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Rebecca:
  Is this issue detected in open CI environment?=20

Thanks
Liming
> -----=D3=CA=BC=FE=D4=AD=BC=FE-----
> =B7=A2=BC=FE=C8=CB: bounce+27952+71573+4905953+8761045@groups.io
> <bounce+27952+71573+4905953+8761045@groups.io> =B4=FA=B1=ED Rebecca Cran
> =B7=A2=CB=CD=CA=B1=BC=E4: 2021=C4=EA2=D4=C210=C8=D5 23:05
> =CA=D5=BC=FE=C8=CB: devel@edk2.groups.io
> =B3=AD=CB=CD: Rebecca Cran <rebecca@nuviainc.com>; Leif Lindholm
> <leif@nuviainc.com>; Ard Biesheuvel <ardb+tianocore@kernel.org>
> =D6=F7=CC=E2: [edk2-devel] [PATCH 1/1] ArmPkg: Fix ARM ProcessorSubClass=
Dxe build
>=20
> The ARM ProcessorSubClassDxe build was broken due to changes in the
> SmbiosProcessor API and an unused variable.
>=20
> Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
> ---
>  ArmPkg/Universal/Smbios/ProcessorSubClassDxe/SmbiosProcessorArm.c | 6
> ++----
>  1 file changed, 2 insertions(+), 4 deletions(-)
>=20
> diff --git
> a/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/SmbiosProcessorArm.c
> b/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/SmbiosProcessorArm.c
> index 0be4403c765f..c78bd41a7e06 100644
> ---
> a/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/SmbiosProcessorArm.c
> +++
> b/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/SmbiosProcessorArm.c
> @@ -22,7 +22,7 @@
>      @return The cache size.
>  **/
>  UINT64
> -ArmGetCacheSize (
> +SmbiosProcessorGetCacheSize (
>    IN UINT8   CacheLevel,
>    IN BOOLEAN DataCache,
>    IN BOOLEAN UnifiedCache
> @@ -66,14 +66,13 @@ ArmGetCacheSize (
>      @return The cache associativity.
>  **/
>  UINT32
> -ArmGetCacheAssociativity (
> +SmbiosProcessorGetCacheAssociativity (
>    IN UINT8   CacheLevel,
>    IN BOOLEAN DataCache,
>    IN BOOLEAN UnifiedCache
>    )
>  {
>    CCSIDR_DATA  Ccsidr;
> -  CCSIDR2_DATA Ccsidr2;
>    CSSELR_DATA  Csselr;
>    BOOLEAN      CcidxSupported;
>    UINT32       Associativity;
> @@ -88,7 +87,6 @@ ArmGetCacheAssociativity (
>    CcidxSupported =3D ArmHasCcidx ();
>=20
>    if (CcidxSupported) {
> -    Ccsidr2.Data =3D ReadCCSIDR2 (Csselr.Data);
>      Associativity =3D Ccsidr.BitsCcidxAA32.Associativity + 1;
>    } else {
>      Associativity =3D Ccsidr.BitsNonCcidx.Associativity + 1;
> --
> 2.26.2
>=20
>=20
>=20
>=20
>=20