回复: [PATCH 1/1] BaseTools: enable riscv64 native builds

["gaoliming" <gaoliming@byosoft.com.cn>]

Ack-by: Liming Gao <gaoliming@byosoft.com.cn>

I would like Abner to review and test this patch. 

Thanks
Liming
> -----邮件原件-----
> 发件人: Leif Lindholm <leif@nuviainc.com>
> 发送时间: 2020年8月29日 19:15
> 收件人: devel@edk2.groups.io
> 抄送: Bob Feng <bob.c.feng@intel.com>; Liming Gao
> <gaoliming@byosoft.com.cn>; Yuwei Chen <yuwei.chen@intel.com>; Daniel
> Schaefer <daniel.schaefer@hpe.com>; Abner Chang <abner.chang@hpe.com>
> 主题: [PATCH 1/1] BaseTools: enable riscv64 native builds
> 
> Add the makefile plumbing and ProcessorBind.h (based on the
> AArch64 one) to enable building BaseTools natively on RiscV64.
> 
> Cc: Bob Feng <bob.c.feng@intel.com>
> Cc: Liming Gao <gaoliming@byosoft.com.cn>
> Cc: Yuwei Chen <yuwei.chen@intel.com>
> Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
> Cc: Abner Chang <abner.chang@hpe.com>
> Signed-off-by: Leif Lindholm <leif@nuviainc.com>
> ---
>  .../Source/C/Include/RiscV64/ProcessorBind.h  | 102
> ++++++++++++++++++
>  BaseTools/Source/C/GNUmakefile                |   3 +
>  BaseTools/Source/C/Makefiles/header.makefile  |   6 ++
>  3 files changed, 111 insertions(+)
>  create mode 100644 BaseTools/Source/C/Include/RiscV64/ProcessorBind.h
> 
> diff --git a/BaseTools/Source/C/Include/RiscV64/ProcessorBind.h
> b/BaseTools/Source/C/Include/RiscV64/ProcessorBind.h
> new file mode 100644
> index 000000000000..bd4b756e0970
> --- /dev/null
> +++ b/BaseTools/Source/C/Include/RiscV64/ProcessorBind.h
> @@ -0,0 +1,102 @@
> +/** @file
> +  Processor or Compiler specific defines and types for RiscV64.
> +
> +  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
> +  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
> +  Portions copyright (c) 2013, ARM Ltd. All rights reserved.<BR>
> +  Portions copyright (c) 2020, NUVIA inc. All rights reserved.<BR>
> +
> +  SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#ifndef PROCESSOR_BIND_H__
> +#define PROCESSOR_BIND_H__
> +
> +///
> +/// Define the processor type so other code can make processor based
> choices
> +///
> +#define MDE_CPU_RISCV64
> +
> +//
> +// Make sure we are using the correct packing rules per EFI specification
> +//
> +#ifndef __GNUC__
> +#pragma pack()
> +#endif
> +
> +//
> +// Use ANSI C 2000 stdint.h integer width declarations
> +//
> +#include <stdint.h>
> +typedef uint8_t   BOOLEAN;
> +typedef int8_t    INT8;
> +typedef uint8_t   UINT8;
> +typedef int16_t   INT16;
> +typedef uint16_t  UINT16;
> +typedef int32_t   INT32;
> +typedef uint32_t  UINT32;
> +typedef int64_t   INT64;
> +typedef uint64_t  UINT64;
> +typedef char      CHAR8;
> +typedef uint16_t  CHAR16;
> +
> +///
> +/// Unsigned value of native width.  (4 bytes on supported 32-bit
processor
> instructions,
> +/// 8 bytes on supported 64-bit processor instructions)
> +///
> +typedef UINT64  UINTN;
> +
> +///
> +/// Signed value of native width.  (4 bytes on supported 32-bit processor
> instructions,
> +/// 8 bytes on supported 64-bit processor instructions)
> +///
> +typedef INT64   INTN;
> +
> +//
> +// Processor specific defines
> +//
> +
> +///
> +/// A value of native width with the highest bit set.
> +///
> +#define MAX_BIT      0x8000000000000000
> +
> +///
> +/// A value of native width with the two highest bits set.
> +///
> +#define MAX_2_BITS   0xC000000000000000
> +
> +///
> +/// The stack alignment required for RISCV64
> +///
> +#define CPU_STACK_ALIGNMENT  16
> +
> +//
> +// Modifier to ensure that all protocol member functions and EFI
intrinsics
> +// use the correct C calling convention. All protocol member functions
and
> +// EFI intrinsics are required to modify their member functions with
EFIAPI.
> +//
> +#define EFIAPI
> +
> +#if defined(__GNUC__)
> +  ///
> +  /// For GNU assembly code, .global or .globl can declare global
symbols.
> +  /// Define this macro to unify the usage.
> +  ///
> +  #define ASM_GLOBAL .globl
> +#endif
> +
> +/**
> +  Return the pointer to the first instruction of a function given a
function
> pointer.
> +  On ARM CPU architectures, these two pointer values are the same,
> +  so the implementation of this macro is very simple.
> +
> +  @param  FunctionPointer   A pointer to a function.
> +
> +  @return The pointer to the first instruction of a function given a
function
> pointer.
> +
> +**/
> +#define FUNCTION_ENTRY_POINT(FunctionPointer) (VOID
> *)(UINTN)(FunctionPointer)
> +
> +#endif
> diff --git a/BaseTools/Source/C/GNUmakefile
> b/BaseTools/Source/C/GNUmakefile
> index df4eb64ea95e..464f43277455 100644
> --- a/BaseTools/Source/C/GNUmakefile
> +++ b/BaseTools/Source/C/GNUmakefile
> @@ -26,6 +26,9 @@ ifndef HOST_ARCH
>    else ifneq (,$(findstring arm,$(uname_m)))
>      HOST_ARCH=ARM
>    endif
> +  ifneq (,$(findstring riscv64,$(uname_m)))
> +    HOST_ARCH=RISCV64
> +  endif
>    ifndef HOST_ARCH
>      $(info Could not detected HOST_ARCH from uname results)
>      $(error HOST_ARCH is not defined!)
> diff --git a/BaseTools/Source/C/Makefiles/header.makefile
> b/BaseTools/Source/C/Makefiles/header.makefile
> index 1c105ee7d434..0df728f32772 100644
> --- a/BaseTools/Source/C/Makefiles/header.makefile
> +++ b/BaseTools/Source/C/Makefiles/header.makefile
> @@ -28,6 +28,9 @@ ifndef HOST_ARCH
>    else ifneq (,$(findstring arm,$(uname_m)))
>      HOST_ARCH=ARM
>    endif
> +  ifneq (,$(findstring riscv64,$(uname_m)))
> +    HOST_ARCH=RISCV64
> +  endif
>    ifndef HOST_ARCH
>      $(info Could not detected HOST_ARCH from uname results)
>      $(error HOST_ARCH is not defined!)
> @@ -64,6 +67,9 @@ ARCH_INCLUDE = -I $(MAKEROOT)/Include/Arm/
>  else ifeq ($(HOST_ARCH), AARCH64)
>  ARCH_INCLUDE = -I $(MAKEROOT)/Include/AArch64/
> 
> +else ifeq ($(HOST_ARCH), RISCV64)
> +ARCH_INCLUDE = -I $(MAKEROOT)/Include/RiscV64/
> +
>  else
>  $(error Bad HOST_ARCH)
>  endif
> --
> 2.20.1