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From: "gaoliming" <gaoliming@byosoft.com.cn>
To: <devel@edk2.groups.io>, <aik@amd.com>
Cc: "'Ard Biesheuvel'" <ardb+tianocore@kernel.org>,
	"'Jiewen Yao'" <jiewen.yao@intel.com>,
	"'Jordan Justen'" <jordan.l.justen@intel.com>,
	"'Gerd Hoffmann'" <kraxel@redhat.com>,
	"'Brijesh Singh'" <brijesh.singh@amd.com>,
	"'Erdem Aktas'" <erdemaktas@google.com>,
	"'James Bottomley'" <jejb@linux.ibm.com>,
	"'Min Xu'" <min.m.xu@intel.com>,
	"'Tom Lendacky'" <thomas.lendacky@amd.com>
Subject: 回复: [edk2-devel] [PATCH ovmf 1/5] MdePkg/Register/Amd: Define all bits from MSR_SEV_STATUS_REGISTER
Date: Wed, 7 Dec 2022 10:13:36 +0800	[thread overview]
Message-ID: <001101d909e1$84079000$8c16b000$@byosoft.com.cn> (raw)
In-Reply-To: <20221201023521.10028-2-aik@amd.com>

Alexey:


> -----邮件原件-----
> 发件人: devel@edk2.groups.io <devel@edk2.groups.io> 代表 Alexey
> Kardashevskiy via groups.io
> 发送时间: 2022年12月1日 10:35
> 收件人: devel@edk2.groups.io
> 抄送: Ard Biesheuvel <ardb+tianocore@kernel.org>; Jiewen Yao
> <jiewen.yao@intel.com>; Jordan Justen <jordan.l.justen@intel.com>; Gerd
> Hoffmann <kraxel@redhat.com>; Brijesh Singh <brijesh.singh@amd.com>;
> Erdem Aktas <erdemaktas@google.com>; James Bottomley
> <jejb@linux.ibm.com>; Min Xu <min.m.xu@intel.com>; Tom Lendacky
> <thomas.lendacky@amd.com>; Alexey Kardashevskiy <aik@amd.com>
> 主题: [edk2-devel] [PATCH ovmf 1/5] MdePkg/Register/Amd: Define all bits
> from MSR_SEV_STATUS_REGISTER
> 
> We will need soon DebugSwap but others likely too.
> 
> Signed-off-by: Alexey Kardashevskiy <aik@amd.com>
> ---
>  MdePkg/Include/Register/Amd/Fam17Msr.h | 57 +++++++++++++++++++-
>  1 file changed, 56 insertions(+), 1 deletion(-)
> 
> diff --git a/MdePkg/Include/Register/Amd/Fam17Msr.h
> b/MdePkg/Include/Register/Amd/Fam17Msr.h
> index bb4e143e2456..f9474e6776f2 100644
> --- a/MdePkg/Include/Register/Amd/Fam17Msr.h
> +++ b/MdePkg/Include/Register/Amd/Fam17Msr.h
> @@ -121,7 +121,62 @@ typedef union {
>      ///
>      UINT32    SevSnpBit : 1;
> 
> -    UINT32    Reserved2 : 29;
> +    ///
> +    /// [Bit 3] The guest was run with the Virtual TOM feature enabled in
> SEV_FEATURES[1]
> +    ///
> +    UINT32    vTOM_Enabled : 1;
> +
This name doesn't follow name convention. You can create pull request to see
CI test result. 

Thanks
Liming
> +    ///
> +    /// [Bit 4] The guest was run with the ReflectVC feature enabled in
> SEV_FEATURES[2]
> +    ///
> +    UINT32    ReflectVC : 1;
> +
> +    ///
> +    /// [Bit 5] The guest was run with the Restricted Injection feature
> enabled in SEV_FEATURES[3]
> +    ///
> +    UINT32    RestrictedInjection : 1;
> +
> +    ///
> +    /// [Bit 6] The guest was run with the Alternate Injection feature
> enabled in SEV_FEATURES[4]
> +    ///
> +    UINT32    AlternateInjection : 1;
> +
> +    ///
> +    /// [Bit 7] This guest was run with debug register swapping enabled
in
> SEV_FEATURES[5]
> +    ///
> +    UINT32    DebugSwap : 1;
> +
> +    ///
> +    /// [Bit 8]  This guest was run with the PreventHostIBS feature
> enabled in SEV_FEATURES[6]
> +    ///
> +    UINT32    PreventHostIBS : 1;
> +
> +    ///
> +    /// [Bit 9] The guest was run with the BTB isolation feature enabled
in
> SEV_FEATURES[7]
> +    ///
> +    UINT32    SNPBTBIsolation : 1;
> +
> +    ///
> +    /// [Bit 10]
> +    ///
> +    UINT32    Reserved0 : 1;
> +
> +    ///
> +    /// [Bit 11] The guest was run with the Secure TSC feature enabled in
> SEV_FEATURES[9]
> +    ///
> +    UINT32    SecureTsc : 1;
> +
> +    ///
> +    /// [Bits 12 13 14 15]
> +    ///
> +    UINT32    Reserved1 : 4;
> +
> +    ///
> +    /// [Bit 16] The guest was run with the VMSA Register Protection
> feature enabled in SEV_FEATURES[14]
> +    ///
> +    UINT32    VmsaRegProt_Enabled : 1;
> +
> +    UINT32    Reserved2 : 15;
>    } Bits;
>    ///
>    /// All bit fields as a 32-bit value
> --
> 2.38.1
> 
> 
> 
> 
> 




  reply	other threads:[~2022-12-07  2:13 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-01  2:35 [PATCH ovmf 0/5] Enable AMD SEV-ES DebugSwap Alexey Kardashevskiy
2022-12-01  2:35 ` [PATCH ovmf 1/5] MdePkg/Register/Amd: Define all bits from MSR_SEV_STATUS_REGISTER Alexey Kardashevskiy
2022-12-07  2:13   ` gaoliming [this message]
2022-12-07 12:24     ` 回复: [edk2-devel] " Alexey Kardashevskiy
2022-12-21  1:01       ` 回复: " gaoliming
2022-12-01  2:35 ` [PATCH ovmf 3/5] OvmfPkg: Add AMD SEV-ES DebugSwap feature support Alexey Kardashevskiy
2022-12-01  2:35 ` [PATCH ovmf 4/5] UefiCpuPkg: Add AMD SEV-ES features support Alexey Kardashevskiy
2022-12-01  2:35 ` [PATCH ovmf 5/5] OvmfPkf: Enable AMD SEV-ES DebugSwap for DXE Alexey Kardashevskiy
2022-12-01  5:36 ` [PATCH ovmf 2/5] MdePkg: Add AMD SEV features to PcdConfidentialComputingGuestAttr Alexey Kardashevskiy
     [not found] ` <20221201023521.10028-3-aik@amd.com>
2022-12-01 14:47   ` Subject: " Lendacky, Thomas
2022-12-02 12:26     ` Alexey Kardashevskiy
2022-12-02 12:59       ` Gerd Hoffmann

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