From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail.byosoft.com.cn (mail.byosoft.com.cn [58.240.74.242]) by mx.groups.io with SMTP id smtpd.web10.5430.1621574431867456591 for ; Thu, 20 May 2021 22:20:33 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=none, err=permanent DNS error (domain: byosoft.com.cn, ip: 58.240.74.242, mailfrom: gaoliming@byosoft.com.cn) Received: from DESKTOPS6D0PVI ([58.246.60.130]) (envelope-sender ) by 192.168.6.13 with ESMTP for ; Fri, 21 May 2021 13:20:22 +0800 X-WM-Sender: gaoliming@byosoft.com.cn X-Originating-IP: 58.246.60.130 X-WM-AuthFlag: YES X-WM-AuthUser: gaoliming@byosoft.com.cn From: "gaoliming" To: , , "'Samer El-Haj-Mahmoud'" , , References: <08963a74b28d8b119cdbf0b52aef45190847fb39.1621362650.git.ashishsingha@nvidia.com>, In-Reply-To: Subject: =?UTF-8?B?5Zue5aSNOiBbZWRrMi1kZXZlbF0gW1BBVENIIDEvMV0gTWRlUGtnOiBVcGRhdGUgREJHMiBhbmQgU1BDUiBoZWFkZXIgd2l0aCBOVklESUEgMTY1NTAgU3VidHlwZQ==?= Date: Fri, 21 May 2021 13:20:25 +0800 Message-ID: <003e01d74e01$017b9890$0472c9b0$@byosoft.com.cn> MIME-Version: 1.0 X-Mailer: Microsoft Outlook 16.0 Thread-Index: AQINxBIupoHKDsjbUZprP1tB2j9M1AITVAN7AeyJppcClP+d86pL0q+A Content-Type: multipart/alternative; boundary="----=_NextPart_000_003F_01D74E44.0F9FEA00" Content-Language: zh-cn ------=_NextPart_000_003F_01D74E44.0F9FEA00 Content-Type: text/plain; charset="gb2312" Content-Transfer-Encoding: quoted-printable Ashish: Is NVIDIA 16550 Subtype defined in the public spec? If yes, can you share the link? =20 Thanks Liming =B7=A2=BC=FE=C8=CB: devel@edk2.groups.io =B4=FA=B1= =ED Ashish Singhal =B7=A2=CB=CD=CA=B1=BC=E4: 2021=C4=EA5=D4=C221=C8=D5 4:33 =CA=D5=BC=FE=C8=CB: Samer El-Haj-Mahmoud ; devel@edk2.groups.io; michael.d.kinney@intel.com; gaoliming@byosoft.com.cn= ; zhiguang.liu@intel.com =D6=F7=CC=E2: Re: [edk2-devel] [PATCH 1/1] MdePkg: Update DBG2 and SPCR he= ader with NVIDIA 16550 Subtype =20 Hello Michael/Gao/Zhiguang, =20 Any update on this? =20 Thanks Ashish _____ From: Samer El-Haj-Mahmoud > Sent: Tuesday, May 18, 2021 3:14 PM To: devel@edk2.groups.io >; Ashish Singhal >; michael.d.kinney@intel.com >; gaoliming@byosoft.com.cn >; zhiguang.liu@intel.com > Cc: Samer El-Haj-Mahmoud > Subject: RE: [edk2-devel] [PATCH 1/1] MdePkg: Update DBG2 and SPCR header with NVIDIA 16550 Subtype=20 =20 External email: Use caution opening links or attachments Reviewed-by: Samer El-Haj-Mahmoud > > -----Original Message----- > From: devel@edk2.groups.io > On Behalf Of Ashish > Singhal via groups.io > Sent: Tuesday, May 18, 2021 2:38 PM > To: devel@edk2.groups.io ; michael.d.kinney@intel.com ; > gaoliming@byosoft.com.cn ; zhiguang.liu@intel.com =20 > Cc: Ashish Singhal > > Subject: [edk2-devel] [PATCH 1/1] MdePkg: Update DBG2 and SPCR header wi= th > NVIDIA 16550 Subtype > > Add macros for NVIDIA 16550 UART specific debug port subtype in both > DBG2 as well as SPCR header file. > > Signed-off-by: Ashish Singhal > > > --- > MdePkg/Include/IndustryStandard/DebugPort2Table.h | 1 + > .../IndustryStandard/SerialPortConsoleRedirectionTable.h | 5 +++++ > 2 files changed, 6 insertions(+) > > diff --git a/MdePkg/Include/IndustryStandard/DebugPort2Table.h > b/MdePkg/Include/IndustryStandard/DebugPort2Table.h > index 3faa30b76a..6a6fd2590e 100644 > --- a/MdePkg/Include/IndustryStandard/DebugPort2Table.h > +++ b/MdePkg/Include/IndustryStandard/DebugPort2Table.h > @@ -43,6 +43,7 @@ typedef struct { > #define EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_FULL_16550 > 0x0000 > #define > EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_16550_SUBSET_COMPATIBLE_WITH_ > MS_DBGP_SPEC 0x0001 > #define EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_PL011_UART > 0x0003 > +#define EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_NVIDIA_16550_UART > 0x0005 > #define > EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_SBSA_GENERIC_UART_2X > 0x000d > #define EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_SBSA_GENERIC_UART > 0x000e > #define EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_DCC > 0x000f > diff --git > a/MdePkg/Include/IndustryStandard/SerialPortConsoleRedirectionTable.h > b/MdePkg/Include/IndustryStandard/SerialPortConsoleRedirectionTable.h > index 2066c7895e..ba19567f52 100644 > --- a/MdePkg/Include/IndustryStandard/SerialPortConsoleRedirectionTable.= h > +++ b/MdePkg/Include/IndustryStandard/SerialPortConsoleRedirectionTable. > +++ h > @@ -80,6 +80,11 @@ typedef struct { > /// > #define > EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_AR > M_PL011_UART 0x03 > > +/// > +/// NVIDIA 16550 UART > +/// > +#define > EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_NV > IDIA_16550_UART 0x05 > + > /// > /// ARM SBSA Generic UART (2.x) supporting 32-bit only accesses [deprecated] > /// > -- > 2.17.1 > > > >=20 > IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. ------=_NextPart_000_003F_01D74E44.0F9FEA00 Content-Type: text/html; charset="gb2312" Content-Transfer-Encoding: quoted-printable

A= shish:

 Is NVIDIA 16550 Subtype defined in the pub= lic spec? If yes, can you share the link?

=  

Thanks

Liming

=B7=A2=BC=FE=C8=CB= : devel= @edk2.groups.io <devel@edk2.groups.io> =B4=FA=B1=ED Ashish Singhal
=B7=A2=CB=CD=CA=B1=BC=E4: 2021=C4=EA5=D4=C2= 21=C8=D5 4:33
=CA=D5=BC=FE=C8=CB: Samer El-Haj-Mahmoud <Sam= er.El-Haj-Mahmoud@arm.com>; devel@edk2.groups.io; michael.d.kinney@intel= .com; gaoliming@byosoft.com.cn; zhiguang.liu@intel.com
=D6=F7= =CC=E2: Re: [edk2-devel] = [PATCH 1/1] MdePkg: Update DBG2 and SPCR header with NVIDIA 16550 Subtype

 

Hello Michael/Gao/Zhiguang,

 

An= y update on this?

 

Thanks

Ashish

From: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>
Sent: Tuesday, May = 18, 2021 3:14 PM
To: deve= l@edk2.groups.io <devel@edk2= .groups.io>; Ashish Singhal <ashishsingha@nvidia.com>; michael.d.kinney@intel.com <michael.d.kinney@intel.com>; gaoliming@byosoft.com.cn <gaoliming@byosoft.com.cn>; zhiguang.liu@intel.com <zhiguang.liu@intel.com>
Cc: Samer E= l-Haj-Mahmoud <Samer.El-= Haj-Mahmoud@arm.com>
Subject: RE: [edk2-devel] [PATCH 1/1]= MdePkg: Update DBG2 and SPCR header with NVIDIA 16550 Subtype

 

External email: Use caution opening links or attachmen= ts


Reviewed-by: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>

> -= ----Original Message-----
> From: devel@edk2.groups.io <d= evel@edk2.groups.io> On Behalf Of Ashish
> Singhal via groups.= io
> Sent: Tuesday, May 18, 2021 2:38 PM
> To: devel@edk2.groups.io; michael.d.kinney@intel.com;
> gaoliming@byosoft.com.cn; zhiguang.liu@intel.com
> Cc: Ashish Si= nghal <ashishsingha@nvidia.co= m>
> Subject: [edk2-devel] [PATCH 1/1] MdePkg: Update DBG2 and= SPCR header with
> NVIDIA 16550 Subtype
>
> Add macros f= or NVIDIA 16550 UART specific debug port subtype in both
> DBG2 as we= ll as SPCR header file.
>
> Signed-off-by: Ashish Singhal <<= a href=3D"mailto:ashishsingha@nvidia.com">ashishsingha@nvidia.com>>
> ---
>  MdePkg/Include/IndustryStandard/DebugPort2= Table.h            |= 1 +
>  .../IndustryStandard/SerialPortConsoleRedirectionTable.h=      | 5 +++++
>  2 files changed, 6 inserti= ons(+)
>
> diff --git a/MdePkg/Include/IndustryStandard/DebugPo= rt2Table.h
> b/MdePkg/Include/IndustryStandard/DebugPort2Table.h
&= gt; index 3faa30b76a..6a6fd2590e 100644
> --- a/MdePkg/Include/Indust= ryStandard/DebugPort2Table.h
> +++ b/MdePkg/Include/IndustryStandard/= DebugPort2Table.h
> @@ -43,6 +43,7 @@ typedef struct {
>  = #define   EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_FULL_16550
> 0x= 0000
>  #define
> EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_16550_= SUBSET_COMPATIBLE_WITH_
> MS_DBGP_SPEC  0x0001
>  #de= fine   EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_PL011_UART
> 0= x0003
> +#define   EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_NVIDIA= _16550_UART
> 0x0005
>  #define
> EFI_ACPI_DBG2_PORT= _SUBTYPE_SERIAL_ARM_SBSA_GENERIC_UART_2X
> 0x000d
>  #defi= ne   EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_SBSA_GENERIC_UART
&= gt; 0x000e
>  #define   EFI_ACPI_DBG2_PORT_SUBTYPE_SER= IAL_DCC
> 0x000f
> diff --git
> a/MdePkg/Include/Industry= Standard/SerialPortConsoleRedirectionTable.h
> b/MdePkg/Include/Indus= tryStandard/SerialPortConsoleRedirectionTable.h
> index 2066c7895e..b= a19567f52 100644
> --- a/MdePkg/Include/IndustryStandard/SerialPortCo= nsoleRedirectionTable.h
> +++ b/MdePkg/Include/IndustryStandard/Seria= lPortConsoleRedirectionTable.
> +++ h
> @@ -80,6 +80,11 @@ type= def struct {
>  ///
>  #define
> EFI_ACPI_SERIA= L_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_AR
> M_PL011_UART&nbs= p;           0x03
>=
> +///
> +/// NVIDIA 16550 UART
> +///
> +#define<= br>> EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_NV> IDIA_16550_UART         0x05<= br>> +
>  ///
>  /// ARM SBSA Generic UART (2.x) s= upporting 32-bit only accesses [deprecated]
> ///
> --
> = 2.17.1
>
>
>
>
>

IMPORTANT NOTICE: Th= e contents of this email and any attachments are confidential and may also = be privileged. If you are not the intended recipient, please notify the sen= der immediately and do not disclose the contents to any other person, use i= t for any purpose, or store or copy the information in any medium. Thank yo= u.

=

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