From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail.byosoft.com.cn (mail.byosoft.com.cn [58.240.74.242]) by mx.groups.io with SMTP id smtpd.web10.5472.1621574880831574444 for ; Thu, 20 May 2021 22:28:01 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=none, err=permanent DNS error (domain: byosoft.com.cn, ip: 58.240.74.242, mailfrom: gaoliming@byosoft.com.cn) Received: from DESKTOPS6D0PVI ([58.246.60.130]) (envelope-sender ) by 192.168.6.13 with ESMTP for ; Fri, 21 May 2021 13:27:53 +0800 X-WM-Sender: gaoliming@byosoft.com.cn X-Originating-IP: 58.246.60.130 X-WM-AuthFlag: YES X-WM-AuthUser: gaoliming@byosoft.com.cn From: "gaoliming" To: , , , "'Samer El-Haj-Mahmoud'" , , References: <08963a74b28d8b119cdbf0b52aef45190847fb39.1621362650.git.ashishsingha@nvidia.com>, <1680FD5B20378614.12041@groups.io> In-Reply-To: <1680FD5B20378614.12041@groups.io> Subject: =?UTF-8?B?5Zue5aSNOiBbZWRrMi1kZXZlbF0gW1BBVENIIDEvMV0gTWRlUGtnOiBVcGRhdGUgREJHMiBhbmQgU1BDUiBoZWFkZXIgd2l0aCBOVklESUEgMTY1NTAgU3VidHlwZQ==?= Date: Fri, 21 May 2021 13:27:56 +0800 Message-ID: <004c01d74e02$0e238930$2a6a9b90$@byosoft.com.cn> MIME-Version: 1.0 X-Mailer: Microsoft Outlook 16.0 Thread-Index: AQINxBIupoHKDsjbUZprP1tB2j9M1AITVAN7AeyJppcClP+d8wIvZcQLqjpYhSA= Content-Type: multipart/alternative; boundary="----=_NextPart_000_004D_01D74E45.1C47DAA0" Content-Language: zh-cn ------=_NextPart_000_004D_01D74E45.1C47DAA0 Content-Type: text/plain; charset="gb2312" Content-Transfer-Encoding: quoted-printable Ashish: Sorry. I miss the patch cover letter. I see this subtype is defined in https://docs.microsoft.com/en-us/windows-hardware/drivers/bringup/acpi-deb= ug -port-table.=20 So, I agree this fix. Reviewed-by: Liming Gao Now, we are in Soft Feature Freeze for edk2-stable202105. I will merge this patch once edk2-stable202105 is created.=20 =20 Thanks Liming =B7=A2=BC=FE=C8=CB: devel@edk2.groups.io =B4=FA=B1= =ED gaoliming =B7=A2=CB=CD=CA=B1=BC=E4: 2021=C4=EA5=D4=C221=C8=D5 13:20 =CA=D5=BC=FE=C8=CB: devel@edk2.groups.io; ashishsingha@nvidia.com; 'Samer El-Haj-Mahmoud' ; michael.d.kinney@intel.com= ; zhiguang.liu@intel.com =D6=F7=CC=E2: =BB=D8=B8=B4: [edk2-devel] [PATCH 1/1] MdePkg: Update DBG2 a= nd SPCR header with NVIDIA 16550 Subtype =20 Ashish: Is NVIDIA 16550 Subtype defined in the public spec? If yes, can you share the link? =20 Thanks Liming =B7=A2=BC=FE=C8=CB: devel@edk2.groups.io > =B4=FA=B1=ED Ashish = Singhal =B7=A2=CB=CD=CA=B1=BC=E4: 2021=C4=EA5=D4=C221=C8=D5 4:33 =CA=D5=BC=FE=C8=CB: Samer El-Haj-Mahmoud >; devel@edk2.groups.io ; michael.d.kinney@intel.com ; gaoliming@byosoft.com.cn ; zhiguang.liu@intel.com =20 =D6=F7=CC=E2: Re: [edk2-devel] [PATCH 1/1] MdePkg: Update DBG2 and SPCR he= ader with NVIDIA 16550 Subtype =20 Hello Michael/Gao/Zhiguang, =20 Any update on this? =20 Thanks Ashish _____ From: Samer El-Haj-Mahmoud > Sent: Tuesday, May 18, 2021 3:14 PM To: devel@edk2.groups.io >; Ashish Singhal >; michael.d.kinney@intel.com >; gaoliming@byosoft.com.cn >; zhiguang.liu@intel.com > Cc: Samer El-Haj-Mahmoud > Subject: RE: [edk2-devel] [PATCH 1/1] MdePkg: Update DBG2 and SPCR header with NVIDIA 16550 Subtype=20 =20 External email: Use caution opening links or attachments Reviewed-by: Samer El-Haj-Mahmoud > > -----Original Message----- > From: devel@edk2.groups.io > On Behalf Of Ashish > Singhal via groups.io > Sent: Tuesday, May 18, 2021 2:38 PM > To: devel@edk2.groups.io ; michael.d.kinney@intel.com ; > gaoliming@byosoft.com.cn ; zhiguang.liu@intel.com =20 > Cc: Ashish Singhal > > Subject: [edk2-devel] [PATCH 1/1] MdePkg: Update DBG2 and SPCR header wi= th > NVIDIA 16550 Subtype > > Add macros for NVIDIA 16550 UART specific debug port subtype in both > DBG2 as well as SPCR header file. > > Signed-off-by: Ashish Singhal > > > --- > MdePkg/Include/IndustryStandard/DebugPort2Table.h | 1 + > .../IndustryStandard/SerialPortConsoleRedirectionTable.h | 5 +++++ > 2 files changed, 6 insertions(+) > > diff --git a/MdePkg/Include/IndustryStandard/DebugPort2Table.h > b/MdePkg/Include/IndustryStandard/DebugPort2Table.h > index 3faa30b76a..6a6fd2590e 100644 > --- a/MdePkg/Include/IndustryStandard/DebugPort2Table.h > +++ b/MdePkg/Include/IndustryStandard/DebugPort2Table.h > @@ -43,6 +43,7 @@ typedef struct { > #define EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_FULL_16550 > 0x0000 > #define > EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_16550_SUBSET_COMPATIBLE_WITH_ > MS_DBGP_SPEC 0x0001 > #define EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_PL011_UART > 0x0003 > +#define EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_NVIDIA_16550_UART > 0x0005 > #define > EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_SBSA_GENERIC_UART_2X > 0x000d > #define EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_SBSA_GENERIC_UART > 0x000e > #define EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_DCC > 0x000f > diff --git > a/MdePkg/Include/IndustryStandard/SerialPortConsoleRedirectionTable.h > b/MdePkg/Include/IndustryStandard/SerialPortConsoleRedirectionTable.h > index 2066c7895e..ba19567f52 100644 > --- a/MdePkg/Include/IndustryStandard/SerialPortConsoleRedirectionTable.= h > +++ b/MdePkg/Include/IndustryStandard/SerialPortConsoleRedirectionTable. > +++ h > @@ -80,6 +80,11 @@ typedef struct { > /// > #define > EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_AR > M_PL011_UART 0x03 > > +/// > +/// NVIDIA 16550 UART > +/// > +#define > EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_NV > IDIA_16550_UART 0x05 > + > /// > /// ARM SBSA Generic UART (2.x) supporting 32-bit only accesses [deprecated] > /// > -- > 2.17.1 > > > >=20 > IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. ------=_NextPart_000_004D_01D74E45.1C47DAA0 Content-Type: text/html; charset="gb2312" Content-Transfer-Encoding: quoted-printable

Ashish:

 Sorry.= I miss the patch cover letter. I see this subtype is defined in https://docs.microsoft.com/en-us/windows-hardware/drivers/br= ingup/acpi-debug-port-table.

&nb= sp; So, I agree this fix. Reviewed-by: Liming Gao <gaoliming@byosof= t.com.cn>

 

  Now, we are in Soft Feature Freeze for ed= k2-stable202105. I will merge this patch once edk2-stable202105 is created.=

 

Thanks

Liming<= /span>

=B7=A2=BC=FE=C8=CB: devel@edk2.groups.io <= ;devel@edk2.groups.io> =B4=FA=B1=ED gaoliming
=B7= =A2=CB=CD=CA=B1=BC=E4: 2021=C4=EA5=D4=C2= 21=C8=D5 13:20
=CA=D5=BC=FE=C8=CB:
devel@edk2.groups.io; ashis= hsingha@nvidia.com; 'Samer El-Haj-Mahmoud' <Samer.El-Haj-Mahmoud@arm.com= >; michael.d.kinney@intel.com; zhiguang.liu@intel.com
=D6= =F7=CC=E2: =BB=D8= =B8=B4: [edk2-devel] [PATCH 1/1] MdePkg: Update DBG2 an= d SPCR header with NVIDIA 16550 Subtype

<= /div>

 

Ashish:

 Is NVIDIA 16550 Subtype defined i= n the public spec? If yes, can you share the link?

=

 

Thanks

Liming

=

=B7=A2=BC= =FE=C8=CB: devel@e= dk2.groups.io <devel@edk2.gr= oups.io> =B4=FA= =B1=ED As= hish Singhal
=B7=A2= =CB=CD=CA=B1=BC=E4: 2021=C4=EA5=D4=C221= =C8=D5 4:33
=CA=D5=BC=FE=C8=CB: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com= >; devel@edk2.groups.io; michael.d.kinney@intel.com; = gaoliming@byosoft.com.cn; <= a href=3D"mailto:zhiguang.liu@intel.com">zhiguang.liu@intel.com
=D6=F7=CC=E2: Re: [e= dk2-devel] [PATCH 1/1] MdePkg: Update DBG2 and SPCR header with NVIDIA 1655= 0 Subtype

 

Hello Michael/Gao/Zhigu= ang,

 

=

Any update on this?

 = ;

Thanks

<= p class=3DMsoNormal>Ashish


= From: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>
Sent: = Tuesday, May 18, 2021 3:14 PM
To: devel@edk2.groups.io <devel@edk2.groups.io>; Ashish Singhal <ashishsingha@nvidia.com>; michael.d.kinney@intel.com <michael.d.kinney@intel.com>; gaoliming@byosoft.com.cn <gaoliming@byosoft.com.cn>; <= a href=3D"mailto:zhiguang.liu@intel.com">zhiguang.liu@intel.com <zhiguang.liu@intel.com>
Cc: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>
Subject: RE: [edk2-de= vel] [PATCH 1/1] MdePkg: Update DBG2 and SPCR header with NVIDIA 16550 Subt= ype

 

External email: Use caution opening li= nks or attachments


Reviewed-by: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com&= gt;

> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Ashish
> Si= nghal via groups.io
> Sent: Tuesday, May 18, 2021 2:38 PM
> To:= devel@edk2.groups.io; michael.d.kinney@intel.com;
= > gaoliming@byosoft.com.cn; zhiguang.liu@intel.com> Cc: Ashish Singhal <ash= ishsingha@nvidia.com>
> Subject: [edk2-devel] [PATCH 1/1] MdeP= kg: Update DBG2 and SPCR header with
> NVIDIA 16550 Subtype
>> Add macros for NVIDIA 16550 UART specific debug port subtype in both=
> DBG2 as well as SPCR header file.
>
> Signed-off-by: A= shish Singhal <ashishsingha@n= vidia.com>
>
> ---
>  MdePkg/Include/Industry= Standard/DebugPort2Table.h        &= nbsp;   | 1 +
>  .../IndustryStandard/SerialPortConsol= eRedirectionTable.h     | 5 +++++
>  2 files= changed, 6 insertions(+)
>
> diff --git a/MdePkg/Include/Indus= tryStandard/DebugPort2Table.h
> b/MdePkg/Include/IndustryStandard/Deb= ugPort2Table.h
> index 3faa30b76a..6a6fd2590e 100644
> --- a/Md= ePkg/Include/IndustryStandard/DebugPort2Table.h
> +++ b/MdePkg/Includ= e/IndustryStandard/DebugPort2Table.h
> @@ -43,6 +43,7 @@ typedef stru= ct {
>  #define   EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_FU= LL_16550
> 0x0000
>  #define
> EFI_ACPI_DBG2_PORT_SU= BTYPE_SERIAL_16550_SUBSET_COMPATIBLE_WITH_
> MS_DBGP_SPEC  0x000= 1
>  #define   EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_P= L011_UART
> 0x0003
> +#define   EFI_ACPI_DBG2_PORT_SU= BTYPE_SERIAL_NVIDIA_16550_UART
> 0x0005
>  #define
>= EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_SBSA_GENERIC_UART_2X
> 0x000d<= br>>  #define   EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_SBS= A_GENERIC_UART
> 0x000e
>  #define   EFI_ACPI_DB= G2_PORT_SUBTYPE_SERIAL_DCC
> 0x000f
> diff --git
> a/MdeP= kg/Include/IndustryStandard/SerialPortConsoleRedirectionTable.h
> b/M= dePkg/Include/IndustryStandard/SerialPortConsoleRedirectionTable.h
> = index 2066c7895e..ba19567f52 100644
> --- a/MdePkg/Include/IndustrySt= andard/SerialPortConsoleRedirectionTable.h
> +++ b/MdePkg/Include/Ind= ustryStandard/SerialPortConsoleRedirectionTable.
> +++ h
> @@ -= 80,6 +80,11 @@ typedef struct {
>  ///
>  #define
= > EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_AR
&g= t; M_PL011_UART          =   0x03
>
> +///
> +/// NVIDIA 16550 UART
> +//= /
> +#define
> EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_I= NTERFACE_TYPE_NV
> IDIA_16550_UART      = ;   0x05
> +
>  ///
>  /// ARM SBSA G= eneric UART (2.x) supporting 32-bit only accesses [deprecated]
> ///<= br>> --
> 2.17.1
>
>
>
>
>

I= MPORTANT NOTICE: The contents of this email and any attachments are confide= ntial and may also be privileged. If you are not the intended recipient, pl= ease notify the sender immediately and do not disclose the contents to any = other person, use it for any purpose, or store or copy the information in a= ny medium. Thank you.

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