From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail.byosoft.com.cn (mail.byosoft.com.cn [58.240.74.242]) by mx.groups.io with SMTP id smtpd.web12.1032.1617155459255535099 for ; Tue, 30 Mar 2021 18:50:59 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=none, err=permanent DNS error (domain: byosoft.com.cn, ip: 58.240.74.242, mailfrom: gaoliming@byosoft.com.cn) Received: from DESKTOPS6D0PVI ([58.246.60.130]) (envelope-sender ) by 192.168.6.13 with ESMTP for ; Wed, 31 Mar 2021 09:50:54 +0800 X-WM-Sender: gaoliming@byosoft.com.cn X-Originating-IP: 58.246.60.130 X-WM-AuthFlag: YES X-WM-AuthUser: gaoliming@byosoft.com.cn From: "gaoliming" To: , Cc: "'Michael D Kinney'" , "'Zhiguang Liu'" , "'Zhang Hongbin1'" References: <20210331012007.12824-1-Jiaxin.wu@intel.com> In-Reply-To: <20210331012007.12824-1-Jiaxin.wu@intel.com> Subject: =?UTF-8?B?5Zue5aSNOiBbZWRrMi1kZXZlbF0gW1BBVENIIHYxXSBNZGVQa2c6IFN1cHBvcnQgRXh0ZW5kZWQgQ29udHJvbCBSZWdpc3RlcihYQ1IpIFJlYWQgYW5kIFdyaXRlLg==?= Date: Wed, 31 Mar 2021 09:50:57 +0800 Message-ID: <006901d725d0$4b525070$e1f6f150$@byosoft.com.cn> MIME-Version: 1.0 X-Mailer: Microsoft Outlook 16.0 Thread-Index: AQHiBvA0gelqVkTWiCdPC1VnuTWhcKqHkqkA Content-Type: text/plain; charset="gb2312" Content-Transfer-Encoding: quoted-printable Content-Language: zh-cn Where is X64 implementation for this new API? > -----=D3=CA=BC=FE=D4=AD=BC=FE----- > =B7=A2=BC=FE=C8=CB: devel@edk2.groups.io =B4=FA= =B1=ED Wu, Jiaxin > =B7=A2=CB=CD=CA=B1=BC=E4: 2021=C4=EA3=D4=C231=C8=D5 9:20 > =CA=D5=BC=FE=C8=CB: devel@edk2.groups.io > =B3=AD=CB=CD: Michael D Kinney ; Liming Gao > ; Zhiguang Liu ; Zhang > Hongbin1 > =D6=F7=CC=E2: [edk2-devel] [PATCH v1] MdePkg: Support Extended Control > Register(XCR) Read and Write. >=20 > https://bugzilla.tianocore.org/show_bug.cgi?id=3D3284 >=20 > This patch is to support Extended Control Register(XCR) Read > and Write. >=20 > Cc: Michael D Kinney > Cc: Liming Gao > Cc: Zhiguang Liu > Signed-off-by: Zhang Hongbin1 > Signed-off-by: Jiaxin Wu > --- > MdePkg/Include/Library/BaseLib.h | 46 > ++++++++++++++++++++++++++++++- > MdePkg/Library/BaseLib/BaseLib.inf | 4 ++- > MdePkg/Library/BaseLib/Ia32/ReadXcr.nasm | 31 > +++++++++++++++++++++ > MdePkg/Library/BaseLib/Ia32/WriteXcr.nasm | 34 > +++++++++++++++++++++++ > 4 files changed, 113 insertions(+), 2 deletions(-) > create mode 100644 MdePkg/Library/BaseLib/Ia32/ReadXcr.nasm > create mode 100644 MdePkg/Library/BaseLib/Ia32/WriteXcr.nasm >=20 > diff --git a/MdePkg/Include/Library/BaseLib.h > b/MdePkg/Include/Library/BaseLib.h > index 1171a0ffb5..c51633ad73 100644 > --- a/MdePkg/Include/Library/BaseLib.h > +++ b/MdePkg/Include/Library/BaseLib.h > @@ -1,10 +1,10 @@ > /** @file > Provides string functions, linked list functions, math functions, > synchronization > functions, file path functions, and CPU architecture-specific functions. >=20 > -Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.
> +Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.
> Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
> Copyright (c) Microsoft Corporation.
> Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All > rights reserved.
>=20 > SPDX-License-Identifier: BSD-2-Clause-Patent > @@ -7493,7 +7493,51 @@ PatchInstructionX86 ( > OUT X86_ASSEMBLY_PATCH_LABEL *InstructionEnd, > IN UINT64 PatchValue, > IN UINTN ValueSize > ); >=20 > +/** > + Returns a 64-bit Extended Control Register(XCR). > + > + Reads and returns the 64-bit XCR specified by Index. No parameter > checking is > + performed on Index, and some Index values may cause CPU exceptions. > The > + caller must either guarantee that Index is valid, or the caller must set up > + exception handlers to catch the exceptions. This function is only available > + on IA-32 and x64. > + > + @param Index The 32-bit XCR index to read. > + > + @return The value of the XCR identified by Index. > + > +**/ > +UINT64 > +EFIAPI > +AsmReadXcr ( > + IN UINT32 Index > + ); > + > +/** > + Writes a 64-bit value to a Extended Control Register(XCR), and return= s the > + value. > + > + Writes the 64-bit value specified by Value to the XCR specified by Index. > The > + 64-bit value written to the XCR is returned. No parameter checking is > + performed on Index or Value, and some of these may cause CPU > exceptions. The > + caller must either guarantee that Index and Value are valid, or the caller > + must establish proper exception handlers. This function is only available > on > + IA-32 and x64. > + > + @param Index The 32-bit XCR index to write. > + @param Value The 64-bit value to write to the XCR. > + > + @return Value > + > +**/ > +UINT64 > +EFIAPI > +AsmWriteXcr ( > + IN UINT32 Index, > + IN UINT64 Value > + ); > + > #endif // defined (MDE_CPU_IA32) || defined (MDE_CPU_X64) > #endif // !defined (__BASE_LIB__) > diff --git a/MdePkg/Library/BaseLib/BaseLib.inf > b/MdePkg/Library/BaseLib/BaseLib.inf > index 3b85c56c3c..e62031ea11 100644 > --- a/MdePkg/Library/BaseLib/BaseLib.inf > +++ b/MdePkg/Library/BaseLib/BaseLib.inf > @@ -1,9 +1,9 @@ > ## @file > # Base Library implementation. > # > -# Copyright (c) 2007 - 2020, Intel Corporation. All rights reserved. > +# Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved. > # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
> # Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved. > # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All > rights reserved.
> # > # SPDX-License-Identifier: BSD-2-Clause-Patent > @@ -63,10 +63,12 @@ > BaseLibInternals.h >=20 > [Sources.Ia32] > Ia32/WriteTr.nasm > Ia32/Lfence.nasm > + Ia32/ReadXcr.nasm > + Ia32/WriteXcr.nasm >=20 > Ia32/Wbinvd.c | MSFT > Ia32/WriteMm7.c | MSFT > Ia32/WriteMm6.c | MSFT > Ia32/WriteMm5.c | MSFT > diff --git a/MdePkg/Library/BaseLib/Ia32/ReadXcr.nasm > b/MdePkg/Library/BaseLib/Ia32/ReadXcr.nasm > new file mode 100644 > index 0000000000..5d50d8ba01 > --- /dev/null > +++ b/MdePkg/Library/BaseLib/Ia32/ReadXcr.nasm > @@ -0,0 +1,31 @@ > +;------------------------------------------------------------------------= -- ---- > +; > +; Copyright (c) 2021, Intel Corporation. All rights reserved.
> +; SPDX-License-Identifier: BSD-2-Clause-Patent > +; > +; Module Name: > +; > +; ReadXcr.Asm > +; > +; Abstract: > +; > +; AsmReadXcr function > +; > +; Notes: > +; > +;------------------------------------------------------------------------= -- ---- > + > + SECTION .text > + > +;------------------------------------------------------------------------= -- ---- > +; UINT64 > +; EFIAPI > +; AsmReadXcr ( > +; IN UINT32 Index > +; ); > +;------------------------------------------------------------------------= -- ---- > +global ASM_PFX(AsmReadXcr) > +ASM_PFX(AsmReadXcr): > + mov ecx, [esp + 4] > + xgetbv > + ret > \ No newline at end of file > diff --git a/MdePkg/Library/BaseLib/Ia32/WriteXcr.nasm > b/MdePkg/Library/BaseLib/Ia32/WriteXcr.nasm > new file mode 100644 > index 0000000000..009d41864b > --- /dev/null > +++ b/MdePkg/Library/BaseLib/Ia32/WriteXcr.nasm > @@ -0,0 +1,34 @@ > +;------------------------------------------------------------------------= -- ---- > +; > +; Copyright (c) 2021, Intel Corporation. All rights reserved.
> +; SPDX-License-Identifier: BSD-2-Clause-Patent > +; > +; Module Name: > +; > +; WriteXcr.nasm > +; > +; Abstract: > +; > +; AsmWriteXcr function > +; > +; Notes: > +; > +;------------------------------------------------------------------------= -- ---- > + > + SECTION .text > + > +;------------------------------------------------------------------------= -- ---- > +; UINT64 > +; EFIAPI > +; AsmWriteXcr ( > +; IN UINT32 Index, > +; IN UINT64 Value > +; ); > +;------------------------------------------------------------------------= -- ---- > +global ASM_PFX(AsmWriteXcr) > +ASM_PFX(AsmWriteXcr): > + mov edx, [esp + 12] > + mov eax, [esp + 8] > + mov ecx, [esp + 4] > + xsetbv > + ret > \ No newline at end of file > -- > 2.16.2.windows.1 >=20 >=20 >=20 >=20 >=20