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From: "Lendacky, Thomas via groups.io" <thomas.lendacky=amd.com@groups.io>
To: Gerd Hoffmann <kraxel@redhat.com>, Michael Roth <michael.roth@amd.com>
Cc: devel@edk2.groups.io, Ard Biesheuvel <ardb@kernel.org>,
	Erdem Aktas <erdemaktas@google.com>,
	Jiewen Yao <jiewen.yao@intel.com>, Min Xu <min.m.xu@intel.com>,
	Jianyong Wu <jianyong.wu@arm.com>,
	Anatol Belski <anbelski@linux.microsoft.com>
Subject: Re: [edk2-devel] [PATCH] OvmfPkg: Don't make APIC MMIO accesses with encryption bit set
Date: Wed, 24 Apr 2024 09:05:18 -0500	[thread overview]
Message-ID: <006f3bfc-d7df-f2a9-57fb-378c72e316bd@amd.com> (raw)
In-Reply-To: <k5vzhxgbisuajgvuthtq7uciyq4a36hjcjoicqtdfuwfv4mdcx@jbaljldsjfin>

On 4/24/24 06:54, Gerd Hoffmann wrote:
> On Tue, Apr 23, 2024 at 03:59:58PM -0500, Michael Roth wrote:
>> For the most part, OVMF will clear the encryption bit for MMIO regions,
>> but there is currently one known exception during SEC when the APIC
>> base address is accessed via MMIO with the encryption bit set for
>> SEV-ES/SEV-SNP guests.
> 
> what exactly accesses the lapic that early?

InitializedApicTimer() in OvmfPkg/Sec/SecMain.c

> 
>> +/**
>> +  Map known MMIO regions unencrypted if SEV-ES is active.
>> +
>> +  During early booting, page table entries default to having the encryption bit
>> +  set for SEV-ES/SEV-SNP guests. In cases where there is MMIO to an address, the
>> +  encryption bit should be cleared. Clear it here for any known MMIO accesses
>> +  during SEC, which is currently just the APIC base address.
>> +
>> +**/
>> +VOID
>> +SecMapApicBaseUnencrypted (
>> +  VOID
>> +  )
>> +{
>> +  PAGE_MAP_AND_DIRECTORY_POINTER  *Level4Entry;
>> +  PAGE_MAP_AND_DIRECTORY_POINTER  *Level3Entry;
>> +  PAGE_MAP_AND_DIRECTORY_POINTER  *Level2Entry;
>> +  PAGE_TABLE_4K_ENTRY             *Level1Entry;
>> +  SEC_SEV_ES_WORK_AREA            *SevEsWorkArea;
>> +  PHYSICAL_ADDRESS                Cr3;
>> +  UINT64                          ApicAddress;
>> +  UINT64                          PgTableMask;
>> +  UINT32                          Level1Page;
>> +  UINT64                          Level1Address;
>> +  UINT64                          Level1Flags;
>> +  UINTN                           PteIndex;
>> +
>> +  if (!SevEsIsEnabled ()) {
>> +    return;
>> +  }
> 
> That is incompatible with 5-level paging.  The current reset vector will
> never turn on 5-level paging in case SEV is active because we have more
> incompatibilities elsewhere (BaseMemEncryptSevLib IIRC).  But still,
> it's moving things into the wrong direction ...

Agreed. SEV needs to clean up the pagetable manipulation in general in 
order to support 5-level paging and remove redundant code. That will be 
a patch series in itself.

But without this modification, the SNP support no longer works with the 
KVM/gmem support that will be upstream. This change gets OVMF SNP 
support working again.

> 
> Ideally CpuPageTableLib should be used for this.

CpuPageTableLib will need to be modified in order for it to be used at 
this (Sec) stage. In order to work in Sec - either the caller will have 
to supply a list of pages that can be used if pagetable entries need to 
be allocated for splits or new entries or by providing some kind of SEC 
pagetable allocation pool.

So it will take significant work to get SEV support updated to using 
CpuPageTableLib and that's why with this single patch we can get OVMF 
SNP support working again.

Thanks,
Tom

> 
> take care,
>    Gerd
> 


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  reply	other threads:[~2024-04-24 14:05 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-23 20:59 [edk2-devel] [PATCH] OvmfPkg: Don't make APIC MMIO accesses with encryption bit set Roth, Michael via groups.io
2024-04-24 11:54 ` Gerd Hoffmann
2024-04-24 14:05   ` Lendacky, Thomas via groups.io [this message]
2024-04-24 14:45     ` Gerd Hoffmann
2024-04-24 16:38       ` Lendacky, Thomas via groups.io
2024-04-24 14:50   ` Roth, Michael via groups.io
2024-04-24 16:09     ` Gerd Hoffmann

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