回复: [PATCH v2 1/2] MdePkg/Cpuid.h: Add CPUID_HYBRID_INFORMATION Leaf(1Ah).

["gaoliming" <gaoliming@byosoft.com.cn>]

Include CPU maintainers Ray and Eric.

Thanks
Liming
> -----邮件原件-----
> 发件人: Jason <yun.lou@intel.com>
> 发送时间: 2020年12月8日 12:51
> 收件人: devel@edk2.groups.io
> 抄送: Jason <yun.lou@intel.com>; Michael D Kinney
> <michael.d.kinney@intel.com>; Liming Gao <gaoliming@byosoft.com.cn>;
> Zhiguang Liu <zhiguang.liu@intel.com>
> 主题: [PATCH v2 1/2] MdePkg/Cpuid.h: Add CPUID_HYBRID_INFORMATION
> Leaf(1Ah).
> 
> https://bugzilla.tianocore.org/show_bug.cgi?id=3105
> 
> The UefiCpuPkg/CpuCacheInfoLib will reference new definition
> about CPUID_HYBRID_INFORMATION Leaf(1Ah).
> 
> Signed-off-by: Jason Lou <yun.lou@intel.com>
> Cc: Michael D Kinney <michael.d.kinney@intel.com>
> Cc: Liming Gao <gaoliming@byosoft.com.cn>
> Cc: Zhiguang Liu <zhiguang.liu@intel.com>
> ---
>  MdePkg/Include/Register/Intel/Cpuid.h | 63 +++++++++++++++++++-
>  1 file changed, 62 insertions(+), 1 deletion(-)
> 
> diff --git a/MdePkg/Include/Register/Intel/Cpuid.h
> b/MdePkg/Include/Register/Intel/Cpuid.h
> index d4496079570d..dd1b64a1e50b 100644
> --- a/MdePkg/Include/Register/Intel/Cpuid.h
> +++ b/MdePkg/Include/Register/Intel/Cpuid.h
> @@ -1278,7 +1278,7 @@ typedef union {
>    @retval  EAX  The maximum input value for ECX to retrieve sub-leaf
> information.
> 
>    @retval  EBX  Structured Extended Feature Flags described by the type
> 
> 
> CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_EBX.
> 
> -  @retval  EBX  Structured Extended Feature Flags described by the type
> 
> +  @retval  ECX  Structured Extended Feature Flags described by the type
> 
> 
> CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_ECX.
> 
>    @retval  EDX  Reserved.
> 
> 
> 
> @@ -3597,6 +3597,67 @@ typedef union {
>  ///
> 
> 
> 
> 
> 
> +/**
> 
> +  CPUID Hybrid Information Enumeration Leaf
> 
> +
> 
> +  @param   EAX  CPUID_HYBRID_INFORMATION (0x1A)
> 
> +  @param   ECX  CPUID_HYBRID_INFORMATION_SUB_LEAF (0x00).
> 
> +
> 
> +  @retval  EAX  Enumerates the native model ID and core type described
> 
> +                by the type
> CPUID_NATIVE_MODEL_ID_AND_CORE_TYPE_EAX
> 
> +  @retval  EBX  Reserved.
> 
> +  @retval  ECX  Reserved.
> 
> +  @retval  EDX  Reserved.
> 
> +
> 
> +  <b>Example usage</b>
> 
> +  @code
> 
> +  CPUID_NATIVE_MODEL_ID_AND_CORE_TYPE_EAX          Eax;
> 
> +
> 
> +  AsmCpuidEx (
> 
> +    CPUID_HYBRID_INFORMATION,
> 
> +    CPUID_HYBRID_INFORMATION_SUB_LEAF,
> 
> +    &Eax, NULL, NULL, NULL
> 
> +    );
> 
> +  @endcode
> 
> +
> 
> +**/
> 
> +#define CPUID_HYBRID_INFORMATION
> 0x1A
> 
> +
> 
> +///
> 
> +/// CPUID Hybrid Information Enumeration sub-leaf
> 
> +///
> 
> +#define CPUID_HYBRID_INFORMATION_SUB_LEAF
> 0x00
> 
> +
> 
> +/**
> 
> +  CPUID Hybrid Information EAX for CPUID leaf
> #CPUID_HYBRID_INFORMATION,
> 
> +  sub-leaf #CPUID_HYBRID_INFORMATION_SUB_LEAF.
> 
> +**/
> 
> +typedef union {
> 
> +  ///
> 
> +  /// Individual bit fields
> 
> +  ///
> 
> +  struct {
> 
> +    ///
> 
> +    /// [Bit 23:0] Native model ID of the core.
> 
> +    ///
> 
> +    /// The core-type and native mode ID can be used to uniquely identify
> 
> +    /// the microarchitecture of the core.This native model ID is not
unique
> 
> +    /// across core types, and not related to the model ID reported in
> CPUID
> 
> +    /// leaf 01H, and does not identify the SOC.
> 
> +    ///
> 
> +    UINT32  NativeModelId:24;
> 
> +    ///
> 
> +    /// [Bit 31:24] Core type
> 
> +    ///
> 
> +    UINT32  CoreType:8;
> 
> +  } Bits;
> 
> +  ///
> 
> +  /// All bit fields as a 32-bit value
> 
> +  ///
> 
> +  UINT32  Uint32;
> 
> +} CPUID_NATIVE_MODEL_ID_AND_CORE_TYPE_EAX;
> 
> +
> 
> +
> 
>  /**
> 
>    CPUID V2 Extended Topology Enumeration Leaf
> 
> 
> 
> --
> 2.28.0.windows.1