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From: "gaoliming" <gaoliming@byosoft.com.cn>
To: "'Sunil V L'" <sunilvl@ventanamicro.com>, <devel@edk2.groups.io>
Cc: "'Rebecca Cran'" <rebecca@bsdio.com>,
	"'Bob Feng'" <bob.c.feng@intel.com>,
	"'Yuwei Chen'" <yuwei.chen@intel.com>,
	"'Ard Biesheuvel'" <ardb+tianocore@kernel.org>
Subject: 回复: [PATCH 3/4] BaseTools/tools_def: Add CLANGDWARF support for RISC-V
Date: Mon, 10 Jul 2023 09:52:18 +0800	[thread overview]
Message-ID: <009301d9b2d1$28d69200$7a83b600$@byosoft.com.cn> (raw)
In-Reply-To: <20230703080831.51075-4-sunilvl@ventanamicro.com>

Sunil:
  I add my comments below. 

> -----邮件原件-----
> 发件人: Sunil V L <sunilvl@ventanamicro.com>
> 发送时间: 2023年7月3日 16:09
> 收件人: devel@edk2.groups.io
> 抄送: Sunil V L <sunilvl@ventanamicro.com>; Rebecca Cran
> <rebecca@bsdio.com>; Liming Gao <gaoliming@byosoft.com.cn>; Bob Feng
> <bob.c.feng@intel.com>; Yuwei Chen <yuwei.chen@intel.com>; Ard
> Biesheuvel <ardb+tianocore@kernel.org>
> 主题: [PATCH 3/4] BaseTools/tools_def: Add CLANGDWARF support for
> RISC-V
> 
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4478
> 
> Add tools_def definitions to support CLANGDWARF toolchain
> for RISC-V. This uses clang and the llvm LLD linker. This
> helps people by not requiring to install multiple
> cross compilers for different architectures.
> 
> Cc: Rebecca Cran <rebecca@bsdio.com>
> Cc: Liming Gao <gaoliming@byosoft.com.cn>
> Cc: Bob Feng <bob.c.feng@intel.com>
> Cc: Yuwei Chen <yuwei.chen@intel.com>
> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
> 
> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> ---
>  BaseTools/Conf/tools_def.template | 52
> +++++++++++++++++++++++++++++++
>  1 file changed, 52 insertions(+)
> 
> diff --git a/BaseTools/Conf/tools_def.template
> b/BaseTools/Conf/tools_def.template
> index 90f4105506e5..47d8c379d9f2 100755
> --- a/BaseTools/Conf/tools_def.template
> +++ b/BaseTools/Conf/tools_def.template
> @@ -745,6 +745,7 @@ DEFINE GCC_LOONGARCH64_CC_FLAGS    =
> DEF(GCC_ALL_CC_FLAGS) -mabi=lp64d -fno-asyn
>  DEFINE GCC_ARM_CC_XIPFLAGS         = -mno-unaligned-access
>  DEFINE GCC_AARCH64_CC_FLAGS        = DEF(GCC_ALL_CC_FLAGS)
> -mlittle-endian -fno-short-enums -fverbose-asm -funsigned-char
> -ffunction-sections -fdata-sections -Wno-address
> -fno-asynchronous-unwind-tables -fno-unwind-tables -fno-pic -fno-pie
> -ffixed-x18
>  DEFINE GCC_AARCH64_CC_XIPFLAGS     = -mstrict-align
> -mgeneral-regs-only
> +DEFINE GCC_RISCV64_CC_XIPFLAGS     = -mstrict-align
> -mgeneral-regs-only
>  DEFINE GCC_DLINK_FLAGS_COMMON      = -nostdlib --pie
>  DEFINE GCC_DLINK2_FLAGS_COMMON     =
> -Wl,--script=$(EDK_TOOLS_PATH)/Scripts/GccBase.lds
>  DEFINE GCC_IA32_X64_DLINK_COMMON   =
> DEF(GCC_DLINK_FLAGS_COMMON) --gc-sections
> @@ -2023,6 +2024,57 @@ DEFINE CLANGDWARF_AARCH64_DLINK_FLAGS
> = DEF(CLANGDWARF_AARCH64_TARGET) DEF(GCC_
>  RELEASE_CLANGDWARF_AARCH64_CC_FLAGS    =
> DEF(CLANGDWARF_AARCH64_CC_FLAGS) $(PLATFORM_FLAGS) -flto -O3
>  RELEASE_CLANGDWARF_AARCH64_DLINK_FLAGS =
> DEF(CLANGDWARF_AARCH64_DLINK_FLAGS) -flto -Wl,-O3 -fuse-ld=lld
> -L$(WORKSPACE)/ArmPkg/Library/GccLto -llto-aarch64
> -Wl,-plugin-opt=-pass-through=-llto-aarch64 -Wl,--no-pie,--no-relax
> 
> +##################
> +# CLANGDWARF RISCV64 definitions
> +##################
> +DEFINE CLANGDWARF_RISCV64_TARGET    = -target riscv64-linux-gnu
> +DEFINE CLANGDWARF_RISCV64_CC_FLAGS  =
> DEF(GCC5_RISCV64_CC_FLAGS) DEF(CLANGDWARF_RISCV64_TARGET)
> DEF(CLANGDWARF_WARNING_OVERRIDES)
> +
> +# This is similar to GCC flags but without -n
> +DEFINE CLANGDWARF_RISCV64_ALL_DLINK_COMMON  = -nostdlib
> -Wl,-q,--gc-sections -z common-page-size=0x40
> +DEFINE CLANGDWARF_RISCV64_ALL_DLINK_FLAGS   =
> DEF(CLANGDWARF_RISCV64_ALL_DLINK_COMMON)
> -Wl,--entry,$(IMAGE_ENTRY_POINT) -u $(IMAGE_ENTRY_POINT)
> -Wl,-Map,$(DEST_DIR_DEBUG)/$(BASE_NAME).map
> +DEFINE CLANGDWARF_RISCV64_DLINK_FLAGS       =
> DEF(CLANGDWARF_RISCV64_TARGET)
> DEF(CLANGDWARF_RISCV64_ALL_DLINK_FLAGS)
> -Wl,-melf64lriscv,--oformat=elf64-littleriscv,--no-relax
> +
> +*_CLANGDWARF_RISCV64_PP_FLAGS       = DEF(GCC_PP_FLAGS)
> +*_CLANGDWARF_RISCV64_ASLCC_FLAGS    = DEF(GCC_ASLCC_FLAGS)
> +*_CLANGDWARF_RISCV64_APP_FLAGS      =
> +*_CLANGDWARF_RISCV64_ASL_FLAGS      = DEF(IASL_FLAGS)
> +*_CLANGDWARF_RISCV64_ASL_OUTFLAGS   = DEF(IASL_OUTFLAGS)
> +*_CLANGDWARF_RISCV64_DTCPP_FLAGS    = DEF(GCC_DTCPP_FLAGS)
> +*_CLANGDWARF_RISCV64_DEPS_FLAGS     = DEF(GCC_DEPS_FLAGS)
> +
> +*_CLANGDWARF_RISCV64_CC_PATH        =
> ENV(CLANGDWARF_BIN)clang
> +*_CLANGDWARF_RISCV64_ASM_PATH       =
> ENV(CLANGDWARF_BIN)clang
> +*_CLANGDWARF_RISCV64_PP_PATH        =
> ENV(CLANGDWARF_BIN)clang
> +*_CLANGDWARF_RISCV64_VFRPP_PATH     =
> ENV(CLANGDWARF_BIN)clang
> +*_CLANGDWARF_RISCV64_ASLCC_PATH     =
> ENV(CLANGDWARF_BIN)clang
> +*_CLANGDWARF_RISCV64_ASLPP_PATH     =
> ENV(CLANGDWARF_BIN)clang
> +*_CLANGDWARF_RISCV64_DLINK_PATH     =
> ENV(CLANGDWARF_BIN)clang
> +*_CLANGDWARF_RISCV64_ASLDLINK_PATH  =
> ENV(CLANGDWARF_BIN)clang
> +
> +*_CLANGDWARF_RISCV64_SLINK_PATH     =
> ENV(CLANGDWARF_BIN)llvm-ar
> +*_CLANGDWARF_RISCV64_RC_PATH        =
> ENV(CLANGDWARF_BIN)llvm-objcopy
> +
> +*_CLANGDWARF_RISCV64_ASLCC_FLAGS    = DEF(GCC_ASLCC_FLAGS)
> -flto
Here should be -fno-lto. This option should be same for the different ARCHs.


> +*_CLANGDWARF_RISCV64_ASLDLINK_FLAGS =
> DEF(CLANGDWARF_RISCV64_TARGET)
> DEF(GCC5_RISCV32_RISCV64_ASLDLINK_FLAGS)
> +*_CLANGDWARF_RISCV64_ASM_FLAGS      = DEF(GCC_ASM_FLAGS)
> DEF(CLANGDWARF_RISCV64_TARGET) $(PLATFORM_FLAGS)
> -Qunused-arguments  -mabi=lp64 -mno-relax -flto

Here should be no -flto. Please confirm. 

Thanks
Liming
> +*_CLANGDWARF_RISCV64_DLINK_FLAGS    =
> DEF(CLANGDWARF_RISCV64_TARGET) DEF(GCC5_RISCV64_DLINK_FLAGS)
> +*_CLANGDWARF_RISCV64_DLINK_XIPFLAGS = -z common-page-size=0x20
> +*_CLANGDWARF_RISCV64_DLINK2_FLAGS   =
> DEF(GCC_DLINK2_FLAGS_COMMON)
> -Wl,--defsym=PECOFF_HEADER_SIZE=0x240
> +*_CLANGDWARF_RISCV64_PLATFORM_FLAGS =
> +*_CLANGDWARF_RISCV64_PP_FLAGS       = DEF(GCC_PP_FLAGS)
> DEF(CLANGDWARF_RISCV64_TARGET) $(PLATFORM_FLAGS)
> +*_CLANGDWARF_RISCV64_RC_FLAGS       =
> DEF(GCC_RISCV64_RC_FLAGS)
> +*_CLANGDWARF_RISCV64_VFRPP_FLAGS    = DEF(GCC_VFRPP_FLAGS)
> DEF(CLANGDWARF_RISCV64_TARGET) $(PLATFORM_FLAGS)
> +*_CLANGDWARF_RISCV64_ASLPP_FLAGS    = DEF(GCC_ASLPP_FLAGS)
> DEF(CLANGDWARF_RISCV64_TARGET)
> +*_CLANGDWARF_RISCV64_CC_XIPFLAGS    =
> DEF(GCC_RISCV64_CC_XIPFLAGS)
> +
> +  DEBUG_CLANGDWARF_RISCV64_CC_FLAGS    =
> DEF(CLANGDWARF_RISCV64_CC_FLAGS) $(PLATFORM_FLAGS) -flto -O1
> +  DEBUG_CLANGDWARF_RISCV64_DLINK_FLAGS =
> DEF(CLANGDWARF_RISCV64_DLINK_FLAGS) -flto -Wl,-O1 -fuse-ld=lld
> -Wl,--no-pie,--no-relax
> +  NOOPT_CLANGDWARF_RISCV64_CC_FLAGS    =
> DEF(CLANGDWARF_RISCV64_CC_FLAGS) $(PLATFORM_FLAGS) -O0
> +  NOOPT_CLANGDWARF_RISCV64_DLINK_FLAGS =
> DEF(CLANGDWARF_RISCV64_DLINK_FLAGS) -fuse-ld=lld
> -Wl,--no-pie,--no-relax
> +RELEASE_CLANGDWARF_RISCV64_CC_FLAGS    =
> DEF(CLANGDWARF_RISCV64_CC_FLAGS) $(PLATFORM_FLAGS) -flto -O3
> +RELEASE_CLANGDWARF_RISCV64_DLINK_FLAGS =
> DEF(CLANGDWARF_RISCV64_DLINK_FLAGS) -flto -Wl,-O3 -fuse-ld=lld
> -Wl,--no-pie,--no-relax
> +
>  #
>  #
>  # XCODE5 support
> --
> 2.34.1




  reply	other threads:[~2023-07-10  1:52 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-03  8:08 [PATCH 0/4] OvmfPkg/RiscVVirt: Add CLANGDWARF toolchain support Sunil V L
2023-07-03  8:08 ` [PATCH 1/4] OvmfPkg/RiscVVirt: use 'auto' alignment and FIXED for XIP modules Sunil V L
2023-07-03  8:08 ` [PATCH 2/4] OvmfPkg/RiscVVirt: SecEntry: Remove unnecessary assembly directives Sunil V L
2023-07-03  8:08 ` [PATCH 3/4] BaseTools/tools_def: Add CLANGDWARF support for RISC-V Sunil V L
2023-07-10  1:52   ` gaoliming [this message]
2023-07-10  9:29     ` [edk2-devel] 回复: " Sunil V L
2023-07-03  8:08 ` [PATCH 4/4] OvmfPkg/RiscVVirt: Update README for CLANGDWARF support Sunil V L
2023-07-03 12:15 ` [PATCH 0/4] OvmfPkg/RiscVVirt: Add CLANGDWARF toolchain support Ard Biesheuvel

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