From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from zrleap.intel-email.com (zrleap.intel-email.com [114.80.218.36]) by mx.groups.io with SMTP id smtpd.web11.30804.1688953952439733407 for ; Sun, 09 Jul 2023 18:52:32 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@byosoft.com.cn header.s=cloud-union header.b=Gw/6f5AV; spf=pass (domain: byosoft.com.cn, ip: 114.80.218.36, mailfrom: gaoliming@byosoft.com.cn) Received: from zrleap.intel-email.com (localhost [127.0.0.1]) by zrleap.intel-email.com (Postfix) with ESMTP id EBC23A32E40B for ; Mon, 10 Jul 2023 09:52:29 +0800 (CST) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=byosoft.com.cn; s=cloud-union; t=1688953950; bh=XZxUuic9vaLYy688uSTU5cicDDnnY5PGedJKEFDo6y8=; h=From:To:Cc:References:In-Reply-To:Subject:Date; b=Gw/6f5AV4MwUfWX1YKbrT+9nvqXqAbHUGKA+CZAWKuDDXRUf2gi4WJha5GfrXyhjP BMj7mTNvusUURzmvEpXDLlLHGv+9nX19oBUTHvv4LdoCbvXQkUnMJMTA0kkPb+tC8F KNd+mGfnc8Im0q8GVuRXepyBpeqVsowN2Tsw8Aao= Received: from localhost (localhost [127.0.0.1]) by zrleap.intel-email.com (Postfix) with ESMTP id 159D4A32E3E5 for ; Mon, 10 Jul 2023 09:52:29 +0800 (CST) Received: from zrleap.intel-email.com (localhost [127.0.0.1]) by zrleap.intel-email.com (Postfix) with ESMTP id 44E20A32E35C for ; Mon, 10 Jul 2023 09:52:27 +0800 (CST) Authentication-Results: zrleap.intel-email.com; none Received: from mail.byosoft.com.cn (mail.byosoft.com.cn [58.240.74.242]) by zrleap.intel-email.com (Postfix) with SMTP id 9C5DEA32E1D7 for ; Mon, 10 Jul 2023 09:52:24 +0800 (CST) Received: from DESKTOPS6D0PVI ([58.246.60.130]) (envelope-sender ) by 192.168.6.13 with ESMTP for ; Mon, 10 Jul 2023 09:52:10 +0800 X-WM-Sender: gaoliming@byosoft.com.cn X-Originating-IP: 58.246.60.130 X-WM-AuthFlag: YES X-WM-AuthUser: gaoliming@byosoft.com.cn From: "gaoliming" To: "'Sunil V L'" , Cc: "'Rebecca Cran'" , "'Bob Feng'" , "'Yuwei Chen'" , "'Ard Biesheuvel'" References: <20230703080831.51075-1-sunilvl@ventanamicro.com> <20230703080831.51075-4-sunilvl@ventanamicro.com> In-Reply-To: <20230703080831.51075-4-sunilvl@ventanamicro.com> Subject: =?UTF-8?B?5Zue5aSNOiBbUEFUQ0ggMy80XSBCYXNlVG9vbHMvdG9vbHNfZGVmOiBBZGQgQ0xBTkdEV0FSRiBzdXBwb3J0IGZvciBSSVNDLVY=?= Date: Mon, 10 Jul 2023 09:52:18 +0800 Message-ID: <009301d9b2d1$28d69200$7a83b600$@byosoft.com.cn> MIME-Version: 1.0 X-Mailer: Microsoft Outlook 16.0 Thread-Index: AQHPi+83r4GmuU3XJGx3x0DTMDNdKAIlsVh1r7VbueA= Sender: "gaoliming" Content-Type: text/plain; charset="gb2312" Content-Transfer-Encoding: quoted-printable Content-Language: zh-cn Sunil: I add my comments below.=20 > -----=D3=CA=BC=FE=D4=AD=BC=FE----- > =B7=A2=BC=FE=C8=CB: Sunil V L > =B7=A2=CB=CD=CA=B1=BC=E4: 2023=C4=EA7=D4=C23=C8=D5 16:09 > =CA=D5=BC=FE=C8=CB: devel@edk2.groups.io > =B3=AD=CB=CD: Sunil V L ; Rebecca Cran > ; Liming Gao ; Bob Feng > ; Yuwei Chen ; Ard > Biesheuvel > =D6=F7=CC=E2: [PATCH 3/4] BaseTools/tools_def: Add CLANGDWARF support = for > RISC-V >=20 > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4478 >=20 > Add tools_def definitions to support CLANGDWARF toolchain > for RISC-V. This uses clang and the llvm LLD linker. This > helps people by not requiring to install multiple > cross compilers for different architectures. >=20 > Cc: Rebecca Cran > Cc: Liming Gao > Cc: Bob Feng > Cc: Yuwei Chen > Cc: Ard Biesheuvel >=20 > Signed-off-by: Sunil V L > --- > BaseTools/Conf/tools_def.template | 52 > +++++++++++++++++++++++++++++++ > 1 file changed, 52 insertions(+) >=20 > diff --git a/BaseTools/Conf/tools_def.template > b/BaseTools/Conf/tools_def.template > index 90f4105506e5..47d8c379d9f2 100755 > --- a/BaseTools/Conf/tools_def.template > +++ b/BaseTools/Conf/tools_def.template > @@ -745,6 +745,7 @@ DEFINE GCC_LOONGARCH64_CC_FLAGS =3D > DEF(GCC_ALL_CC_FLAGS) -mabi=3Dlp64d -fno-asyn > DEFINE GCC_ARM_CC_XIPFLAGS =3D -mno-unaligned-access > DEFINE GCC_AARCH64_CC_FLAGS =3D DEF(GCC_ALL_CC_FLAGS) > -mlittle-endian -fno-short-enums -fverbose-asm -funsigned-char > -ffunction-sections -fdata-sections -Wno-address > -fno-asynchronous-unwind-tables -fno-unwind-tables -fno-pic -fno-pie > -ffixed-x18 > DEFINE GCC_AARCH64_CC_XIPFLAGS =3D -mstrict-align > -mgeneral-regs-only > +DEFINE GCC_RISCV64_CC_XIPFLAGS =3D -mstrict-align > -mgeneral-regs-only > DEFINE GCC_DLINK_FLAGS_COMMON =3D -nostdlib --pie > DEFINE GCC_DLINK2_FLAGS_COMMON =3D > -Wl,--script=3D$(EDK_TOOLS_PATH)/Scripts/GccBase.lds > DEFINE GCC_IA32_X64_DLINK_COMMON =3D > DEF(GCC_DLINK_FLAGS_COMMON) --gc-sections > @@ -2023,6 +2024,57 @@ DEFINE CLANGDWARF_AARCH64_DLINK_FLAGS > =3D DEF(CLANGDWARF_AARCH64_TARGET) DEF(GCC_ > RELEASE_CLANGDWARF_AARCH64_CC_FLAGS =3D > DEF(CLANGDWARF_AARCH64_CC_FLAGS) $(PLATFORM_FLAGS) -flto -O3 > RELEASE_CLANGDWARF_AARCH64_DLINK_FLAGS =3D > DEF(CLANGDWARF_AARCH64_DLINK_FLAGS) -flto -Wl,-O3 -fuse-ld=3Dlld > -L$(WORKSPACE)/ArmPkg/Library/GccLto -llto-aarch64 > -Wl,-plugin-opt=3D-pass-through=3D-llto-aarch64 = -Wl,--no-pie,--no-relax >=20 > +################## > +# CLANGDWARF RISCV64 definitions > +################## > +DEFINE CLANGDWARF_RISCV64_TARGET =3D -target riscv64-linux-gnu > +DEFINE CLANGDWARF_RISCV64_CC_FLAGS =3D > DEF(GCC5_RISCV64_CC_FLAGS) DEF(CLANGDWARF_RISCV64_TARGET) > DEF(CLANGDWARF_WARNING_OVERRIDES) > + > +# This is similar to GCC flags but without -n > +DEFINE CLANGDWARF_RISCV64_ALL_DLINK_COMMON =3D -nostdlib > -Wl,-q,--gc-sections -z common-page-size=3D0x40 > +DEFINE CLANGDWARF_RISCV64_ALL_DLINK_FLAGS =3D > DEF(CLANGDWARF_RISCV64_ALL_DLINK_COMMON) > -Wl,--entry,$(IMAGE_ENTRY_POINT) -u $(IMAGE_ENTRY_POINT) > -Wl,-Map,$(DEST_DIR_DEBUG)/$(BASE_NAME).map > +DEFINE CLANGDWARF_RISCV64_DLINK_FLAGS =3D > DEF(CLANGDWARF_RISCV64_TARGET) > DEF(CLANGDWARF_RISCV64_ALL_DLINK_FLAGS) > -Wl,-melf64lriscv,--oformat=3Delf64-littleriscv,--no-relax > + > +*_CLANGDWARF_RISCV64_PP_FLAGS =3D DEF(GCC_PP_FLAGS) > +*_CLANGDWARF_RISCV64_ASLCC_FLAGS =3D DEF(GCC_ASLCC_FLAGS) > +*_CLANGDWARF_RISCV64_APP_FLAGS =3D > +*_CLANGDWARF_RISCV64_ASL_FLAGS =3D DEF(IASL_FLAGS) > +*_CLANGDWARF_RISCV64_ASL_OUTFLAGS =3D DEF(IASL_OUTFLAGS) > +*_CLANGDWARF_RISCV64_DTCPP_FLAGS =3D DEF(GCC_DTCPP_FLAGS) > +*_CLANGDWARF_RISCV64_DEPS_FLAGS =3D DEF(GCC_DEPS_FLAGS) > + > +*_CLANGDWARF_RISCV64_CC_PATH =3D > ENV(CLANGDWARF_BIN)clang > +*_CLANGDWARF_RISCV64_ASM_PATH =3D > ENV(CLANGDWARF_BIN)clang > +*_CLANGDWARF_RISCV64_PP_PATH =3D > ENV(CLANGDWARF_BIN)clang > +*_CLANGDWARF_RISCV64_VFRPP_PATH =3D > ENV(CLANGDWARF_BIN)clang > +*_CLANGDWARF_RISCV64_ASLCC_PATH =3D > ENV(CLANGDWARF_BIN)clang > +*_CLANGDWARF_RISCV64_ASLPP_PATH =3D > ENV(CLANGDWARF_BIN)clang > +*_CLANGDWARF_RISCV64_DLINK_PATH =3D > ENV(CLANGDWARF_BIN)clang > +*_CLANGDWARF_RISCV64_ASLDLINK_PATH =3D > ENV(CLANGDWARF_BIN)clang > + > +*_CLANGDWARF_RISCV64_SLINK_PATH =3D > ENV(CLANGDWARF_BIN)llvm-ar > +*_CLANGDWARF_RISCV64_RC_PATH =3D > ENV(CLANGDWARF_BIN)llvm-objcopy > + > +*_CLANGDWARF_RISCV64_ASLCC_FLAGS =3D DEF(GCC_ASLCC_FLAGS) > -flto Here should be -fno-lto. This option should be same for the different = ARCHs. > +*_CLANGDWARF_RISCV64_ASLDLINK_FLAGS =3D > DEF(CLANGDWARF_RISCV64_TARGET) > DEF(GCC5_RISCV32_RISCV64_ASLDLINK_FLAGS) > +*_CLANGDWARF_RISCV64_ASM_FLAGS =3D DEF(GCC_ASM_FLAGS) > DEF(CLANGDWARF_RISCV64_TARGET) $(PLATFORM_FLAGS) > -Qunused-arguments -mabi=3Dlp64 -mno-relax -flto Here should be no -flto. Please confirm.=20 Thanks Liming > +*_CLANGDWARF_RISCV64_DLINK_FLAGS =3D > DEF(CLANGDWARF_RISCV64_TARGET) DEF(GCC5_RISCV64_DLINK_FLAGS) > +*_CLANGDWARF_RISCV64_DLINK_XIPFLAGS =3D -z common-page-size=3D0x20 > +*_CLANGDWARF_RISCV64_DLINK2_FLAGS =3D > DEF(GCC_DLINK2_FLAGS_COMMON) > -Wl,--defsym=3DPECOFF_HEADER_SIZE=3D0x240 > +*_CLANGDWARF_RISCV64_PLATFORM_FLAGS =3D > +*_CLANGDWARF_RISCV64_PP_FLAGS =3D DEF(GCC_PP_FLAGS) > DEF(CLANGDWARF_RISCV64_TARGET) $(PLATFORM_FLAGS) > +*_CLANGDWARF_RISCV64_RC_FLAGS =3D > DEF(GCC_RISCV64_RC_FLAGS) > +*_CLANGDWARF_RISCV64_VFRPP_FLAGS =3D DEF(GCC_VFRPP_FLAGS) > DEF(CLANGDWARF_RISCV64_TARGET) $(PLATFORM_FLAGS) > +*_CLANGDWARF_RISCV64_ASLPP_FLAGS =3D DEF(GCC_ASLPP_FLAGS) > DEF(CLANGDWARF_RISCV64_TARGET) > +*_CLANGDWARF_RISCV64_CC_XIPFLAGS =3D > DEF(GCC_RISCV64_CC_XIPFLAGS) > + > + DEBUG_CLANGDWARF_RISCV64_CC_FLAGS =3D > DEF(CLANGDWARF_RISCV64_CC_FLAGS) $(PLATFORM_FLAGS) -flto -O1 > + DEBUG_CLANGDWARF_RISCV64_DLINK_FLAGS =3D > DEF(CLANGDWARF_RISCV64_DLINK_FLAGS) -flto -Wl,-O1 -fuse-ld=3Dlld > -Wl,--no-pie,--no-relax > + NOOPT_CLANGDWARF_RISCV64_CC_FLAGS =3D > DEF(CLANGDWARF_RISCV64_CC_FLAGS) $(PLATFORM_FLAGS) -O0 > + NOOPT_CLANGDWARF_RISCV64_DLINK_FLAGS =3D > DEF(CLANGDWARF_RISCV64_DLINK_FLAGS) -fuse-ld=3Dlld > -Wl,--no-pie,--no-relax > +RELEASE_CLANGDWARF_RISCV64_CC_FLAGS =3D > DEF(CLANGDWARF_RISCV64_CC_FLAGS) $(PLATFORM_FLAGS) -flto -O3 > +RELEASE_CLANGDWARF_RISCV64_DLINK_FLAGS =3D > DEF(CLANGDWARF_RISCV64_DLINK_FLAGS) -flto -Wl,-O3 -fuse-ld=3Dlld > -Wl,--no-pie,--no-relax > + > # > # > # XCODE5 support > -- > 2.34.1