From mboxrd@z Thu Jan  1 00:00:00 1970
Received: from linux.microsoft.com (linux.microsoft.com [13.77.154.182])
 by mx.groups.io with SMTP id smtpd.web09.5177.1654556188984239292
 for <devel@edk2.groups.io>;
 Mon, 06 Jun 2022 15:56:29 -0700
Authentication-Results: mx.groups.io;
 dkim=pass header.i=@linux.microsoft.com header.s=default header.b=PEL6lH38;
 spf=pass (domain: linux.microsoft.com, ip: 13.77.154.182, mailfrom: mikuback@linux.microsoft.com)
Received: from [192.168.4.22] (unknown [47.195.228.134])
	by linux.microsoft.com (Postfix) with ESMTPSA id D8F8420BE623;
	Mon,  6 Jun 2022 15:56:27 -0700 (PDT)
DKIM-Filter: OpenDKIM Filter v2.11.0 linux.microsoft.com D8F8420BE623
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com;
	s=default; t=1654556188;
	bh=uSB120oSdDBppvVRzvrZsRAOYuP12lW9qy2T/gJtzoY=;
	h=Date:Subject:To:Cc:References:From:In-Reply-To:From;
	b=PEL6lH38fHxOAXEwuT9F6slGbpnE+vubHstNmAgBVNUDgJkt3zjfIJ7DDxcWg8Qx8
	 D144G8d5p8vmJi3NIWRytRtmaMms5BB7stRrT0lzP4PCZ5SydRMk2ZTlUfRq1UFVlk
	 Ecuwr4DWtaiMxbe8g9d/1kfffJojSpQKK39I+y28=
Message-ID: <00c58670-aef8-92c9-a60a-1a69e4ebe655@linux.microsoft.com>
Date: Mon, 6 Jun 2022 18:56:27 -0400
MIME-Version: 1.0
User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101
 Thunderbird/91.9.1
Subject: Re: [edk2-devel] [edk2-platforms] [PATCH V1 2/4] WhiskeylakeOpenBoardPkg: Indicate width of CLK duty cycle in FADT
To: devel@edk2.groups.io, nathaniel.l.desimone@intel.com
Cc: Chasel Chiu <chasel.chiu@intel.com>, Ankit Sinha <ankit.sinha@intel.com>,
 Michael Kubacki <michael.kubacki@microsoft.com>
References: <20220606225030.3403-1-nathaniel.l.desimone@intel.com>
 <20220606225030.3403-3-nathaniel.l.desimone@intel.com>
From: "Michael Kubacki" <mikuback@linux.microsoft.com>
In-Reply-To: <20220606225030.3403-3-nathaniel.l.desimone@intel.com>
Content-Language: en-US
Content-Type: text/plain; charset=UTF-8; format=flowed
Content-Transfer-Encoding: 7bit

Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com>

On 6/6/2022 6:50 PM, Nate DeSimone wrote:
> Set the location of the DUTY_CYCLE field in the P_CNT register
> and indicate the width of the clock duty cycle to OS power management
> 
> Cc: Chasel Chiu <chasel.chiu@intel.com>
> Cc: Ankit Sinha <ankit.sinha@intel.com>
> Cc: Michael Kubacki <michael.kubacki@microsoft.com>
> Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
> ---
>   .../WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkgPcd.dsc | 9 ++++++++-
>   .../WhiskeylakeURvp/OpenBoardPkgPcd.dsc                  | 9 ++++++++-
>   2 files changed, 16 insertions(+), 2 deletions(-)
> 
> diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkgPcd.dsc b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkgPcd.dsc
> index 84d4ec1331..8f3cc6ba28 100644
> --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkgPcd.dsc
> +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkgPcd.dsc
> @@ -1,7 +1,7 @@
>   ## @file
>   #  PCD configuration build description file for the UpXtreme board.
>   #
> -# Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
> +# Copyright (c) 2020 - 2022, Intel Corporation. All rights reserved.<BR>
>   #
>   # SPDX-License-Identifier: BSD-2-Clause-Patent
>   #
> @@ -259,6 +259,13 @@
>     gSiPkgTokenSpaceGuid.PcdSerialIoUartNumber|2
>     gSiPkgTokenSpaceGuid.PcdPciExpressRegionLength|gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength
>   
> +  #
> +  # Set the location of the DUTY_CYCLE field in the P_CNT register
> +  # and indicate the width of the clock duty cycle to OS power management
> +  #
> +  gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyOffset|0x1
> +  gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyWidth|0x3
> +
>     ######################################
>     # Platform Configuration
>     ######################################
> diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkgPcd.dsc b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkgPcd.dsc
> index 4a7ba4d5f0..4a5d5ef03b 100644
> --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkgPcd.dsc
> +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkgPcd.dsc
> @@ -1,7 +1,7 @@
>   ## @file
>   #  PCD configuration build description file for the WhiskeylakeURvp board.
>   #
> -# Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved.<BR>
> +# Copyright (c) 2019 - 2022, Intel Corporation. All rights reserved.<BR>
>   #
>   # SPDX-License-Identifier: BSD-2-Clause-Patent
>   #
> @@ -242,6 +242,13 @@
>     ######################################
>     gSiPkgTokenSpaceGuid.PcdPciExpressRegionLength|gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength
>   
> +  #
> +  # Set the location of the DUTY_CYCLE field in the P_CNT register
> +  # and indicate the width of the clock duty cycle to OS power management
> +  #
> +  gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyOffset|0x1
> +  gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyWidth|0x3
> +
>     ######################################
>     # Platform Configuration
>     ######################################