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From: "Michael Brown" <mcb30@ipxe.org>
To: "Zhou, Jianfeng" <jianfeng.zhou@intel.com>,
	 "devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: "Ni, Ray" <ray.ni@intel.com>, Laszlo Ersek <lersek@redhat.com>,
	 "Kumar, Rahul R" <rahul.r.kumar@intel.com>,
	 Gerd Hoffmann <kraxel@redhat.com>,
	 Pedro Falcato <pedro.falcato@gmail.com>,
	 "Zhang, Di" <di.zhang@intel.com>, "Tan, Dun" <dun.tan@intel.com>
Subject: Re: [edk2-devel] [PATCH] UefiCpuPkg/CpuPageTableLib: qualify page table accesses as volatile
Date: Fri, 23 Feb 2024 15:51:10 +0000	[thread overview]
Message-ID: <0102018dd6a9d291-d987d495-f53a-4e39-8782-336e3c2e13da-000000@eu-west-1.amazonses.com> (raw)
In-Reply-To: <PH7PR11MB6673275D6F03F32A89A43103EF552@PH7PR11MB6673.namprd11.prod.outlook.com>

On 23/02/2024 15:12, Zhou, Jianfeng wrote:
>> While it may well cause the compiler to generate less optimised code, there is absolutely no way that this volatile declaration on a local stack variable can possibly change the outcome of the code.
>> There can never be any meaningful side-effects from reading or writing a stack variable.
>> I would suggest dropping the volatile on LocalPte4K, since its *only* possible impact is to confuse a future reader of the code.
> 
> The change is for preventing compiler from optimizing.
> As a temporary variable,  LocalPte4K may be replaced by function parameter Pte4K.

No, it can't.  If Pte4K is marked as a volatile pointer, then the 
compiler is not allowed to unilaterally decide to treat it as a 
non-volatile pointer.

> In this case, code like "LocalPte4K.Bits.Present = Attribute->Bits.Present" may lead to unexpected result, as it is not atomic. Assembly code look like:
>     mov eax, [r8]
>     and dword [rcx], 0xfffffffe  // this instruction clear the present bit and may leads to unexpected result.
>     and eax, 0x1
>     or [rcx], eax

Please test with Pte4K marked as volatile and LocalPte4K marked as 
non-volatile.  If you can still generate assembly code that writes to 
*Pte4K more than once, then that would be a serious compiler bug.


As a separate note, I would also suggest removing the unnecessary second 
read through Pte4K, since once Pte4K is marked as volatile the compiler 
will generate an extra read from that address:

--- a/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c
+++ b/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c
@@ -30,7 +30,7 @@ PageTableLibSetPte4K (

    LocalPte4K.Uint64 = Pte4K->Uint64;
    if (Mask->Bits.PageTableBaseAddressLow || 
Mask->Bits.PageTableBaseAddressHigh) {
-    LocalPte4K.Uint64 = (IA32_MAP_ATTRIBUTE_PAGE_TABLE_BASE_ADDRESS 
(Attribute) + Offset) | (Pte4K->Uint64 & ~IA32_PE_BASE_ADDRESS_MASK_40);
+    LocalPte4K.Uint64 = (IA32_MAP_ATTRIBUTE_PAGE_TABLE_BASE_ADDRESS 
(Attribute) + Offset) | (LocalPte4K.Uint64 & ~IA32_PE_BASE_ADDRESS_MASK_40);
    }

    if (Mask->Bits.Present) {

Michael




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  reply	other threads:[~2024-02-23 15:51 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-22  8:41 [edk2-devel] [PATCH] UefiCpuPkg/CpuPageTableLib: qualify page table accesses as volatile Zhou Jianfeng
2024-02-23 11:59 ` Michael Brown
2024-02-23 15:12   ` Zhou, Jianfeng
2024-02-23 15:51     ` Michael Brown [this message]
2024-02-25 13:47       ` Laszlo Ersek
  -- strict thread matches above, loose matches on Subject: below --
2024-03-01  2:54 Zhou Jianfeng
2024-03-01 11:50 ` Michael Brown
2024-03-01 12:21 ` Laszlo Ersek
2024-03-01 18:56 ` Laszlo Ersek

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