From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from walk.intel-email.com (walk.intel-email.com [101.227.64.242]) by mx.groups.io with SMTP id smtpd.web10.5740.1664240127060025402 for ; Mon, 26 Sep 2022 17:55:29 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@byosoft.com.cn header.s=cloud-union header.b=AwUpoXXM; spf=pass (domain: byosoft.com.cn, ip: 101.227.64.242, mailfrom: gaoliming@byosoft.com.cn) Received: from walk.intel-email.com (localhost [127.0.0.1]) by walk.intel-email.com (Postfix) with ESMTP id 2B062CD1F7FE for ; Tue, 27 Sep 2022 08:55:24 +0800 (CST) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=byosoft.com.cn; s=cloud-union; t=1664240124; bh=Y9soYp5rFLxWtx1lGSpQogx8UNaJp+Wsih76SRqJlWM=; h=From:To:Cc:References:In-Reply-To:Subject:Date; b=AwUpoXXM+yDqFeO+AD7zMfEii//pXXWwZt5mWydmY99iDEUHdmSx/B3yZ3/PpAHEC cm2aOWvFHciiWFZ/EKZeWbwKGutpvssCjJxLcoJwPXkuHTab/ioovwm7uIxYYqXzK+ PFIrE/bmP+MgzBeOKnNEcRbU74zsI2jvbG6oU2hs= Received: from localhost (localhost [127.0.0.1]) by walk.intel-email.com (Postfix) with ESMTP id 26019CD1F7FB for ; Tue, 27 Sep 2022 08:55:24 +0800 (CST) Received: from walk.intel-email.com (localhost [127.0.0.1]) by walk.intel-email.com (Postfix) with ESMTP id D6406CD1F7F4 for ; Tue, 27 Sep 2022 08:55:23 +0800 (CST) Authentication-Results: walk.intel-email.com; none Received: from mail.byosoft.com.cn (mail.byosoft.com.cn [58.240.74.242]) by walk.intel-email.com (Postfix) with SMTP id 4E32ECD1F7DF for ; Tue, 27 Sep 2022 08:55:20 +0800 (CST) Received: from DESKTOPS6D0PVI ([58.246.60.130]) (envelope-sender ) by 192.168.6.13 with ESMTP for ; Tue, 27 Sep 2022 08:55:18 +0800 X-WM-Sender: gaoliming@byosoft.com.cn X-Originating-IP: 58.246.60.130 X-WM-AuthFlag: YES X-WM-AuthUser: gaoliming@byosoft.com.cn From: "gaoliming" To: , , "'chao li'" Cc: "'Liu, Zhiguang'" References: <2FEFCC0C-E036-4A96-88F3-7A6236E9606F@getmailspring.com> In-Reply-To: Subject: =?UTF-8?B?5Zue5aSNOiBbZWRrMi1kZXZlbF0gW1BBVENIIHYyIDIyLzM0XSBNZGVQa2cvSW5jbHVkZTogTG9vbmdBcmNoIGRlZmluaXRpb25zLg==?= Date: Tue, 27 Sep 2022 08:55:19 +0800 Message-ID: <012401d8d20b$d09ad1b0$71d07510$@byosoft.com.cn> MIME-Version: 1.0 X-Mailer: Microsoft Outlook 16.0 Thread-Index: AQEDq4ytOLllMEWPBFIhKF5XzblBbwGwIgq5AjoGMLSvfW3dUA== Sender: "gaoliming" Content-Type: multipart/alternative; boundary="----=_NextPart_000_0125_01D8D24E.DEC62800" Content-Language: zh-cn ------=_NextPart_000_0125_01D8D24E.DEC62800 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Mike: The comment =E2=80=9CFor coding convenience, define the maximum valid Loon= Arch interrupt.=E2=80=9D is also defined in UEFI2.10 spec 18.2.5 EFI_DEBUG_= SUPPORT_PROTOCOL.RegisterExceptionCallback(). =20 So, I think it is fine to keep this comment in MdePkg Include header file= .=20 =20 Thanks Liming =E5=8F=91=E4=BB=B6=E4=BA=BA: devel@edk2.groups.io = =E4=BB=A3=E8=A1=A8 Michael D Kinney =E5=8F=91=E9=80=81=E6=97=B6=E9=97=B4: 2022=E5=B9=B49=E6=9C=8824=E6=97=A5 23= :08 =E6=94=B6=E4=BB=B6=E4=BA=BA: chao li ; Kinney, Michael = D =E6=8A=84=E9=80=81: "\"devel@edk2.groups.io\"" ; Gao,= Liming ; Liu, Zhiguang =E4=B8=BB=E9=A2=98: Re: [edk2-devel] [PATCH v2 22/34] MdePkg/Include: Loong= Arch definitions. =20 I am referring to this code comment. =20 > +// >=20 > +// For coding convenience, define the maximum valid >=20 > +// LoongArch interrupt. >=20 > +// >=20 > +#define MAX_LOONGARCH_INTERRUPT 14 =20 Mike =20 =20 From: chao li >=20 Sent: Friday, September 23, 2022 7:46 PM To: Kinney, Michael D > Cc: "\"devel@edk2.groups.io\"" >; Gao, Liming >; Liu, Zhiguang > Subject: Re: [edk2-devel] [PATCH v2 22/34] MdePkg/Include: LoongArch defini= tions. =20 Mike, Do you mean patches 0001 and 0002? If yes, I have tried removing both the t= wo patches, but the Azure CI always produces the ECC errors, I have no idea= how to fix them, so modify the CI YAM file to fix them, and Liming also re= commends this way. =20 Thanks, Chao -------- On 9=E6=9C=88 24 2022, at 10:33 =E4=B8=8A=E5=8D=88, "Kinney, Michael D" > wrote: =20 If it is in spec, then the comment about =E2=80=9Ccoding convenience=E2=80= =9D is not required. =20 =20 =20 Mike =20 =20 =20 From: chao li > Sent: Friday, September 23, 2022 7:17 PM To: Kinney, Michael D > Cc: "devel@edk2.groups.io " >; Gao, Liming >; Liu, Zhiguang > Subject: Re: [edk2-devel] [PATCH v2 22/34] MdePkg/Include: LoongArch defini= tions. =20 =20 Hi Mkie, I responded to your comment below. =20 =20 =20 Thanks, Chao -------- On 9=E6=9C=88 23 2022, at 11:46 =E6=99=9A=E4=B8=8A, "Kinney, Michael D" > wrote: One comment below. =20 =20 Mike =20 =20 > -----Original Message----- > From: devel@edk2.groups.io > On Behalf Of Chao Li > Sent: Wednesday, September 14, 2022 2:41 AM > To: devel@edk2.groups.io =20 > Cc: Kinney, Michael D >; Gao, Liming >; Liu, Zhiguang > > Subject: [edk2-devel] [PATCH v2 22/34] MdePkg/Include: LoongArch definiti= ons. >=20 > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4053 >=20 > Add LoongArch processor related definitions. >=20 > For the Http boot and PXE boot types seeing this URL section "Processor > Architecture Type" for the LOONGARCH values: > https://www.iana.org/assignments/dhcpv6-parameters/dhcpv6-parameters.xhtm= l >=20 > For definitions of PE/COFF and LOONGARCH relocation types, see the > "Machine Types" and "Basic Relocation Types" sections of this URL for > LOONGARCH values: > https://docs.microsoft.com/en-us/windows/win32/debug/pe-format >=20 > For the register definitions of exceptions context, see the UEFI V2.10 > 18.2.2, 18.2.4 and 18.2.5 sections of this URL for LOONGARCH > definitions: > https://uefi.org/specs/UEFI/2.10/18_Protocols_Debugger_Support.html >=20 > Cc: Michael D Kinney > > Cc: Liming Gao > > Cc: Zhiguang Liu = > >=20 > Signed-off-by: Chao Li > > --- > MdePkg/Include/IndustryStandard/PeImage.h | 9 ++ > MdePkg/Include/Protocol/DebugSupport.h | 107 ++++++++++++++++++++-- > MdePkg/Include/Protocol/PxeBaseCode.h | 3 + > MdePkg/Include/Uefi/UefiBaseType.h | 14 +++ > MdePkg/Include/Uefi/UefiSpec.h | 16 ++-- > 5 files changed, 136 insertions(+), 13 deletions(-) >=20 > diff --git a/MdePkg/Include/IndustryStandard/PeImage.h b/MdePkg/Include/I= ndustryStandard/PeImage.h > index 3109dc20f8..dd4cc25483 100644 > --- a/MdePkg/Include/IndustryStandard/PeImage.h > +++ b/MdePkg/Include/IndustryStandard/PeImage.h > @@ -10,6 +10,7 @@ > Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
>=20 > Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
>=20 > Portions Copyright (c) 2016 - 2020, Hewlett Packard Enterprise Developmen= t LP. All rights reserved.
>=20 > +Portions Copyright (c) 2022, Loongson Technology Corporation Limited. Al= l rights reserved.
>=20 >=20 >=20 > SPDX-License-Identifier: BSD-2-Clause-Patent >=20 >=20 >=20 > @@ -38,6 +39,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent > #define IMAGE_FILE_MACHINE_RISCV32 0x5032 >=20 > #define IMAGE_FILE_MACHINE_RISCV64 0x5064 >=20 > #define IMAGE_FILE_MACHINE_RISCV128 0x5128 >=20 > +#define IMAGE_FILE_MACHINE_LOONGARCH32 0x6232 >=20 > +#define IMAGE_FILE_MACHINE_LOONGARCH64 0x6264 >=20 >=20 >=20 > // >=20 > // EXE file formats >=20 > @@ -503,6 +506,12 @@ typedef struct { > #define EFI_IMAGE_REL_BASED_RISCV_LOW12I 7 >=20 > #define EFI_IMAGE_REL_BASED_RISCV_LOW12S 8 >=20 >=20 >=20 > +// >=20 > +// Relocation types of LoongArch processor. >=20 > +// >=20 > +#define EFI_IMAGE_REL_BASED_LOONGARCH32_MARK_LA 8 >=20 > +#define EFI_IMAGE_REL_BASED_LOONGARCH64_MARK_LA 8 >=20 > + >=20 > /// >=20 > /// Line number format. >=20 > /// >=20 > diff --git a/MdePkg/Include/Protocol/DebugSupport.h b/MdePkg/Include/Prot= ocol/DebugSupport.h > index ec5b92a5c5..2b0ae2d157 100644 > --- a/MdePkg/Include/Protocol/DebugSupport.h > +++ b/MdePkg/Include/Protocol/DebugSupport.h > @@ -654,17 +654,110 @@ typedef struct { > UINT64 X31; >=20 > } EFI_SYSTEM_CONTEXT_RISCV64; >=20 >=20 >=20 > +// >=20 > +// LoongArch processor exception types. >=20 > +// >=20 > +#define EXCEPT_LOONGARCH_INT 0 >=20 > +#define EXCEPT_LOONGARCH_PIL 1 >=20 > +#define EXCEPT_LOONGARCH_PIS 2 >=20 > +#define EXCEPT_LOONGARCH_PIF 3 >=20 > +#define EXCEPT_LOONGARCH_PME 4 >=20 > +#define EXCEPT_LOONGARCH_PNR 5 >=20 > +#define EXCEPT_LOONGARCH_PNX 6 >=20 > +#define EXCEPT_LOONGARCH_PPI 7 >=20 > +#define EXCEPT_LOONGARCH_ADE 8 >=20 > +#define EXCEPT_LOONGARCH_ALE 9 >=20 > +#define EXCEPT_LOONGARCH_BCE 10 >=20 > +#define EXCEPT_LOONGARCH_SYS 11 >=20 > +#define EXCEPT_LOONGARCH_BRK 12 >=20 > +#define EXCEPT_LOONGARCH_INE 13 >=20 > +#define EXCEPT_LOONGARCH_IPE 14 >=20 > +#define EXCEPT_LOONGARCH_FPD 15 >=20 > +#define EXCEPT_LOONGARCH_SXD 16 >=20 > +#define EXCEPT_LOONGARCH_ASXD 17 >=20 > +#define EXCEPT_LOONGARCH_FPE 18 >=20 > +#define EXCEPT_LOONGARCH_TBR 64 // For code only, there is no such type = in the ISA spec, the TLB refill is defined for an > independent exception. >=20 > + >=20 > +// >=20 > +// LoongArch processor Interrupt types. >=20 > +// >=20 > +#define EXCEPT_LOONGARCH_INT_SIP0 0 >=20 > +#define EXCEPT_LOONGARCH_INT_SIP1 1 >=20 > +#define EXCEPT_LOONGARCH_INT_IP0 2 >=20 > +#define EXCEPT_LOONGARCH_INT_IP1 3 >=20 > +#define EXCEPT_LOONGARCH_INT_IP2 4 >=20 > +#define EXCEPT_LOONGARCH_INT_IP3 5 >=20 > +#define EXCEPT_LOONGARCH_INT_IP4 6 >=20 > +#define EXCEPT_LOONGARCH_INT_IP5 7 >=20 > +#define EXCEPT_LOONGARCH_INT_IP6 8 >=20 > +#define EXCEPT_LOONGARCH_INT_IP7 9 >=20 > +#define EXCEPT_LOONGARCH_INT_PMC 10 >=20 > +#define EXCEPT_LOONGARCH_INT_TIMER 11 >=20 > +#define EXCEPT_LOONGARCH_INT_IPI 12 >=20 > + >=20 > +// >=20 > +// For coding convenience, define the maximum valid >=20 > +// LoongArch interrupt. >=20 > +// >=20 > +#define MAX_LOONGARCH_INTERRUPT 14 =20 =20 Should this define be moved into the libs/modules that uses this define? Prefer to only see definitions from specs in this file. Chao Li: Yes, this macro is defined in the UEFI Spec V2.10 section 18.2.5. If you insist on your opinion, I can remove it in this file. So what's your= opinion now? =20 =20 >=20 > + >=20 > +typedef struct { >=20 > + UINT64 R0; >=20 > + UINT64 R1; >=20 > + UINT64 R2; >=20 > + UINT64 R3; >=20 > + UINT64 R4; >=20 > + UINT64 R5; >=20 > + UINT64 R6; >=20 > + UINT64 R7; >=20 > + UINT64 R8; >=20 > + UINT64 R9; >=20 > + UINT64 R10; >=20 > + UINT64 R11; >=20 > + UINT64 R12; >=20 > + UINT64 R13; >=20 > + UINT64 R14; >=20 > + UINT64 R15; >=20 > + UINT64 R16; >=20 > + UINT64 R17; >=20 > + UINT64 R18; >=20 > + UINT64 R19; >=20 > + UINT64 R20; >=20 > + UINT64 R21; >=20 > + UINT64 R22; >=20 > + UINT64 R23; >=20 > + UINT64 R24; >=20 > + UINT64 R25; >=20 > + UINT64 R26; >=20 > + UINT64 R27; >=20 > + UINT64 R28; >=20 > + UINT64 R29; >=20 > + UINT64 R30; >=20 > + UINT64 R31; >=20 > + >=20 > + UINT64 CRMD; // CuRrent MoDe information >=20 > + UINT64 PRMD; // PRe-exception MoDe information >=20 > + UINT64 EUEN; // Extended component Unit ENable >=20 > + UINT64 MISC; // MISCellaneous controller >=20 > + UINT64 ECFG; // Exception ConFiGuration >=20 > + UINT64 ESTAT; // Exception STATus >=20 > + UINT64 ERA; // Exception Return Address >=20 > + UINT64 BADV; // BAD Virtual address >=20 > + UINT64 BADI; // BAD Instruction >=20 > +} EFI_SYSTEM_CONTEXT_LOONGARCH64; >=20 > + >=20 > /// >=20 > /// Universal EFI_SYSTEM_CONTEXT definition. >=20 > /// >=20 > typedef union { >=20 > - EFI_SYSTEM_CONTEXT_EBC *SystemContextEbc; >=20 > - EFI_SYSTEM_CONTEXT_IA32 *SystemContextIa32; >=20 > - EFI_SYSTEM_CONTEXT_X64 *SystemContextX64; >=20 > - EFI_SYSTEM_CONTEXT_IPF *SystemContextIpf; >=20 > - EFI_SYSTEM_CONTEXT_ARM *SystemContextArm; >=20 > - EFI_SYSTEM_CONTEXT_AARCH64 *SystemContextAArch64; >=20 > - EFI_SYSTEM_CONTEXT_RISCV64 *SystemContextRiscV64; >=20 > + EFI_SYSTEM_CONTEXT_EBC *SystemContextEbc; >=20 > + EFI_SYSTEM_CONTEXT_IA32 *SystemContextIa32; >=20 > + EFI_SYSTEM_CONTEXT_X64 *SystemContextX64; >=20 > + EFI_SYSTEM_CONTEXT_IPF *SystemContextIpf; >=20 > + EFI_SYSTEM_CONTEXT_ARM *SystemContextArm; >=20 > + EFI_SYSTEM_CONTEXT_AARCH64 *SystemContextAArch64; >=20 > + EFI_SYSTEM_CONTEXT_RISCV64 *SystemContextRiscV64; >=20 > + EFI_SYSTEM_CONTEXT_LOONGARCH64 *SystemContextLoongArch64; >=20 > } EFI_SYSTEM_CONTEXT; >=20 >=20 >=20 > // >=20 > diff --git a/MdePkg/Include/Protocol/PxeBaseCode.h b/MdePkg/Include/Proto= col/PxeBaseCode.h > index 11872d602d..6787941a5d 100644 > --- a/MdePkg/Include/Protocol/PxeBaseCode.h > +++ b/MdePkg/Include/Protocol/PxeBaseCode.h > @@ -4,6 +4,7 @@ >=20 >=20 > Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
>=20 > Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights= reserved.
>=20 > +Copyright (c) 2022, Loongson Technology Corporation Limited. All rights = reserved.
>=20 >=20 >=20 > SPDX-License-Identifier: BSD-2-Clause-Patent >=20 >=20 >=20 > @@ -158,6 +159,8 @@ typedef UINT16 EFI_PXE_BASE_CODE_UDP_PORT; > #define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x000B >=20 > #elif defined (MDE_CPU_RISCV64) >=20 > #define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x001B >=20 > +#elif defined (MDE_CPU_LOONGARCH64) >=20 > +#define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x0027 >=20 > #endif >=20 >=20 >=20 > /// >=20 > diff --git a/MdePkg/Include/Uefi/UefiBaseType.h b/MdePkg/Include/Uefi/Uef= iBaseType.h > index 4a34ce8e25..83975a08eb 100644 > --- a/MdePkg/Include/Uefi/UefiBaseType.h > +++ b/MdePkg/Include/Uefi/UefiBaseType.h > @@ -4,6 +4,7 @@ > Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.
>=20 > Portions copyright (c) 2011 - 2016, ARM Ltd. All rights reserved.
>=20 > Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights= reserved.
>=20 > +Copyright (c) 2022, Loongson Technology Corporation Limited. All rights = reserved.
>=20 >=20 >=20 > SPDX-License-Identifier: BSD-2-Clause-Patent >=20 >=20 >=20 > @@ -246,6 +247,12 @@ typedef union { > #define EFI_IMAGE_MACHINE_RISCV64 0x5064 >=20 > #define EFI_IMAGE_MACHINE_RISCV128 0x5128 >=20 >=20 >=20 > +/// >=20 > +/// PE32+ Machine type for LoongArch 32/64 images. >=20 > +/// >=20 > +#define EFI_IMAGE_MACHINE_LOONGARCH32 0x6232 >=20 > +#define EFI_IMAGE_MACHINE_LOONGARCH64 0x6264 >=20 > + >=20 > #if !defined (EFI_IMAGE_MACHINE_TYPE_VALUE) && !defined (EFI_IMAGE_MACHIN= E_CROSS_TYPE_VALUE) >=20 > #if defined (MDE_CPU_IA32) >=20 >=20 >=20 > @@ -278,6 +285,13 @@ typedef union { > #define EFI_IMAGE_MACHINE_TYPE_SUPPORTED(Machine) \ >=20 > ((Machine) =3D=3D EFI_IMAGE_MACHINE_RISCV64) >=20 >=20 >=20 > +#define EFI_IMAGE_MACHINE_CROSS_TYPE_SUPPORTED(Machine) (FALSE) >=20 > + >=20 > + #elif defined (MDE_CPU_LOONGARCH64) >=20 > + >=20 > +#define EFI_IMAGE_MACHINE_TYPE_SUPPORTED(Machine) \ >=20 > + ((Machine) =3D=3D EFI_IMAGE_MACHINE_LOONGARCH64) >=20 > + >=20 > #define EFI_IMAGE_MACHINE_CROSS_TYPE_SUPPORTED(Machine) (FALSE) >=20 >=20 >=20 > #elif defined (MDE_CPU_EBC) >=20 > diff --git a/MdePkg/Include/Uefi/UefiSpec.h b/MdePkg/Include/Uefi/UefiSpe= c.h > index 2b38b100f6..3abebbb8d9 100644 > --- a/MdePkg/Include/Uefi/UefiSpec.h > +++ b/MdePkg/Include/Uefi/UefiSpec.h > @@ -7,6 +7,7 @@ >=20 >=20 > Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.
>=20 > Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. A= ll rights reserved.
>=20 > +Copyright (c) 2022, Loongson Technology Corporation Limited. All rights = reserved.
>=20 >=20 >=20 > SPDX-License-Identifier: BSD-2-Clause-Patent >=20 >=20 >=20 > @@ -2195,12 +2196,13 @@ typedef struct { > // >=20 > // EFI File location to boot from on removable media devices >=20 > // >=20 > -#define EFI_REMOVABLE_MEDIA_FILE_NAME_IA32 L"\\EFI\\BOOT\\BOOTIA32.EFI <= file://EFI/BOOT/BOOTIA32.EFI> " >=20 > -#define EFI_REMOVABLE_MEDIA_FILE_NAME_IA64 L"\\EFI\\BOOT\\BOOTIA64.EFI <= file://EFI/BOOT/BOOTIA64.EFI> " >=20 > -#define EFI_REMOVABLE_MEDIA_FILE_NAME_X64 L"\\EFI\\BOOT\\BOOTX64.EFI " >=20 > -#define EFI_REMOVABLE_MEDIA_FILE_NAME_ARM L"\\EFI\\BOOT\\BOOTARM.EFI " >=20 > -#define EFI_REMOVABLE_MEDIA_FILE_NAME_AARCH64 L"\\EFI\\BOOT\\BOOTAA64.EF= I " >=20 > -#define EFI_REMOVABLE_MEDIA_FILE_NAME_RISCV64 L"\\EFI\\BOOT\\BOOTRISCV64= .EFI " >=20 > +#define EFI_REMOVABLE_MEDIA_FILE_NAME_IA32 L"\\EFI\\BOOT\\BOOTIA32.EFI <= file://EFI/BOOT/BOOTIA32.EFI> " >=20 > +#define EFI_REMOVABLE_MEDIA_FILE_NAME_IA64 L"\\EFI\\BOOT\\BOOTIA64.EFI <= file://EFI/BOOT/BOOTIA64.EFI> " >=20 > +#define EFI_REMOVABLE_MEDIA_FILE_NAME_X64 L"\\EFI\\BOOT\\BOOTX64.EFI " >=20 > +#define EFI_REMOVABLE_MEDIA_FILE_NAME_ARM L"\\EFI\\BOOT\\BOOTARM.EFI " >=20 > +#define EFI_REMOVABLE_MEDIA_FILE_NAME_AARCH64 L"\\EFI\\BOOT\\BOOTAA64.EF= I " >=20 > +#define EFI_REMOVABLE_MEDIA_FILE_NAME_RISCV64 L"\\EFI\\BOOT\\BOOTRISCV64= .EFI " >=20 > +#define EFI_REMOVABLE_MEDIA_FILE_NAME_LOONGARCH64 L"\\EFI\\BOOT\\BOOTLOO= NGARCH64.EFI " >=20 >=20 >=20 > #if !defined (EFI_REMOVABLE_MEDIA_FILE_NAME) >=20 > #if defined (MDE_CPU_IA32) >=20 > @@ -2214,6 +2216,8 @@ typedef struct { > #define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_AARCH= 64 >=20 > #elif defined (MDE_CPU_RISCV64) >=20 > #define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_RISCV= 64 >=20 > + #elif defined (MDE_CPU_LOONGARCH64) >=20 > +#define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_LOON= GARCH64 >=20 > #else >=20 > #error Unknown Processor Type >=20 > #endif >=20 > -- > 2.27.0 >=20 >=20 >=20 > -=3D-=3D-=3D-=3D-=3D-=3D > Groups.io Links: You receive all messages sent to this group. > View/Reply Online (#93766): https://edk2.groups.io/g/devel/message/93766 > Mute This Topic: https://groups.io/mt/93674237/1643496 > Group Owner: devel+owner@edk2.groups.io =20 > Unsubscribe: https://edk2.groups.io/g/devel/unsub [michael.d.kinney@intel= .com] > -=3D-=3D-=3D-=3D-=3D-=3D >=20 ------=_NextPart_000_0125_01D8D24E.DEC62800 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable

Mike:

=C2=A0T= he comment =E2=80=9CFor coding convenience, defin= e the maximum valid LoonArch interrupt.=E2=80=9D is also defined in UEFI2.1= 0 spec 18.2.5 EFI_DEBUG_SUPPORT_PROTOCOL.RegisterExceptionCallback().

=C2=A0

=

=C2=A0=C2=A0So, I think it is fine to keep this comm= ent in MdePkg Include header file.

 

Thanks

Liming

<= p class=3DMsoNormal>=E5= =8F=91=E4=BB=B6=E4=BA=BA: devel@edk2.groups.io <de= vel@edk2.groups.io> =E4=BB=A3=E8=A1=A8 Michael D Kinney
=E5=8F=91=E9=80=81=E6=97=B6=E9=97=B4: 2022=E5=B9= =B49=E6=9C=8824=E6=97= =A5 23:08
=E6=94=B6=E4=BB=B6=E4=BA=BA: chao li <lichao@loongson.cn= >; Kinney, Michael D <michael.d.kinney@intel.com>
=E6= =8A=84=E9=80=81: "\&q= uot;devel@edk2.groups.io\"" <devel@edk2.groups.io>; Gao, Li= ming <gaoliming@byosoft.com.cn>; Liu, Zhiguang <zhiguang.liu@intel= .com>
=E4=B8=BB=E9=A2=98: Re: [edk2-devel] [PATCH v2 22/34] MdePkg/Include: LoongArch= definitions.

=  

I am referring to this code comment.

 

> +//

> +// For coding convenience, define the maximum val= id

> <= o:p>

> +// Loong= Arch interrupt.

&= gt; +//

>&n= bsp;

> +#de= fine MAX_LOONGARCH_INTERRUPT 14

<= span lang=3DEN-US> 

Mike

 

=  

From: chao li <lichao@loongson.cn>
Sent: Friday, = September 23, 2022 7:46 PM
To: Kinney, Michael D <michael.d.kinney@intel.com>
= Cc: "\"devel@edk2.gr= oups.io\"" <devel@= edk2.groups.io>; Gao, Liming <gaoliming@byosoft.com.cn>; Liu, Zhiguang <zhiguang.liu@intel.com>
Subject: Re: [edk2-devel] [PATCH v2 22/34] MdePkg/Include: LoongArch definitions.=

<= o:p> 

Mik= e,

= Do you mean patches 0001 and 0002? If yes, I have tried removing both the t= wo patches, but the Azure CI always produces the ECC errors, I have no idea= how to fix them, so modify the CI YAM file to fix them, and Liming also re= commends this way.

 


Thanks,
C= hao
--------

On 9=E6=9C=88 24 2022, at 10:33 =E4=B8=8A=E5=8D=88, "Kinney, = Michael D" <michael.d= .kinney@intel.com> wrote:

    

If it is in spec, then the comment= about =E2=80=9Ccoding convenience=E2=80=9D is not required.

 

 =

 <= /p>

Mike

<= /div>

 

 

 

=

From: chao li <lichao@loongson.= cn>

Sent: Friday, September 23, 2022 7:17 PM=

To: Kinney, Michael D <= michael.d.kinney@intel.com>

<= span lang=3DEN-US style=3D'font-family:"Calibri",sans-serif'>Subject: Re: [edk2-devel] [PATCH v2 22/34] MdePkg= /Include: LoongArch definitions.

 

 

=

Hi Mkie,

I respon= ded to your comment below.

 

 

 

Thanks,

Chao

--------

On 9<= /span>=E6=9C=88 23 2022, at 11:46

One comment be= low.

 

 

Mike

 

=  

> -----Original Message-----

=

> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behal= f Of Chao Li

> Sent: Wednesday, September 14, 2022 2:41 AM<= /o:p>

> Cc: Kinney, Michael D = <michael.d.kinney@intel.com>; Gao, Liming <gaoliming@byosoft.com.cn>; Liu, Zhiguang <zhiguang.= liu@intel.com>

> Subject: [edk2-devel] [PATCH v2 22/34]= MdePkg/Include: LoongArch definitions.

=

> A= dd LoongArch processor related definitions.

>= For the Http boot and PXE boot types seeing this URL section "Process= or

> Architecture Type" for the LOONGARCH values:

> For definitio= ns of PE/COFF and LOONGARCH relocation types, see the

=

> "Ma= chine Types" and "Basic Relocation Types" sections of this U= RL for

> LOONGARCH values:

<= div>

> Fo= r the register definitions of exceptions context, see the UEFI V2.10

> 18.2.2, 18.2.4 and 18.2.5 sections of this URL for LOONGARCH

> definitions:

=

> Cc: Mi= chael D Kinney <michael.d.kinney@intel.com>

> Cc: Liming Gao <gaoliming@byosoft.com.cn><= /o:p>

> Cc: Zhiguang Liu <zhiguang.liu@intel.com>

= > 

= > Signed-off-by: Chao Li <lichao@loongson.cn>= ;

> ---

> MdePkg/Include/IndustryStandard/PeImage.h |= 9 ++

> MdePkg/Include/Protocol/DebugSupport.h | 107 +++++++++++= +++++++++--

> MdePkg/Include/Protocol/PxeBaseCode.h | 3 +

> MdePkg/Include/Uefi/UefiBaseType.h | 14 +++

> MdePkg/Incl= ude/Uefi/UefiSpec.h | 16 ++--

> 5 files changed, 136 insertions(= +), 13 deletions(-)

> diff --git a/MdePkg/Inc= lude/IndustryStandard/PeImage.h b/MdePkg/Include/IndustryStandard/PeImage.h=

> index 3109dc20f8..dd4cc25483 100644

> --- a/MdePkg= /Include/IndustryStandard/PeImage.h

<= div>

> +++ b/MdePkg/Include/Indus= tryStandard/PeImage.h

> @@ -10,6 +10,7 @@

> Copyrig= ht (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR><= /o:p>

> Portions copyright (c) 2008 - 2009, Apple Inc. A= ll rights reserved.<BR>

> Portions Copy= right (c) 2016 - 2020, Hewlett Packard Enterprise Development LP. All right= s reserved.<BR>

> +Portions Copyright= (c) 2022, Loongson Technology Corporation Limited. All rights reserved.<= ;BR>

=

&g= t; SPDX-License-Identifier: BSD-2-Clause-Patent

=

= > 

=

> @@ -38,6 +39,8 @@ SPDX-License-I= dentifier: BSD-2-Clause-Patent

<= p class=3DMsoNormal>> #define IMAGE_FILE_MACHINE_RISC= V32 0x5032

=

> #define IMAGE_FILE_MACHINE_RISCV= 64 0x5064

<= span lang=3DEN-US>> 

> #define IMAGE_FILE_MACHINE_RISCV1= 28 0x5128

<= span lang=3DEN-US>> 

> +#define IMAGE_FILE_MACHINE_LOONG= ARCH32 0x6232

> +#define IMAGE_FILE_MACHINE_L= OONGARCH64 0x6264

=

> <= o:p>

> //

<= div>

> // EXE file formats

> @@ -503,6 +506,12 @@ typedef struct {<= /span>

>= ; #define EFI_IMAGE_REL_BASED_RISCV_LOW12I 7

<= /span>

>= ; #define EFI_IMAGE_REL_BASED_RISCV_LOW12S 8

<= /span>

>= ; 

> +//

>= +// Relocation types of LoongArch processor.

=

&g= t; +//

> +#define EFI_IMAGE_REL_BASED_LOONGAR= CH32_MARK_LA 8

> +#define EFI_IMAGE_REL_BASED= _LOONGARCH64_MARK_LA 8

> +=

> = ;

> ///

> /// Line number format.<= o:p>

> ///

=

> diff -= -git a/MdePkg/Include/Protocol/DebugSupport.h b/MdePkg/Include/Protocol/Deb= ugSupport.h

> index ec5b92a5c5..2b0ae2d157 100644

> -= -- a/MdePkg/Include/Protocol/DebugSupport.h

> +++ b/MdePkg/Inclu= de/Protocol/DebugSupport.h

> @@ -654,17 +654,110 @@ typedef stru= ct {

> UINT64 X31;

> } EFI_SYSTEM_= CONTEXT_RISCV64;

<= div>

> +//

=

> +// LoongArch processor e= xception types.

> +//

=

> +#define EXCEPT_LOONGARCH_INT 0

<= div>

> +#= define EXCEPT_LOONGARCH_PIL 1

> +#define EXCE= PT_LOONGARCH_PIS 2

> +#define EXCEPT_LOONGARC= H_PIF 3

> +#define EXCEPT_LOONGARCH_PME 4

> +#define EXCEPT_LOONGARCH_PNR 5

>&n= bsp;

> +#define EXCEPT_LOONGARCH_PNX 6

> +#define EXCEPT_LOONGARCH_PPI 7

=

> +#de= fine EXCEPT_LOONGARCH_ADE 8

<= /div>

> +#define EXCEPT= _LOONGARCH_ALE 9

<= div>

> +#define EXCEPT_LOONGARCH_= BCE 10

> +#define EXCEPT_LOONGARCH_SYS 11

> +#define EXCEPT_LOONGARCH_BRK 12

>&= nbsp;

> +#define EXCEPT_LOONGARCH_INE 13

=

> +#define EXCEPT_LOONGARCH_IPE 14

=

> += #define EXCEPT_LOONGARCH_FPD 15

=

> +#define EX= CEPT_LOONGARCH_SXD 16

> +#define EXCEPT_LOO= NGARCH_ASXD 17

> +#define EXCEPT_LOONGARCH_FP= E 18

> +#define EXCEPT_LOONGARCH_TBR 64 // Fo= r code only, there is no such type in the ISA spec, the TLB refill is defin= ed for an

<= span lang=3DEN-US>> independent exception.

=

&g= t; +

> +//

<= div>

> +/= / LoongArch processor Interrupt types.

=

> +//<= o:p>

> +#define EXCEPT_LOONGARCH_INT_SIP0 0<= /o:p>

> +#define EXCEPT_LOONGARCH_INT_SIP1 1<= /span>

>= ; 

> +#define EXCEPT_LOONGARCH_INT_IP0 2<= /p>

> =

> +#define EXCEPT_LOONGARCH_INT_IP1 3

> +#define EXCEPT_LOONGARCH_INT_IP2 4

> = +#define EXCEPT_LOONGARCH_INT_IP3 5

<= div>

> +#defin= e EXCEPT_LOONGARCH_INT_IP4 6

=

> +#define EXCEP= T_LOONGARCH_INT_IP5 7

> +#define EXCEPT_LOO= NGARCH_INT_IP6 8

<= div>

> +#define EXCEPT_LOONGARCH_= INT_IP7 9

<= span lang=3DEN-US>> 

> +#define EXCEPT_LOONGARCH_INT_PMC= 10

> +#define EXCEPT_LOONGARCH_INT_TIMER 11=

> +#define EXCEPT_LOONGARCH_INT_IPI 12<= /o:p>

> +

=

> +//=

&g= t; 

> +// For coding convenience, define the maximum valid<= o:p>

> +// LoongArch interrupt.=

> = ;

> +//

> +#define MAX_LOONGARCH_I= NTERRUPT 14

 

 

Should this define be moved into the libs/modules that use= s

this define? Prefer to only see definitions from specs in

this file.

<= div>

Chao Li: Yes, this macro is defined in the UEFI Spec V= 2.10 section 18.2.5.

If you insist on your opinion, I can remove= it in this file. So what's your opinion now?

 

 

> +

=

> +typedef= struct {

<= span lang=3DEN-US>> 

> + UINT64 R0;

> + UINT64 R1;

> + UINT64 R2;

> + UINT64 R3;

=

> += UINT64 R4;

<= p class=3DMsoNormal>> + UINT64 R5;<= /p>

> =

> + UINT64 R6;

> + UINT64 R7;

> + UINT64 R8;

=

> += UINT64 R9;

<= p class=3DMsoNormal>> + UINT64 R10;=

> = ;

> + UINT64 R11;

=

> + UINT64 R12;<= o:p>

> + UINT64 R13;

<= /div>

&= gt; + UINT64 R14;

=

> + UINT64 R15;<= /span>

>= ; 

> + UINT64 R16;

=

> + UINT64= R17;

> + UINT64 R18;

=

> + UINT64 R19;

> + UINT64 R20;<= /o:p>

> + UINT64 R21;

<= div>

> + = UINT64 R22;

<= p class=3DMsoNormal>> + UINT64 R23;=

> = ;

> + UINT64 R24;

=

> + UINT64 R25;<= o:p>

> + UINT64 R26;

<= /div>

&= gt; + UINT64 R27;

=

> + UINT64 R28;<= /span>

>= ; 

> + UINT64 R29;

=

> + UINT64= R30;

> + UINT64 R31;

=

> +

=

> + UINT64 CRMD; // CuRrent MoDe i= nformation

=

> + UINT64 PRMD; // PRe-exception = MoDe information

<= div>

> + UINT64 EUEN; // Extended= component Unit ENable

> + UINT64 MISC; // M= ISCellaneous controller

> + UINT64 ECFG; // E= xception ConFiGuration

> + UINT64 ESTAT; // = Exception STATus

<= div>

> + UINT64 ERA; // Exception= Return Address

> + UINT64 BADV; // BAD Virtu= al address

=

> + UINT64 BADI; // BAD Instructio= n

> +} EFI_SYSTEM_CONTEXT_LOONGARCH64;

> +

<= /div>

> ///<= /span>

>= ; 

> /// Universal EFI_SYSTEM_CONTEXT definition.

&= gt; 

<= span lang=3DEN-US>> ///

> typedef union {<= o:p>

> - EFI_SYSTEM_CONTEXT_EBC *SystemContextEbc= ;

> - EFI_SYSTEM_CONTEXT_IA32 *SystemContextI= a32;

> - EFI_SYSTEM_CONTEXT_X64 *SystemContex= tX64;

> - EFI_SYSTEM_CONTEXT_IPF *SystemConte= xtIpf;

> - EFI_SYSTEM_CONTEXT_ARM *SystemCont= extArm;

> - EFI_SYSTEM_CONTEXT_AARCH64 *Syste= mContextAArch64;

<= div>

> - EFI_SYSTEM_CONTEXT_RISCV= 64 *SystemContextRiscV64;

> + EFI_SYSTEM_CONT= EXT_EBC *SystemContextEbc;

> + EFI_SYSTEM_CON= TEXT_IA32 *SystemContextIa32;

> + EFI_SYSTEM_= CONTEXT_X64 *SystemContextX64;

<= p class=3DMsoNormal>

> + EFI_SYSTEM= _CONTEXT_IPF *SystemContextIpf;

=

> + EFI_SYSTE= M_CONTEXT_ARM *SystemContextArm;

> + EFI_SYST= EM_CONTEXT_AARCH64 *SystemContextAArch64;

=

> += EFI_SYSTEM_CONTEXT_RISCV64 *SystemContextRiscV64;

<= /o:p>

> + EFI_SYSTEM_CONTEXT_LOONGARCH64 *SystemContextLoongArch64;

> } EFI_SYSTEM_CONTEXT;

<= /div>

&= gt; 

<= span lang=3DEN-US>> 

> //

<= /span>

>= ; diff --git a/MdePkg/Include/Protocol/PxeBaseCode.h b/MdePkg/Include/Proto= col/PxeBaseCode.h

> index 11872d602d..6787941a5d 100644

= > --- a/MdePkg/Include/Protocol/PxeBaseCode.h

> +++ b/MdePkg/= Include/Protocol/PxeBaseCode.h

<= p class=3DMsoNormal>> @@ -4,6 +4,7 @@

>&nb= sp;

> Copyright (c) 2006 - 2018, Intel Corpo= ration. All rights reserved.<BR>

=

> Copy= right (c) 2020, Hewlett Packard Enterprise Development LP. All rights reser= ved.<BR>

> +Copyright (c) 2022, Loongso= n Technology Corporation Limited. All rights reserved.<BR>=

&g= t; 

<= /div>

> SPDX-License-Id= entifier: BSD-2-Clause-Patent

> @@ -158,6 +159,8 @@ typedef UINT16 EFI_PXE_BASE_CO= DE_UDP_PORT;

> #define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x000B=

> #elif defined (MDE_CPU_RISCV64)=

&g= t; 

> #define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x001B

> +#elif defined (MDE_CPU_LOONGARCH64)

&= gt; 

<= span lang=3DEN-US>> +#define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x0027

> #endif

>&nbs= p;

> ///

<= div>

> di= ff --git a/MdePkg/Include/Uefi/UefiBaseType.h b/MdePkg/Include/Uefi/UefiBas= eType.h

> index 4a34ce8e25..83975a08eb 100644<= /p>

> --- a= /MdePkg/Include/Uefi/UefiBaseType.h

<= div>

> +++ b/MdePkg/Include/Uefi/= UefiBaseType.h

> @@ -4,6 +4,7 @@

> Copyright (c) 2006= - 2021, Intel Corporation. All rights reserved.<BR>

>&nbs= p;

> Portions copyright (c) 2011 - 2016, ARM Ltd. All rights res= erved.<BR>

<= div>

> Copyright (c) 2020, Hewlet= t Packard Enterprise Development LP. All rights reserved.<BR>

> +Copyright (c) 2022, Loongson Technology Corporati= on Limited. All rights reserved.<BR>

>&= nbsp;

> SPDX-License-Identifier: BSD-2-Clause= -Patent

=

&g= t; @@ -246,6 +247,12 @@ typedef union {

> #define EFI_IMAGE_MACH= INE_RISCV64 0x5064

> #define EFI_IMAGE_MACHIN= E_RISCV128 0x5128

=

> <= o:p>

> +///

> +/// PE32+ Machine type = for LoongArch 32/64 images.

<= /div>

> +///=

&g= t; 

> +#define EFI_IMAGE_MACHINE_LOONGARCH32 0x6232

> +#define EFI_IMAGE_MACHINE_LOONGARCH64 0x6264=

> +

> #if !defined = (EFI_IMAGE_MACHINE_TYPE_VALUE) && !defined (EFI_IMAGE_MACHINE_CROSS= _TYPE_VALUE)

=

> #if defined (MDE_CPU_IA32)

=

> @@ -278,= 6 +285,13 @@ typedef union {

> #define EFI_IMAGE_MACHINE_TYPE_SU= PPORTED(Machine) \

> ((Machine) =3D=3D EFI_IM= AGE_MACHINE_RISCV64)

>&nbs= p;

> +#define EFI_IMAGE_MACHINE_CROSS_TYPE_SUPPORTED(Machine) (F= ALSE)

> +

> + #= elif defined (MDE_CPU_LOONGARCH64)

=

> +

> +#define EFI_IMAGE_MACHINE_TYPE_SUPPORTED(Machine= ) \

> + ((Machine) =3D=3D EFI_IMAGE_MACHINE_= LOONGARCH64)

=

> +

<= /div>

&= gt; #define EFI_IMAGE_MACHINE_CROSS_TYPE_SUPPORTED(Machine) (FALSE)

<= p class=3DMsoNormal>

> #elif define= d (MDE_CPU_EBC)

> diff --git a/MdePkg/Include= /Uefi/UefiSpec.h b/MdePkg/Include/Uefi/UefiSpec.h

> index 2b38b1= 00f6..3abebbb8d9 100644

> --- a/MdePkg/Include/Uefi/UefiSpec.h

> +++ b/MdePkg/Include/Uefi/UefiSpec.h

> @@ -7,6 +7,= 7 @@

> Copyright (c) 2006 = - 2021, Intel Corporation. All rights reserved.<BR>=

> = ;

> Portions Copyright (c) 2020, Hewlett Packard Enterprise Deve= lopment LP. All rights reserved.<BR>

> = +Copyright (c) 2022, Loongson Technology Corporation Limited. All rights re= served.<BR>

=

> <= o:p>

> SPDX-License-Identifier: BSD-2-Clause-Patent

>&nbs= p;

> @@ -2195,12 +2196,1= 3 @@ typedef struct {

> //

> // = EFI File location to boot from on removable media devices=

> = ;

> //

=

> -#define EFI_REMOVABLE_ME= DIA_FILE_NAME_IA32 L"\\EFI\\B= OOT\\BOOTIA32.EFI"

<= /div>

> -#define EFI_RE= MOVABLE_MEDIA_FILE_NAME_IA64 L"\\EFI\\BOOT\\BOOTIA64.EFI"

<= /p>

> -#def= ine EFI_REMOVABLE_MEDIA_FILE_NAME_X64 L"\\EFI\\BOOT\\BOOTX64.EFI"

<= /span>

>= ; -#define EFI_REMOVABLE_MEDIA_FILE_NAME_ARM L"\\EFI\\BOOT\\BOOTARM.EFI"

=

> -#define EFI_REMOVABLE_MEDIA_FILE_NAME_AARCH64 L"\\EFI\\BOOT\\BOOTAA64.EFI"=

&g= t; 

> -#define EFI_REMOVABLE_MEDIA_FILE_NAME_RISCV64 L"= ;\\EFI\\BOOT\\BOOTRISCV64.EFI"

> +#define EFI_REMOVABLE_M= EDIA_FILE_NAME_IA64 L"\\EFI\\= BOOT\\BOOTIA64.EFI"

=

> +#define EFI_R= EMOVABLE_MEDIA_FILE_NAME_X64 L"\\EFI\\BOOT\\BOOTX64.EFI"

<= div>

> +#defin= e EFI_REMOVABLE_MEDIA_FILE_NAME_ARM L"\\EFI\\BOOT\\BOOTARM.EFI"

> = +#define EFI_REMOVABLE_MEDIA_FILE_NAME_AARCH64 L"\\EFI\\BOOT\\BOOTAA64.EFI"

> <= o:p>

> +#define EFI_REMOVABLE_MEDIA_FILE_NAME_RISCV64 L"\\EFI\\BOOT\\BOOTRISCV64.EFI"=

> +#define EFI_REMOVABLE_MEDIA_FILE_NAME_LOO= NGARCH64 L"\\EFI\\BOOT= \\BOOTLOONGARCH64.EFI"

=

<= /o:p>

> #if !defined (EFI_REMOVABLE_MEDIA_FILE_NAME)

> #if defined (MDE_CPU_IA32)

> <= o:p>

> @@ -2214,6 +2216,8 @@ typedef struct {

<= /div>

> #define E= FI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_AARCH64

= > 

= > #elif defined (MDE_CPU_RISCV64)

> <= o:p>

> #define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FIL= E_NAME_RISCV64

> + #elif defined (MDE_CPU_LOO= NGARCH64)

<= span lang=3DEN-US>> 

> +#define EFI_REMOVABLE_MEDIA_FILE= _NAME EFI_REMOVABLE_MEDIA_FILE_NAME_LOONGARCH64

=

= > #else

=

> #error Unknown Processor Type

> #endif

=

> --

> 2.27.0

<= div>

> -=3D-=3D-=3D-=3D-=3D-=3D

> Groups.io Links: You re= ceive all messages sent to this group.

> View/Reply Online (#937= 66): https://edk2.groups.io/g/devel/me= ssage/93766

<= div>

> Group Owner: devel+owner@edk2.groups.io

> Unsubscribe: https://edk2.groups.io/g/devel/unsub [michael.d.kinney@intel.= com]

> -=3D-=3D-=3D-=3D-=3D-=3D

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