From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from rn-mailsvcp-ppex-lapp44.apple.com (rn-mailsvcp-ppex-lapp44.apple.com [17.179.253.48]) by mx.groups.io with SMTP id smtpd.web10.39950.1638042344805372242 for ; Sat, 27 Nov 2021 11:45:44 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@apple.com header.s=20180706 header.b=HZhDVq0Z; spf=pass (domain: apple.com, ip: 17.179.253.48, mailfrom: afish@apple.com) Received: from pps.filterd (rn-mailsvcp-ppex-lapp44.rno.apple.com [127.0.0.1]) by rn-mailsvcp-ppex-lapp44.rno.apple.com (8.16.1.2/8.16.1.2) with SMTP id 1ARJdYhu011942; Sat, 27 Nov 2021 11:45:43 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=apple.com; h=content-type : mime-version : subject : from : in-reply-to : date : cc : content-transfer-encoding : message-id : references : to; s=20180706; bh=1QEa9IxrkYInl9a9jNIWiiitA50AW92n96eoKShUig4=; b=HZhDVq0Zw6b/WUiPhKaMl3+1NfeFYHjrm6iwartEgLsY1UrYpK6egCNbGJd46Q+waiAf IMF/toXsR1VLDvzpfB9rw3ZfeeqmY+qJtJrShRgE4raGbckGOZuoXbNOXpuuHH0Goy7L MNvDRpziu4Z/QQGiGObqnuqDibsLoMvQ+uFal0qBAqNRzyGXrgvURK2SebvC5WAXPO3v 3RNNzN90Jw7Wom6AUCk4SCk2fpsuxcoLXG5VPYBPNgxEhLngmKa/a7shSiHKt3Nr6II9 55Kla0+8yuPOCrwW1buLHm0N/XqdJE0YH+c88P2bW682UPRnN2A5LJMwv/uwCUWYtYQA Eg== Received: from ma-mailsvcp-mta-lapp01.corp.apple.com (ma-mailsvcp-mta-lapp01.corp.apple.com [10.226.18.133]) by rn-mailsvcp-ppex-lapp44.rno.apple.com with ESMTP id 3ckh2dx6mg-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NO); Sat, 27 Nov 2021 11:45:43 -0800 Received: from ma-mailsvcp-mmp-lapp01.apple.com (ma-mailsvcp-mmp-lapp01.apple.com [17.32.222.14]) by ma-mailsvcp-mta-lapp01.corp.apple.com (Oracle Communications Messaging Server 8.1.0.12.20210903 64bit (built Sep 3 2021)) with ESMTPS id <0R3800A22XK7QJ10@ma-mailsvcp-mta-lapp01.corp.apple.com>; Sat, 27 Nov 2021 11:45:43 -0800 (PST) Received: from process_milters-daemon.ma-mailsvcp-mmp-lapp01.apple.com by ma-mailsvcp-mmp-lapp01.apple.com (Oracle Communications Messaging Server 8.1.0.12.20210903 64bit (built Sep 3 2021)) id <0R3800500XA07Q00@ma-mailsvcp-mmp-lapp01.apple.com>; Sat, 27 Nov 2021 11:45:43 -0800 (PST) X-Va-A: X-Va-T-CD: eddad6d82ad223f259490ffad803ccf0 X-Va-E-CD: 268bb6642d666a9b975cf0843803901c X-Va-R-CD: 41f2abbe7a6048433f3667b4ceb1a0ef X-Va-CD: 0 X-Va-ID: 50633968-5432-4178-95d2-70253b06dabf X-V-A: X-V-T-CD: eddad6d82ad223f259490ffad803ccf0 X-V-E-CD: 268bb6642d666a9b975cf0843803901c X-V-R-CD: 41f2abbe7a6048433f3667b4ceb1a0ef X-V-CD: 0 X-V-ID: 7df6b3fa-ccd0-4848-855b-7fad4b03d5cf X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391,18.0.790 definitions=2021-08-03_02:2021-08-02,2021-08-03 signatures=0 Received: from smtpclient.apple (unknown [17.10.189.34]) by ma-mailsvcp-mmp-lapp01.apple.com (Oracle Communications Messaging Server 8.1.0.12.20210903 64bit (built Sep 3 2021)) with ESMTPSA id <0R3800D1VXK62W00@ma-mailsvcp-mmp-lapp01.apple.com>; Sat, 27 Nov 2021 11:45:42 -0800 (PST) MIME-version: 1.0 (Mac OS X Mail 15.0 \(3693.20.0.1.32\)) Subject: Re: [edk2-devel] one possible issue with ovmf fvb From: "Andrew Fish" In-reply-to: <444f3f42-cc2c-f255-389e-504b31789fcd@loongson.cn> Date: Sat, 27 Nov 2021 14:45:41 -0500 Cc: Gerd Hoffmann Message-id: <013FF567-925B-457E-88EA-0D623F8D43A0@apple.com> References: <444f3f42-cc2c-f255-389e-504b31789fcd@loongson.cn> To: edk2-devel-groups-io , maobibo@loongson.cn X-Mailer: Apple Mail (2.3693.20.0.1.32) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.425,18.0.790 definitions=2021-11-27_06:2021-11-25,2021-11-27 signatures=0 Content-type: text/plain; charset=utf-8 Content-transfer-encoding: quoted-printable > On Nov 25, 2021, at 4:43 AM, maobibo wrote: >=20 > Hi Gerd, >=20 > I am porting Loongarch Qemu uefi bios, and I want to use reuse ovmf code= . And I encounter one problem > when using OvmfPkg/EmuVariableFvbRuntimeDxe/Fvb.c >=20 > here is piece of code: > ----------------------------------------------------------- > Initialize =3D TRUE; > if (PcdGet64 (PcdEmuVariableNvStoreReserved) !=3D 0) { > Ptr =3D (VOID*)(UINTN) PcdGet64 (PcdEmuVariableNvStoreReserved); > DEBUG (( > DEBUG_INFO, > "EMU Variable FVB: Using pre-reserved block at %p\n", > Ptr > )); > Status =3D ValidateFvHeader (Ptr); > if (!EFI_ERROR (Status)) { > DEBUG ((DEBUG_INFO, "EMU Variable FVB: Found valid pre-existing FV\n= ")); > Initialize =3D FALSE; > } > } else { > Ptr =3D AllocateRuntimePages (EFI_SIZE_TO_PAGES (EMU_FVB_SIZE)); > } >=20 > mEmuVarsFvb.BufferPtr =3D Ptr; >=20 > // > // Initialize the main FV header and variable store header > // > if (Initialize) { > SetMem (Ptr, EMU_FVB_SIZE, ERASED_UINT8); > InitializeFvAndVariableStoreHeaders (Ptr); > } > PcdStatus =3D PcdSet64S (PcdFlashNvStorageVariableBase64, (UINT32)(UINTN= ) Ptr); > ASSERT_RETURN_ERROR (PcdStatus); >=20 > On my tcg vm, Ptr will be 64-bit physical address if memory exceeds 4G, I= do not know whether there is similar issue on x64 ovmf. > ditto for the following PcdFlashNvStorageFtwSpareBase/PcdFlashNvStorageFt= wWorkingBase >=20 > Can uefi bios manage memory beyond 4G? >=20 Bibo, You are finding implementation bugs. Please file Bugzillas when you see the= se bugs.=20 For X64 (x86-64) the reset vector is 0xFFFFFFF0 (just below 4 GiB) so the R= OM (usually a NOR FLASH) is always located under 4 GiB. So that is why thes= e bugs have not been noticed on X64. For AArch64, RiscV64, or loongarch thi= s limitation does not exist and we should fix the code.=20 On real X64 hardware you can=E2=80=99t be in 64-bit mode without pageables,= and you can=E2=80=99t put pageables in the ROM. Thus PEI ends up being IA3= 2 (i386) and this usually means the DXE Core gets loaded < 4 GiB, and the i= nitial memory map for DXE is memory < 4 GiB. This pattern could also hide s= ome bugs of memory > 4 GiB,, but these are more likely to have been found i= n the AArch64 port. But if you hit something it is likely due to this.=20 Thanks, Andrew Fish >=20 > regards > bibo, mao >=20 >=20 >=20 >=20 >=20 >=20