From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail.byosoft.com.cn (mail.byosoft.com.cn [58.240.74.242]) by mx.groups.io with SMTP id smtpd.web08.12495.1617344660864619353 for ; Thu, 01 Apr 2021 23:24:22 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=none, err=permanent DNS error (domain: byosoft.com.cn, ip: 58.240.74.242, mailfrom: gaoliming@byosoft.com.cn) Received: from DESKTOPS6D0PVI ([58.246.60.130]) (envelope-sender ) by 192.168.6.13 with ESMTP for ; Fri, 02 Apr 2021 14:24:09 +0800 X-WM-Sender: gaoliming@byosoft.com.cn X-Originating-IP: 58.246.60.130 X-WM-AuthFlag: YES X-WM-AuthUser: gaoliming@byosoft.com.cn From: "gaoliming" To: "'Jiaxin Wu'" , Cc: "'Michael D Kinney'" , "'Zhiguang Liu'" , "'Ni Ray'" , "'Yao Jiewen'" , "'Zhang Hongbin1'" References: <20210402015053.7532-1-Jiaxin.wu@intel.com> In-Reply-To: <20210402015053.7532-1-Jiaxin.wu@intel.com> Subject: =?UTF-8?B?5Zue5aSNOiBbUEFUQ0ggdjJdIE1kZVBrZy9CYXNlTGliOiBBZGQgc3VwcG9ydCBmb3IgdGhlIFhTRVRCViBpbnN0cnVjdGlvbg==?= Date: Fri, 2 Apr 2021 14:24:12 +0800 Message-ID: <013c01d72788$cc82d200$65887600$@byosoft.com.cn> MIME-Version: 1.0 X-Mailer: Microsoft Outlook 16.0 Thread-Index: AQGiIcpvQyFSOF4b2iBxyyQ4q067TKsKzfpw Content-Type: text/plain; charset="gb2312" Content-Transfer-Encoding: quoted-printable Content-Language: zh-cn Reviewed-by: Liming Gao > -----=D3=CA=BC=FE=D4=AD=BC=FE----- > =B7=A2=BC=FE=C8=CB: Jiaxin Wu > =B7=A2=CB=CD=CA=B1=BC=E4: 2021=C4=EA4=D4=C22=C8=D5 9:51 > =CA=D5=BC=FE=C8=CB: devel@edk2.groups.io > =B3=AD=CB=CD: Michael D Kinney ; Liming = Gao > ; Zhiguang Liu ; Ni = Ray > ; Yao Jiewen ; Zhang Hongbin1 > > =D6=F7=CC=E2: [PATCH v2] MdePkg/BaseLib: Add support for the XSETBV = instruction >=20 > *v2: refine the coding format. >=20 > https://bugzilla.tianocore.org/show_bug.cgi?id=3D3284 >=20 > This patch is to support XSETBV instruction so as to support > Extended Control Register(XCR) write. >=20 > Extended Control Register(XCR) read has already been supported > by below commit to support XGETBV instruction: > 9b3ca509abd4e45439bbdfe2c2fa8780c950320a >=20 > Cc: Michael D Kinney > Cc: Liming Gao > Cc: Zhiguang Liu > Cc: Ni Ray > Cc: Yao Jiewen > Signed-off-by: Jiaxin Wu > Signed-off-by: Zhang Hongbin1 > --- > MdePkg/Include/Library/BaseLib.h | 25 > +++++++++++++++++++++++- > MdePkg/Library/BaseLib/BaseLib.inf | 4 +++- > MdePkg/Library/BaseLib/Ia32/XSetBv.nasm | 34 > +++++++++++++++++++++++++++++++++ > MdePkg/Library/BaseLib/X64/XSetBv.nasm | 34 > +++++++++++++++++++++++++++++++++ > 4 files changed, 95 insertions(+), 2 deletions(-) > create mode 100644 MdePkg/Library/BaseLib/Ia32/XSetBv.nasm > create mode 100644 MdePkg/Library/BaseLib/X64/XSetBv.nasm >=20 > diff --git a/MdePkg/Include/Library/BaseLib.h > b/MdePkg/Include/Library/BaseLib.h > index 1171a0ffb5..7253997a6f 100644 > --- a/MdePkg/Include/Library/BaseLib.h > +++ b/MdePkg/Include/Library/BaseLib.h > @@ -1,10 +1,10 @@ > /** @file > Provides string functions, linked list functions, math functions, > synchronization > functions, file path functions, and CPU architecture-specific functions. >=20 > -Copyright (c) 2006 - 2019, Intel Corporation. All rights = reserved.
> +Copyright (c) 2006 - 2021, Intel Corporation. All rights = reserved.
> Portions copyright (c) 2008 - 2009, Apple Inc. All rights = reserved.
> Copyright (c) Microsoft Corporation.
> Portions Copyright (c) 2020, Hewlett Packard Enterprise Development = LP. All > rights reserved.
>=20 > SPDX-License-Identifier: BSD-2-Clause-Patent > @@ -7436,10 +7436,33 @@ UINT64 > EFIAPI > AsmXGetBv ( > IN UINT32 Index > ); >=20 > +/** > + Executes a XSETBV instruction to write a 64-bit value to a Extended > Control > + Register(XCR), and returns the value. > + > + Writes the 64-bit value specified by Value to the XCR specified by Index. > The > + 64-bit value written to the XCR is returned. No parameter checking = is > + performed on Index or Value, and some of these may cause CPU > exceptions. The > + caller must either guarantee that Index and Value are valid, or the caller > + must establish proper exception handlers. This function is only available > on > + IA-32 and x64. > + > + @param Index The 32-bit XCR index to write. > + @param Value The 64-bit value to write to the XCR. > + > + @return Value > + > +**/ > +UINT64 > +EFIAPI > +AsmXSetBv ( > + IN UINT32 Index, > + IN UINT64 Value > + ); >=20 > /** > Executes a VMGEXIT instruction (VMMCALL with a REP prefix) >=20 > Executes a VMGEXIT instruction. This function is only available on IA-32 > and > diff --git a/MdePkg/Library/BaseLib/BaseLib.inf > b/MdePkg/Library/BaseLib/BaseLib.inf > index 3b85c56c3c..fe8f68bbcf 100644 > --- a/MdePkg/Library/BaseLib/BaseLib.inf > +++ b/MdePkg/Library/BaseLib/BaseLib.inf > @@ -1,9 +1,9 @@ > ## @file > # Base Library implementation. > # > -# Copyright (c) 2007 - 2020, Intel Corporation. All rights = reserved.
> +# Copyright (c) 2007 - 2021, Intel Corporation. All rights = reserved.
> # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
> # Portions copyright (c) 2011 - 2013, ARM Ltd. All rights = reserved.
> # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All > rights reserved.
> # > # SPDX-License-Identifier: BSD-2-Clause-Patent > @@ -182,10 +182,11 @@ > Ia32/LShiftU64.nasm| GCC > Ia32/EnableCache.nasm| GCC > Ia32/DisableCache.nasm| GCC > Ia32/RdRand.nasm > Ia32/XGetBv.nasm > + Ia32/XSetBv.nasm > Ia32/VmgExit.nasm >=20 > Ia32/DivS64x64Remainder.c > Ia32/InternalSwitchStack.c | MSFT > Ia32/InternalSwitchStack.nasm | GCC > @@ -316,10 +317,11 @@ > X64/GccInlinePriv.c | GCC > X64/EnableDisableInterrupts.nasm > X64/DisablePaging64.nasm > X64/RdRand.nasm > X64/XGetBv.nasm > + X64/XSetBv.nasm > X64/VmgExit.nasm > ChkStkGcc.c | GCC >=20 > [Sources.EBC] > Ebc/CpuBreakpoint.c > diff --git a/MdePkg/Library/BaseLib/Ia32/XSetBv.nasm > b/MdePkg/Library/BaseLib/Ia32/XSetBv.nasm > new file mode 100644 > index 0000000000..cf638d9a4d > --- /dev/null > +++ b/MdePkg/Library/BaseLib/Ia32/XSetBv.nasm > @@ -0,0 +1,34 @@ > +;-----------------------------------------------------------------------= --- ---- > +; > +; Copyright (c) 2021, Intel Corporation. All rights reserved.
> +; SPDX-License-Identifier: BSD-2-Clause-Patent > +; > +; Module Name: > +; > +; XSetBv.nasm > +; > +; Abstract: > +; > +; AsmXSetBv function > +; > +; Notes: > +; > +;-----------------------------------------------------------------------= --- ---- > + > + SECTION .text > + > +;-----------------------------------------------------------------------= --- ---- > +; UINT64 > +; EFIAPI > +; AsmXSetBv ( > +; IN UINT32 Index, > +; IN UINT64 Value > +; ); > +;-----------------------------------------------------------------------= --- ---- > +global ASM_PFX(AsmXSetBv) > +ASM_PFX(AsmXSetBv): > + mov edx, [esp + 12] > + mov eax, [esp + 8] > + mov ecx, [esp + 4] > + xsetbv > + ret > diff --git a/MdePkg/Library/BaseLib/X64/XSetBv.nasm > b/MdePkg/Library/BaseLib/X64/XSetBv.nasm > new file mode 100644 > index 0000000000..c07e9b4c88 > --- /dev/null > +++ b/MdePkg/Library/BaseLib/X64/XSetBv.nasm > @@ -0,0 +1,34 @@ > +;-----------------------------------------------------------------------= --- ---- > +; > +; Copyright (c) 2021, Intel Corporation. All rights reserved.
> +; SPDX-License-Identifier: BSD-2-Clause-Patent > +; > +; Module Name: > +; > +; XSetBv.nasm > +; > +; Abstract: > +; > +; AsmXSetBv function > +; > +; Notes: > +; > +;-----------------------------------------------------------------------= --- ---- > + > + DEFAULT REL > + SECTION .text > + > +;-----------------------------------------------------------------------= --- ---- > +; UINT64 > +; EFIAPI > +; AsmXSetBv ( > +; IN UINT32 Index, > +; IN UINT64 Value > +; ); > +;-----------------------------------------------------------------------= --- ---- > +global ASM_PFX(AsmXSetBv) > +ASM_PFX(AsmXSetBv): > + mov rax, rdx ; meanwhile, rax <- return > value > + shr rdx, 0x20 ; edx:eax contains the value > to write > + xsetbv > + ret > -- > 2.16.2.windows.1