From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.126; helo=mga18.intel.com; envelope-from=narendra.k.vanguput@intel.com; receiver=edk2-devel@lists.01.org Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id A1463211E2EF3 for ; Sun, 31 Mar 2019 23:46:27 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 31 Mar 2019 23:46:28 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,295,1549958400"; d="scan'208";a="332543161" Received: from fmsmsx108.amr.corp.intel.com ([10.18.124.206]) by fmsmga006.fm.intel.com with ESMTP; 31 Mar 2019 23:46:24 -0700 Received: from BGSMSX107.gar.corp.intel.com (10.223.4.191) by FMSMSX108.amr.corp.intel.com (10.18.124.206) with Microsoft SMTP Server (TLS) id 14.3.408.0; Sun, 31 Mar 2019 23:46:24 -0700 Received: from bgsmsx102.gar.corp.intel.com ([169.254.2.2]) by BGSMSX107.gar.corp.intel.com ([169.254.9.252]) with mapi id 14.03.0415.000; Mon, 1 Apr 2019 12:16:21 +0530 From: "Vanguput, Narendra K" To: "afish@apple.com" , "Desimone, Nathaniel L" CC: "edk2-devel@lists.01.org" , Laszlo Ersek , "Yao, Jiewen" , "Dong, Eric" Thread-Topic: [edk2] [PATCH v8] UefiCpuPkg\CpuSmm: Save & restore CR2 on-demand paging in SMM Thread-Index: AQHU5kZnroouixepjkeuHcMLLQqFEqYiwl6AgAAEHoCABBMcsA== Date: Mon, 1 Apr 2019 06:46:21 +0000 Message-ID: <020B34E8430BB544AB9E0330B597780A664EF657@BGSMSX102.gar.corp.intel.com> References: <20190329154456.4304-1-narendra.k.vanguput@intel.com> <02A34F284D1DA44BB705E61F7180EF0AAE9ADBB2@ORSMSX114.amr.corp.intel.com> <113D10BD-153C-49B2-BBDD-0F5932BB2DCC@apple.com> In-Reply-To: <113D10BD-153C-49B2-BBDD-0F5932BB2DCC@apple.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.0.400.15 dlp-reaction: no-action x-ctpclassification: CTP_NT x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiMzA4MjUyYTUtNjYwMy00NzVlLWIwNzQtZTIzMmJkYmZlMDI3IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiTFpKZlA0OEFSUnZucU5kcHFQdTV4aW5CNzkxc2dBcnc0NEdxeFlDRjFtbHB1VXRYRkRFQitDdnRiQ0p6cnFqWCJ9 x-originating-ip: [10.223.10.10] MIME-Version: 1.0 Subject: Re: [PATCH v8] UefiCpuPkg\CpuSmm: Save & restore CR2 on-demand paging in SMM X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 01 Apr 2019 06:46:27 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hi Nate, Andrew Fish, Paging is enabled. Here the point is SMM using Static page table Vs On-Dema= nd Paging. SMM always builds static page table for 32 bit. Only for 64 bit, there is a= PCD flag to control whether to use Static Page Table or On-Demand Paging. Below is the PCD flag details copied from 'UefiCpuPkg.dec' file [ ## Indicates if SMM uses static page table. # If enabled, SMM will not use on-demand paging. SMM will build static p= age table for all memory. # This flag only impacts X64 build, because SMM always builds static pag= e table for IA32. # It could not be enabled at the same time with SMM profile feature (Pcd= CpuSmmProfileEnable). # It could not be enabled also at the same time with heap guard feature = for SMM # (PcdHeapGuardPropertyMask in MdeModulePkg).

# TRUE - SMM uses static page table for all memory.
# FALSE - SMM uses static page table for below 4G memory and use on-dem= and paging for above 4G memory.
# @Prompt Use static page table for all memory in SMM. gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStaticPageTable|TRUE|BOOLEAN|0x3213210= D ] Storing and restoring CR2 register is only required for On-Demand Paging wh= en its in 64 bit. So the changes are related to that. For the Comment #2, Initially it was like that (I think in Patch 4), but based on review commen= ts and to make clear implementation changed to use APIs.=20 Hope I have answered your questions. Thanks, Naren > -----Original Message----- > From: afish@apple.com [mailto:afish@apple.com] > Sent: Saturday, March 30, 2019 3:08 AM > To: Desimone, Nathaniel L > Cc: Vanguput, Narendra K ; edk2- > devel@lists.01.org; Laszlo Ersek ; Yao, Jiewen > ; Dong, Eric > Subject: Re: [edk2] [PATCH v8] UefiCpuPkg\CpuSmm: Save & restore CR2 on- > demand paging in SMM >=20 >=20 >=20 > > On Mar 29, 2019, at 2:22 PM, Desimone, Nathaniel L > wrote: > > > > 1. Why would you do this for 64 bit but not 32 bit? >=20 > Is paging enabled on 32-bit, it is required for Long mode? >=20 > Also I'm not clear why it is an enhancement given you could take a period= ic > SMM in the kernels page fault handler and trashing CR2 seems bad. Maybe > there is some behavior I'm missing? >=20 > I'm not sure how big an issue this is but if SMM is modifying CR2 it is l= eaking > information about SMM operations outside of SMM. >=20 > Thanks, >=20 > Andrew Fish >=20 > > 2. Why don't you add the if statement to MpService.c instead of spreadi= ng it > to PageTbl.c? > > 3. What is the reason for this anyway? Adding the conditional is probab= ly > more execution time than just reading CR2 always. > > > > Thanks, > > Nate > > > > -----Original Message----- > > From: edk2-devel On Behalf Of > > nkvangup > > Sent: Friday, March 29, 2019 8:45 AM > > To: edk2-devel@lists.01.org > > Cc: Yao, Jiewen ; Dong, Eric > > ; Laszlo Ersek > > Subject: [edk2] [PATCH v8] UefiCpuPkg\CpuSmm: Save & restore CR2 > > on-demand paging in SMM > > > > BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1593 > > > > For every SMI occurrence, save and restore CR2 register only when SMM > on-demand paging support is enabled in 64 bit operation mode. > > This is not a bug but to have better improvement of code. > > > > Patch5 is updated with separate functions for Save and Restore of CR2 > based on review feedback. > > > > Patch6 - Removed Global Cr2 instead used function parameter > > > > Patch7 - Removed checking Cr2 with 0 as per feedback > > > > Contributed-under: TianoCore Contribution Agreement 1.1 > > Signed-off-by: Vanguput Narendra K > > > > Cc: Eric Dong > > Cc: Ray Ni > > Cc: Laszlo Ersek > > Cc: Yao Jiewen > > --- > > UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c | 26 > ++++++++++++++++++++++++++ > > UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 9 ++++++--- > > UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | 22 > ++++++++++++++++++++++ > > UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c | 30 > ++++++++++++++++++++++++++++++ > > 4 files changed, 84 insertions(+), 3 deletions(-) > > > > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c > > b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c > > index b734a1ea8c..d3f62ed806 100644 > > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c > > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c > > @@ -316,3 +316,29 @@ SetPageTableAttributes ( > > > > return ; > > } > > + > > +/** > > + This function returns with no action for 32 bit. > > + > > + @param[out] *Cr2 Pointer to variable to hold CR2 register value > > +**/ VOID > > +SaveCr2 ( > > + UINTN *Cr2 > > + ) > > +{ > > + return ; > > +} > > + > > +/** > > + This function returns with no action for 32 bit. > > + > > + @param[in] Cr2 Value to write into CR2 register **/ VOID > > +RestoreCr2 ( > > + UINTN Cr2 > > + ) > > +{ > > + return ; > > +} > > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c > > b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c > > index 3b0b3b52ac..ce70f77709 100644 > > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c > > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c > > @@ -1112,9 +1112,11 @@ SmiRendezvous ( > > ASSERT(CpuIndex < mMaxNumberOfCpus); > > > > // > > - // Save Cr2 because Page Fault exception in SMM may override its > > value > > + // Save Cr2 because Page Fault exception in SMM may override its > > + value, // when using on-demand paging for above 4G memory. > > // > > - Cr2 =3D AsmReadCr2 (); > > + Cr2 =3D 0; > > + SaveCr2 (&Cr2); > > > > // > > // Perform CPU specific entry hooks > > @@ -1253,10 +1255,11 @@ SmiRendezvous ( > > > > Exit: > > SmmCpuFeaturesRendezvousExit (CpuIndex); > > + > > // > > // Restore Cr2 > > // > > - AsmWriteCr2 (Cr2); > > + RestoreCr2 (Cr2); > > } > > > > /** > > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h > > b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h > > index 84efb22981..05e1b54ed2 100644 > > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h > > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h > > @@ -1243,4 +1243,26 @@ EFIAPI > > PiSmmCpuSmiEntryFixupAddress ( > > ); > > > > +/** > > + This function reads CR2 register when on-demand paging is enabled > > + for 64 bit and no action for 32 bit. > > + > > + @param[out] *Cr2 Pointer to variable to hold CR2 register value > > +**/ VOID > > +SaveCr2 ( > > + UINTN *Cr2 > > + ); > > + > > +/** > > + This function writes into CR2 register when on-demand paging is > > +enabled > > + for 64 bit and no action for 32 bit. > > + > > + @param[in] Cr2 Value to write into CR2 register **/ VOID > > +RestoreCr2 ( > > + UINTN Cr2 > > + ); > > + > > #endif > > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c > > b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c > > index 2c77cb47a4..e60628c080 100644 > > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c > > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c > > @@ -1053,3 +1053,33 @@ SetPageTableAttributes ( > > > > return ; > > } > > + > > +/** > > + This function reads CR2 register when on-demand paging is enabled > > + > > + @param[out] *Cr2 Pointer to variable to hold CR2 register value > > +**/ VOID > > +SaveCr2 ( > > + UINTN *Cr2 > > + ) > > +{ > > + if (!mCpuSmmStaticPageTable) { > > + *Cr2 =3D AsmReadCr2 (); > > + } > > +} > > + > > +/** > > + This function restores CR2 register when on-demand paging is > > +enabled > > + > > + @param[in] Cr2 Value to write into CR2 register **/ VOID > > +RestoreCr2 ( > > + UINTN Cr2 > > + ) > > +{ > > + if (!mCpuSmmStaticPageTable) { > > + AsmWriteCr2 (Cr2); > > + } > > +} > > -- > > 2.16.2.windows.1 > > > > _______________________________________________ > > edk2-devel mailing list > > mailto:edk2-devel@lists.01.org > > https://lists.01.org/mailman/listinfo/edk2-devel > > _______________________________________________ > > edk2-devel mailing list > > edk2-devel@lists.01.org > > https://lists.01.org/mailman/listinfo/edk2-devel