From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.31; helo=mga06.intel.com; envelope-from=narendra.k.vanguput@intel.com; receiver=edk2-devel@lists.01.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id ACA0B211E8310 for ; Mon, 1 Apr 2019 19:32:22 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 01 Apr 2019 19:32:21 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,298,1549958400"; d="scan'208";a="160491249" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by fmsmga001.fm.intel.com with ESMTP; 01 Apr 2019 19:32:21 -0700 Received: from fmsmsx115.amr.corp.intel.com (10.18.116.19) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.408.0; Mon, 1 Apr 2019 19:32:21 -0700 Received: from bgsmsx151.gar.corp.intel.com (10.224.48.42) by fmsmsx115.amr.corp.intel.com (10.18.116.19) with Microsoft SMTP Server (TLS) id 14.3.408.0; Mon, 1 Apr 2019 19:32:21 -0700 Received: from bgsmsx102.gar.corp.intel.com ([169.254.2.2]) by BGSMSX151.gar.corp.intel.com ([169.254.3.220]) with mapi id 14.03.0415.000; Tue, 2 Apr 2019 08:02:18 +0530 From: "Vanguput, Narendra K" To: "Desimone, Nathaniel L" , "edk2-devel@lists.01.org" CC: "Yao, Jiewen" , "Dong, Eric" , Laszlo Ersek Thread-Topic: [edk2] [PATCH v9] UefiCpuPkg\CpuSmm: Save & restore CR2 on-demand paging in SMM Thread-Index: AQHU6GMtQKRONCW+Z0m9dWlo/d3nJ6YnqJqAgAB+NgA= Date: Tue, 2 Apr 2019 02:32:17 +0000 Message-ID: <020B34E8430BB544AB9E0330B597780A664F0FEB@BGSMSX102.gar.corp.intel.com> References: <20190401081601.22388-1-narendra.k.vanguput@intel.com> <02A34F284D1DA44BB705E61F7180EF0AAE9B609A@ORSMSX114.amr.corp.intel.com> In-Reply-To: <02A34F284D1DA44BB705E61F7180EF0AAE9B609A@ORSMSX114.amr.corp.intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.0.400.15 dlp-reaction: no-action x-ctpclassification: CTP_NT x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiNjY1MTRiYWYtZGJmYy00M2IwLThhYjUtMjkyNzBkNDQ5YThiIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiNVluOUJNRlAwSXhjbFF2cFZJMjB3Yzhyc2ZyYVJPcW00ekJcLzlLUkY1eEF0bkdNck9Ha1ZERXNkR2FSbUFnT08ifQ== x-originating-ip: [10.223.10.10] MIME-Version: 1.0 Subject: Re: [PATCH v9] UefiCpuPkg\CpuSmm: Save & restore CR2 on-demand paging in SMM X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 02 Apr 2019 02:32:22 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hi Nate, The 'PcdCpuSmmStaticPageTable' is only used in the X64 version of PageTbl.c= that's why I updated only for 64 bit. SMM always builds static page table= for IA32. Please refer my previous mail for more details. Thanks, Narendra > -----Original Message----- > From: Desimone, Nathaniel L > Sent: Tuesday, April 2, 2019 5:57 AM > To: Vanguput, Narendra K ; edk2- > devel@lists.01.org > Cc: Yao, Jiewen ; Dong, Eric ; > Laszlo Ersek > Subject: RE: [edk2] [PATCH v9] UefiCpuPkg\CpuSmm: Save & restore CR2 on- > demand paging in SMM >=20 > This patch seems to only add the IN/OUT decorators on function parameters= , > which is a good change. However, it does not address any of my previous > comments: >=20 > 1. Why would you do this for 64 bit but not 32 bit? > 2. Why don't you add the if statement to MpService.c instead of spreading= it > to PageTbl.c? > 3. What is the reason for this anyway? Adding the conditional is probably > more execution time than just reading CR2 always. >=20 > I also share Andrew's concern that in the case of a periodic SMI happenin= g > during OS runtime, there is nothing preventing the handler of the periodi= c > SMI from clobbering the value of CR2, which could potentially cause kerne= l > panics once we return back from SMM to the OS. I am not aware of any > periodic SMIs in OVMF, so I don't believe OVMF testing will catch these t= ype > of issues. I consider not doing the save/restore in the 32 bit SMM to be > dangerous, especially since all recent platforms that I can think of don'= t use 32 > bit SMM anymore, so any bug(s) introduced may go unnoticed for a long tim= e. >=20 > Thanks, > Nate >=20 > -----Original Message----- > From: edk2-devel On Behalf Of nkvangup > Sent: Monday, April 1, 2019 1:16 AM > To: edk2-devel@lists.01.org > Cc: Yao, Jiewen ; Dong, Eric ; > Laszlo Ersek > Subject: [edk2] [PATCH v9] UefiCpuPkg\CpuSmm: Save & restore CR2 on- > demand paging in SMM >=20 > BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1593 >=20 > For every SMI occurrence, save and restore CR2 register only when SMM on- > demand paging support is enabled in 64 bit operation mode. > This is not a bug but to have better improvement of code. >=20 > Patch5 is updated with separate functions for Save and Restore of CR2 bas= ed > on review feedback. >=20 > Patch6 - Removed Global Cr2 instead used function parameter. >=20 > Patch7 - Removed checking Cr2 with 0 as per feedback. >=20 > Patch8 and 9 - Aligned with EDK2 Coding style. >=20 > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Vanguput Narendra K > Cc: Eric Dong > Cc: Ray Ni > Cc: Laszlo Ersek > Cc: Yao Jiewen > --- > UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c | 26 > ++++++++++++++++++++++++++ > UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 9 ++++++--- > UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | 22 > ++++++++++++++++++++++ > UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c | 30 > ++++++++++++++++++++++++++++++ > 4 files changed, 84 insertions(+), 3 deletions(-) >=20 > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c > b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c > index b734a1ea8c..d1e146a70c 100644 > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c > @@ -316,3 +316,29 @@ SetPageTableAttributes ( >=20 > return ; > } > + > +/** > + This function returns with no action for 32 bit. > + > + @param[out] *Cr2 Pointer to variable to hold CR2 register value. > +**/ > +VOID > +SaveCr2 ( > + OUT UINTN *Cr2 > + ) > +{ > + return ; > +} > + > +/** > + This function returns with no action for 32 bit. > + > + @param[in] Cr2 Value to write into CR2 register. > +**/ > +VOID > +RestoreCr2 ( > + IN UINTN Cr2 > + ) > +{ > + return ; > +} > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c > b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c > index 3b0b3b52ac..ce70f77709 100644 > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c > @@ -1112,9 +1112,11 @@ SmiRendezvous ( > ASSERT(CpuIndex < mMaxNumberOfCpus); >=20 > // > - // Save Cr2 because Page Fault exception in SMM may override its value > + // Save Cr2 because Page Fault exception in SMM may override its > + value, // when using on-demand paging for above 4G memory. > // > - Cr2 =3D AsmReadCr2 (); > + Cr2 =3D 0; > + SaveCr2 (&Cr2); >=20 > // > // Perform CPU specific entry hooks > @@ -1253,10 +1255,11 @@ SmiRendezvous ( >=20 > Exit: > SmmCpuFeaturesRendezvousExit (CpuIndex); > + > // > // Restore Cr2 > // > - AsmWriteCr2 (Cr2); > + RestoreCr2 (Cr2); > } >=20 > /** > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h > b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h > index 84efb22981..38f9104117 100644 > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h > @@ -1243,4 +1243,26 @@ EFIAPI > PiSmmCpuSmiEntryFixupAddress ( > ); >=20 > +/** > + This function reads CR2 register when on-demand paging is enabled > + for 64 bit and no action for 32 bit. > + > + @param[out] *Cr2 Pointer to variable to hold CR2 register value. > +**/ > +VOID > +SaveCr2 ( > + OUT UINTN *Cr2 > + ); > + > +/** > + This function writes into CR2 register when on-demand paging is > +enabled > + for 64 bit and no action for 32 bit. > + > + @param[in] Cr2 Value to write into CR2 register. > +**/ > +VOID > +RestoreCr2 ( > + IN UINTN Cr2 > + ); > + > #endif > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c > b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c > index 2c77cb47a4..95eaf0b016 100644 > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c > @@ -1053,3 +1053,33 @@ SetPageTableAttributes ( >=20 > return ; > } > + > +/** > + This function reads CR2 register when on-demand paging is enabled. > + > + @param[out] *Cr2 Pointer to variable to hold CR2 register value. > +**/ > +VOID > +SaveCr2 ( > + OUT UINTN *Cr2 > + ) > +{ > + if (!mCpuSmmStaticPageTable) { > + *Cr2 =3D AsmReadCr2 (); > + } > +} > + > +/** > + This function restores CR2 register when on-demand paging is enabled. > + > + @param[in] Cr2 Value to write into CR2 register. > +**/ > +VOID > +RestoreCr2 ( > + IN UINTN Cr2 > + ) > +{ > + if (!mCpuSmmStaticPageTable) { > + AsmWriteCr2 (Cr2); > + } > +} > -- > 2.16.2.windows.1 >=20 > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel