From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from walk.intel-email.com (walk.intel-email.com [101.227.64.242]) by mx.groups.io with SMTP id smtpd.web11.7408.1676006806793608387 for ; Thu, 09 Feb 2023 21:26:48 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@byosoft.com.cn header.s=cloud-union header.b=llVCipwS; spf=pass (domain: byosoft.com.cn, ip: 101.227.64.242, mailfrom: gaoliming@byosoft.com.cn) Received: from walk.intel-email.com (localhost [127.0.0.1]) by walk.intel-email.com (Postfix) with ESMTP id 0E238CD1F7B3 for ; Fri, 10 Feb 2023 13:26:42 +0800 (CST) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=byosoft.com.cn; s=cloud-union; t=1676006802; bh=5NIyN0DoW4xqVqY1iJfJTHJPBgeO1+xnkSlT+EFBhSY=; h=From:To:References:In-Reply-To:Subject:Date; b=llVCipwSSzgijmrQ+f00Yrf3nDxE1MX/exUS+IPR5pYOBkPuwN1naOVPCkfkAAmhf VIjocBqQ8TDXbe3K9Rdm0IMOzVNuvYcPkFfCrk9rTDCHdyH61P0IvuYxWuWp3AXCLS DYuJhVfIJaCkAjde5RSAh1OP+fzNMPHtfnUUh/6A= Received: from localhost (localhost [127.0.0.1]) by walk.intel-email.com (Postfix) with ESMTP id 09901CD1F7A9 for ; Fri, 10 Feb 2023 13:26:42 +0800 (CST) Received: from walk.intel-email.com (localhost [127.0.0.1]) by walk.intel-email.com (Postfix) with ESMTP id C1C6CCD1F7CE for ; Fri, 10 Feb 2023 13:26:41 +0800 (CST) Authentication-Results: walk.intel-email.com; none Received: from mail.byosoft.com.cn (mail.byosoft.com.cn [58.240.74.242]) by walk.intel-email.com (Postfix) with SMTP id 24D7CCD1F7B3 for ; Fri, 10 Feb 2023 13:26:38 +0800 (CST) Received: from DESKTOPS6D0PVI ([58.246.60.130]) (envelope-sender ) by 192.168.6.13 with ESMTP for ; Fri, 10 Feb 2023 13:26:32 +0800 X-WM-Sender: gaoliming@byosoft.com.cn X-Originating-IP: 58.246.60.130 X-WM-AuthFlag: YES X-WM-AuthUser: gaoliming@byosoft.com.cn From: "gaoliming" To: , , "'Name'" , , , , , References: <13bc39429583f0129b2935970df6489191004ad2.1674671138.git.swatisrik@nvidia.com> <012701d933a6$cff11010$6fd33030$@byosoft.com.cn> In-Reply-To: Subject: =?UTF-8?B?5Zue5aSNOiBbZWRrMi1kZXZlbF0gW1BBVENIIDIvMl0gTWRlUGtnOklPUlQgaGVhZGVyIHVwZGF0ZSBmb3IgSU9SVCBSZXYgRS5lIHNwZWM=?= Date: Fri, 10 Feb 2023 13:26:35 +0800 Message-ID: <022c01d93d10$3dfe0910$b9fa1b30$@byosoft.com.cn> MIME-Version: 1.0 X-Mailer: Microsoft Outlook 16.0 Thread-Index: AQKg8ltzCzEboOR/7xq50OLwm4rDtQKFhWn/AtePZpcBz5MC96z+1nIQ Sender: "gaoliming" Content-Type: multipart/alternative; boundary="----=_NextPart_000_022D_01D93D53.4C22A8A0" Content-Language: zh-cn ------=_NextPart_000_022D_01D93D53.4C22A8A0 Content-Type: text/plain; charset="gb2312" Content-Transfer-Encoding: quoted-printable It has been merged at 5db84c85c3544b92fa236c4d169440d523712ae0 in Edk2.=20 =20 Thanks Liming =20 =B7=A2=BC=FE=C8=CB: devel@edk2.groups.io =B4=FA=B1= =ED Swatisri Kantamsetti via groups.io =B7=A2=CB=CD=CA=B1=BC=E4: 2023=C4=EA2=D4=C24=C8=D5 2:48 =CA=D5=BC=FE=C8=CB: gaoliming ; 'Name' ; devel@edk2.groups.io; Sami.Mujawar@arm.com; Alexei.Fedorov@arm.com; pierre.gondois@arm.com; michael.d.kinney@intel.com; zhiguang.liu@intel.com =D6=F7=CC=E2: Re: [edk2-devel] [PATCH 2/2] MdePkg:IORT header update for IO= RT Rev E. e spec =20 Just checking to see when this patch could be merged? =20 Thanks, Swati _____ =20 From: gaoliming > Sent: Saturday, January 28, 2023 10:59 PM To: 'Name' >; devel@edk2.groups.io >; Sami.Mujawar@arm.com >; Alexei.Fedorov@arm.com >; pierre.gondois@arm.com >; michael.d.kinney@intel.com >; zhiguang.liu@intel.com > Cc: Swatisri Kantamsetti > Subject: =BB=D8=B8=B4: [PATCH 2/2] MdePkg:IORT header update for IORT Rev E= .e spec=20 =20 External email: Use caution opening links or attachments Reviewed-by: Liming Gao > > -----=D3=CA=BC=FE=D4=AD=BC=FE----- > =B7=A2=BC=FE=C8=CB: Name > > =B7=A2=CB=CD=CA=B1=BC=E4: 2023=C4=EA1=D4=C226=C8=D5 2:41 > =CA=D5=BC=FE=C8=CB: devel@edk2.groups.io ; Sami.Mujawar@arm.com ; > Alexei.Fedorov@arm.com ; pierre.gondois@arm.com ; > michael.d.kinney@intel.com ; gaoliming@byosoft.com.cn ; > zhiguang.liu@intel.com =20 > =B3=AD=CB=CD: Swatisri Kantamsetti > > =D6=F7=CC=E2: [PATCH 2/2] MdePkg:IORT header update for IORT Rev E.e spec > > From: Swatisri Kantamsetti > > > The IO Remapping Table, Platform Design Document, Revision E.e, > Sept 2022 (https://nam11.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Fdevelo= per .arm.com%2Fdocumentation%2Fden0049%2Fee &data=3D05%7C01%7Cswatisrik%40nvidia.com%7C39d6cc086d3b45e32ea908db01bdfd93= %7C 43083d15727340c1b7db39efd9ccc17a%7C0%7C0%7C638105687766743781%7CUnknown%7CT= W FpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3= D %7C3000%7C%7C%7C&sdata=3DYfn%2BzXkA2rKS4Y44XkU65gMLQy8OL3iqPF2AmyYmRNM%3D&r= ese rved=3D0) > added flags in SMMUv3 node for validity of ID mappings for MSIs > related to control interrupts. > > Therefore, update the IORT header file to: > - increment IORT table revision to 6 > - add support for DeviceId valid flag > > Signed-off-by: Swatisri Kantamsetti > > --- > MdePkg/Include/IndustryStandard/IoRemappingTable.h | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/MdePkg/Include/IndustryStandard/IoRemappingTable.h > b/MdePkg/Include/IndustryStandard/IoRemappingTable.h > index f48a4a95cd..544aa67a05 100644 > --- a/MdePkg/Include/IndustryStandard/IoRemappingTable.h > +++ b/MdePkg/Include/IndustryStandard/IoRemappingTable.h > @@ -9,6 +9,8 @@ > @par Reference(s): > - IO Remapping Table, Platform Design Document, Revision E.d, Feb 2022 > (https://nam11.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Fdevelo= per .arm.com%2Fdocumentation%2Fden0049%2F &data=3D05%7C01%7Cswatisrik%40nvidia.com%7C39d6cc086d3b45e32ea908db01bdfd93= %7C 43083d15727340c1b7db39efd9ccc17a%7C0%7C0%7C638105687766743781%7CUnknown%7CT= W FpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3= D %7C3000%7C%7C%7C&sdata=3DYb238OnzfBZR8f9ad%2F5S0Ol3XetVptoMG24AO4Yj8To%3D&r= ese rved=3D0) > + - IO Remapping Table, Platform Design Document, Revision E.e, Sept 202= 2 > + (https://nam11.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Fdevelo= per .arm.com%2Fdocumentation%2Fden0049%2F &data=3D05%7C01%7Cswatisrik%40nvidia.com%7C39d6cc086d3b45e32ea908db01bdfd93= %7C 43083d15727340c1b7db39efd9ccc17a%7C0%7C0%7C638105687766743781%7CUnknown%7CT= W FpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3= D %7C3000%7C%7C%7C&sdata=3DYb238OnzfBZR8f9ad%2F5S0Ol3XetVptoMG24AO4Yj8To%3D&r= ese rved=3D0) > > @par Glossary: > - Ref : Reference > @@ -24,6 +26,7 @@ > #define EFI_ACPI_IO_REMAPPING_TABLE_REVISION_00 0x0 > #define EFI_ACPI_IO_REMAPPING_TABLE_REVISION_04 0x4 // > Deprecated > #define EFI_ACPI_IO_REMAPPING_TABLE_REVISION_05 0x5 > +#define EFI_ACPI_IO_REMAPPING_TABLE_REVISION_06 0x6 > > #define EFI_ACPI_IORT_TYPE_ITS_GROUP 0x0 > #define EFI_ACPI_IORT_TYPE_NAMED_COMP 0x1 > @@ -59,6 +62,7 @@ > #define EFI_ACPI_IORT_SMMUv3_FLAG_COHAC_OVERRIDE BIT0 > #define EFI_ACPI_IORT_SMMUv3_FLAG_HTTU_OVERRIDE BIT1 > #define EFI_ACPI_IORT_SMMUv3_FLAG_PROXIMITY_DOMAIN BIT3 > +#define EFI_ACPI_IORT_SMMUv3_FLAG_DEVICEID_VALID BIT4 > > #define EFI_ACPI_IORT_SMMUv3_MODEL_GENERIC 0x0 > #define EFI_ACPI_IORT_SMMUv3_MODEL_HISILICON_HI161X 0x1 > -- > 2.17.1 ------=_NextPart_000_022D_01D93D53.4C22A8A0 Content-Type: text/html; charset="gb2312" Content-Transfer-Encoding: quoted-printable

It has been merged at 5db84c85c3544b92fa236c4d169440d523712ae0 i= n Edk2.

 

=

Thanks

Liming

 

<= p class=3DMsoNormal>=B7=A2=BC=FE=C8=CB: devel@edk2.gr= oups.io <devel@edk2.groups.io> =B4=FA=B1=ED Swatisri Kantamsetti via = groups.io
=B7=A2=CB=CD=CA=B1=BC=E4: 2023=C4=EA2=D4=C24=C8=D5 2:48
=CA=D5=BC=FE=C8=CB: gaoliming <gaoliming@byosoft.com.cn>; 'Name' <usern= ame@nvidia.com>; devel@edk2.groups.io; Sami.Mujawar@arm.com; Alexei.Fedo= rov@arm.com; pierre.gondois@arm.com; michael.d.kinney@intel.com; zhiguang.l= iu@intel.com
=D6=F7=CC=E2: Re: [edk2-devel] [PATCH 2/2] MdePkg:IORT header update for IO= RT Rev E.e spec

 

= Just checking to see when this patch could be merged?

<= span lang=3DEN-US> 

Thanks,

<= /div>

Swati

External email: Use caution opening links or = attachments


Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>

> -----=D3=CA=BC=FE=D4=AD=BC=FE-----
> =B7=A2=BC=FE=C8=CB: Name <username@nvidia.com>
> =B7=A2=CB=CD=CA=B1=BC=E4: 2023=C4=EA1=D4=C226=C8=D5 2:41
> =CA=D5=BC=FE=C8=CB: devel@edk2.groups.io; Sami.Mujawar@arm.com;
> Alexei.Fedorov@arm.com; pierre.gondois@arm.com;
> michael.d.kinney@intel.com; gaoliming@byosoft.com.cn;
> zhiguang.liu@intel.com
> =B3=AD= =CB=CD: Swatisri Kantamsetti <swatisrik@nvidia.com>
> =D6=F7=CC=E2: [PATCH 2/2] MdePkg:IORT header update for IORT Rev E.e s= pec
>
> From: Swatisri Kantamsetti <swatisrik@nvidia.com>
>
> The IO Remappi= ng Table, Platform Design Document, Revision E.e,
> Sept 2022 (https://nam11.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Fdevelo= per.arm.com%2Fdocumentation%2Fden0049%2Fee&data=3D05%7C01%7Cswatisrik%4= 0nvidia.com%7C39d6cc086d3b45e32ea908db01bdfd93%7C43083d15727340c1b7db39efd9= ccc17a%7C0%7C0%7C638105687766743781%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjA= wMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sda= ta=3DYfn%2BzXkA2rKS4Y44XkU65gMLQy8OL3iqPF2AmyYmRNM%3D&reserved=3D0)=
> added flags in SMMUv3 node for validity of ID mappings for MSIs> related to control interrupts.
>
> Therefore, update the = IORT header file to:
> - increment IORT table revision to 6
> -= add support for DeviceId valid flag
>
> Signed-off-by: Swatisr= i Kantamsetti <swatisrik@nvidia.= com>
> ---
>  MdePkg/Include/IndustryStandard/IoRem= appingTable.h | 4 ++++
>  1 file changed, 4 insertions(+)
>= ;
> diff --git a/MdePkg/Include/IndustryStandard/IoRemappingTable.h> b/MdePkg/Include/IndustryStandard/IoRemappingTable.h
> index f= 48a4a95cd..544aa67a05 100644
> --- a/MdePkg/Include/IndustryStandard/= IoRemappingTable.h
> +++ b/MdePkg/Include/IndustryStandard/IoRemappin= gTable.h
> @@ -9,6 +9,8 @@
>    @par Reference(s= ):
>    - IO Remapping Table, Platform Design Document= , Revision E.d, Feb 2022
>      (https= ://nam11.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Fdeveloper.ar= m.com%2Fdocumentation%2Fden0049%2F&data=3D05%7C01%7Cswatisrik%40nvidia.= com%7C39d6cc086d3b45e32ea908db01bdfd93%7C43083d15727340c1b7db39efd9ccc17a%7= C0%7C0%7C638105687766743781%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJ= QIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=3DYb2= 38OnzfBZR8f9ad%2F5S0Ol3XetVptoMG24AO4Yj8To%3D&reserved=3D0)
>= +  - IO Remapping Table, Platform Design Document, Revision E.e, Sept= 2022
> +      (https://nam11.safelinks= .protection.outlook.com/?url=3Dhttps%3A%2F%2Fdeveloper.arm.com%2Fdocumentat= ion%2Fden0049%2F&data=3D05%7C01%7Cswatisrik%40nvidia.com%7C39d6cc086d3b= 45e32ea908db01bdfd93%7C43083d15727340c1b7db39efd9ccc17a%7C0%7C0%7C638105687= 766743781%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBT= iI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=3DYb238OnzfBZR8f9ad%2F5= S0Ol3XetVptoMG24AO4Yj8To%3D&reserved=3D0)
>
> &nbs= p;  @par Glossary:
>    - Ref  : Reference> @@ -24,6 +26,7 @@
>  #define EFI_ACPI_IO_REMAPPING_TABLE_= REVISION_00  0x0
>  #define EFI_ACPI_IO_REMAPPING_TABLE_REV= ISION_04  0x4   //
> Deprecated
>  #define = EFI_ACPI_IO_REMAPPING_TABLE_REVISION_05  0x5
> +#define EFI_ACPI= _IO_REMAPPING_TABLE_REVISION_06  0x6
>
>  #define EFI= _ACPI_IORT_TYPE_ITS_GROUP     0x0
>  #define= EFI_ACPI_IORT_TYPE_NAMED_COMP    0x1
> @@ -59,6 +62,7= @@
>  #define EFI_ACPI_IORT_SMMUv3_FLAG_COHAC_OVERRIDE &nb= sp;  BIT0
>  #define EFI_ACPI_IORT_SMMUv3_FLAG_HTTU_OVERRID= E     BIT1
>  #define EFI_ACPI_IORT_SMMUv3_F= LAG_PROXIMITY_DOMAIN  BIT3
> +#define EFI_ACPI_IORT_SMMUv3_FLAG_= DEVICEID_VALID    BIT4
>
>  #define EFI_ACP= I_IORT_SMMUv3_MODEL_GENERIC        =    0x0
>  #define EFI_ACPI_IORT_SMMUv3_MODEL_HISILICON= _HI161X  0x1
> --
> 2.17.1


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