* [PATCH 0/2] Add FSP Dispatch mode switch
@ 2019-05-22 8:35 Chiu, Chasel
2019-05-22 8:35 ` [PATCH 1/2] KabylakeSiliconPkg: Add FSP Dispatch switch Chiu, Chasel
2019-05-22 8:35 ` [PATCH 2/2] KabylakeOpenBoardPkg: " Chiu, Chasel
0 siblings, 2 replies; 5+ messages in thread
From: Chiu, Chasel @ 2019-05-22 8:35 UTC (permalink / raw)
To: devel; +Cc: Nate DeSimone, Michael Kubacki
Boot loader (FspWrapper/Platform code) now can switch to Dispatch mode
defined by FSP 2.1 spec using PcdFspModeSelection.
For backward compatibility different FspBinPkg may be consumed in each mode.
To support this switch, below are required changes
in KabylakeOpenBoardPkg and KabylakeSiliconPkg:
1. In Dispatch mode AmberLakeFspBinPkg will be consumed and
KabylakeFspBinPkg is for API mode for backward compatible.
2. Temporary memory arrangement will be different between each mode because
in Dispatch mode FSP will share the same stack with boot loader.
3. For now default mode is still API before all implementation completed.
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Michael Kubacki <michael.a.kubacki@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Chasel, Chiu (2):
KabylakeSiliconPkg: Add FSP Dispatch switch.
KabylakeOpenBoardPkg: Add FSP Dispatch switch.
Platform/Intel/KabylakeOpenBoardPkg/Include/Fdf/FlashMapInclude.fdf | 8 ++++----
Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc | 33 +++++++++++++++++++++++++++++----
Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc | 29 +++++++++++++++++++++++++++++
Silicon/Intel/KabylakeSiliconPkg/Library/PeiSiliconPolicyInitLibFsp/PeiSiliconPolicyInitLibFspAml.inf | 146 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
4 files changed, 208 insertions(+), 8 deletions(-)
create mode 100644 Silicon/Intel/KabylakeSiliconPkg/Library/PeiSiliconPolicyInitLibFsp/PeiSiliconPolicyInitLibFspAml.inf
--
2.13.3.windows.1
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 1/2] KabylakeSiliconPkg: Add FSP Dispatch switch.
2019-05-22 8:35 [PATCH 0/2] Add FSP Dispatch mode switch Chiu, Chasel
@ 2019-05-22 8:35 ` Chiu, Chasel
2019-05-29 1:12 ` [edk2-devel] " Nate DeSimone
2019-05-22 8:35 ` [PATCH 2/2] KabylakeOpenBoardPkg: " Chiu, Chasel
1 sibling, 1 reply; 5+ messages in thread
From: Chiu, Chasel @ 2019-05-22 8:35 UTC (permalink / raw)
To: devel; +Cc: Chasel, Chiu, Nate DeSimone, Michael Kubacki
From: "Chasel, Chiu" <chasel.chiu@intel.com>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1832
PcdFspModeSelection is used as switch for boot loader to
consume FSP in API mode or Dispatch mode. For backward
compatibility, if boot loader running in FSP API mode the
KabylakeFspBinPkg will be used which does not have FSP 2.1
changes. For FSP Dispatch mode AmberLakeFspBinPkg will be
used with FSP 2.1 support.
One INF was duplicate to include different DEC file in
each build type.
Test: Booted Kabylake RVP3 to Windows successfully.
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Michael Kubacki <michael.a.kubacki@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
---
Silicon/Intel/KabylakeSiliconPkg/Library/PeiSiliconPolicyInitLibFsp/PeiSiliconPolicyInitLibFspAml.inf | 146 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 146 insertions(+)
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Library/PeiSiliconPolicyInitLibFsp/PeiSiliconPolicyInitLibFspAml.inf b/Silicon/Intel/KabylakeSiliconPkg/Library/PeiSiliconPolicyInitLibFsp/PeiSiliconPolicyInitLibFspAml.inf
new file mode 100644
index 0000000000..aebd3583bc
--- /dev/null
+++ b/Silicon/Intel/KabylakeSiliconPkg/Library/PeiSiliconPolicyInitLibFsp/PeiSiliconPolicyInitLibFspAml.inf
@@ -0,0 +1,146 @@
+### @file
+# Library functions for Fsp Policy Initialization Library.
+#
+# Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = PeiSiliconPolicyInitLibFspAml
+ FILE_GUID = 930816C4-D182-4A23-BF21-9AED635AF06C
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = SiliconPolicyInitLib
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32
+#
+
+################################################################################
+#
+# Sources Section - list of files that are required for the build to succeed.
+#
+################################################################################
+
+[Sources]
+ PeiFspPolicyInitLib.c
+ PeiFspSiPolicyInitLib.c
+ PeiFspPchPolicyInitLib.c
+ PeiFspCpuPolicyInitLib.c
+ PeiFspMePolicyInitLib.c
+ PeiFspSaPolicyInitLib.c
+ PeiFspMiscUpdInitLib.c
+
+ PeiPolicyInitPreMem.c
+ PeiPolicyInit.c
+ PeiPolicyInit.h
+
+################################################################################
+#
+# Package Dependency Section - list of Package files that are required for
+# this module.
+#
+################################################################################
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ IntelFsp2Pkg/IntelFsp2Pkg.dec
+ IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
+ KabylakeSiliconPkg/SiPkg.dec
+ AmberLakeFspBinPkg/AmberLakeFspBinPkg.dec
+
+[LibraryClasses]
+ BaseMemoryLib
+ DebugLib
+ IoLib
+ PeiServicesLib
+ PcdLib
+ SmbusLib
+ MmPciLib
+ ConfigBlockLib
+ MemoryAllocationLib
+ DebugPrintErrorLevelLib
+ FspWrapperApiLib
+
+[Pcd]
+ gSiPkgTokenSpaceGuid.PcdTsegSize ## CONSUMES
+ gSiPkgTokenSpaceGuid.PcdSmbusBaseAddress ## CONSUMES
+ gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase ## CONSUMES
+ gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize ## CONSUMES
+ gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize ## CONSUMES
+ gIntelFsp2PkgTokenSpaceGuid.PcdFspReservedBufferSize ## CONSUMES
+ gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress ## CONSUMES
+ gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress ## CONSUMES
+ gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress ## CONSUMES
+ gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress ## CONSUMES
+
+[Ppis]
+ gSiPolicyPpiGuid ## CONSUMES
+ gSiPreMemPolicyPpiGuid ## CONSUMES
+
+[Guids]
+ gTraceHubPreMemConfigGuid ## CONSUMES
+ gSmbusPreMemConfigGuid ## CONSUMES
+ gDciPreMemConfigGuid ## CONSUMES
+ gHpetPreMemConfigGuid ## CONSUMES
+ gHsioPciePreMemConfigGuid ## CONSUMES
+ gHsioSataPreMemConfigGuid ## CONSUMES
+ gHsioPreMemConfigGuid ## CONSUMES
+ gPcieRpPreMemConfigGuid ## CONSUMES
+ gLpcPreMemConfigGuid ## CONSUMES
+ gPchGeneralPreMemConfigGuid ## CONSUMES
+ gWatchDogPreMemConfigGuid ## CONSUMES
+ gLanConfigGuid ## CONSUMES
+ gPcieRpConfigGuid ## CONSUMES
+ gSataConfigGuid ## CONSUMES
+ gHdAudioConfigGuid ## CONSUMES
+ gCio2ConfigGuid ## CONSUMES
+ gScsConfigGuid ## CONSUMES
+ gIshConfigGuid ## CONSUMES
+ gSpiConfigGuid ## CONSUMES
+ gSataConfigGuid ## CONSUMES
+ gUsbConfigGuid ## CONSUMES
+ gSerialIoConfigGuid ## CONSUMES
+ gInterruptConfigGuid ## CONSUMES
+ gLockDownConfigGuid ## CONSUMES
+ gSaMiscPeiPreMemConfigGuid ## PRODUCES
+ gMemoryConfigGuid ## CONSUMES
+ gMemoryConfigNoCrcGuid ## CONSUMES
+ gGraphicsPeiConfigGuid ## CONSUMES
+ gMePeiPreMemConfigGuid ## CONSUMES
+ gMePeiConfigGuid ## CONSUMES
+ gAmtPeiConfigGuid ## CONSUMES
+ gDmiConfigGuid ## CONSUMES
+ gFlashProtectionConfigGuid ## CONSUMES
+ gIoApicConfigGuid ## CONSUMES
+ gPmConfigGuid ## CONSUMES
+ gP2sbConfigGuid ## CONSUMES
+ gPchGeneralConfigGuid ## CONSUMES
+ gPort61ConfigGuid ## CONSUMES
+ gSerialIrqConfigGuid ## CONSUMES
+ gThermalConfigGuid ## CONSUMES
+ gCpuSecurityPreMemConfigGuid ## CONSUMES
+ gCpuTxtPreMemConfigGuid ## CONSUMES
+ gCpuConfigGuid ## CONSUMES
+ gBiosGuardConfigGuid ## CONSUMES
+ gCpuOverclockingPreMemConfigGuid ## CONSUMES
+ gCpuConfigLibPreMemConfigGuid ## CONSUMES
+ gCpuSgxConfigGuid ## CONSUMES
+ gCpuPowerMgmtBasicConfigGuid ## CONSUMES
+ gCpuPowerMgmtCustomConfigGuid ## CONSUMES
+ gCpuTestConfigGuid ## CONSUMES
+ gCpuPidTestConfigGuid ## CONSUMES
+ gCpuPowerMgmtTestConfigGuid ## CONSUMES
+ gSmramCpuDataHeaderGuid ## CONSUMES
+ gFspReservedMemoryResourceHobTsegGuid ## CONSUMES
--
2.13.3.windows.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 2/2] KabylakeOpenBoardPkg: Add FSP Dispatch switch.
2019-05-22 8:35 [PATCH 0/2] Add FSP Dispatch mode switch Chiu, Chasel
2019-05-22 8:35 ` [PATCH 1/2] KabylakeSiliconPkg: Add FSP Dispatch switch Chiu, Chasel
@ 2019-05-22 8:35 ` Chiu, Chasel
2019-05-29 1:12 ` Nate DeSimone
1 sibling, 1 reply; 5+ messages in thread
From: Chiu, Chasel @ 2019-05-22 8:35 UTC (permalink / raw)
To: devel; +Cc: Chasel, Chiu, Nate DeSimone, Michael Kubacki
From: "Chasel, Chiu" <chasel.chiu@intel.com>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1832
Basing on PcdFspModeSelection setting either KabylakeFspBinPkg
or AmberLakeFspBinPkg will be used and temporary memory
arrangement will be different as AmberLakeFspBinPkg will share
the same stack with boot loader. Also enlarged FSP-T size to
support future larger FSP binary.
Test: Booted Kabylake RVP3 to Windows successfully.
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Michael Kubacki <michael.a.kubacki@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
---
Platform/Intel/KabylakeOpenBoardPkg/Include/Fdf/FlashMapInclude.fdf | 8 ++++----
Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc | 33 +++++++++++++++++++++++++++++----
Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc | 29 +++++++++++++++++++++++++++++
3 files changed, 62 insertions(+), 8 deletions(-)
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/Include/Fdf/FlashMapInclude.fdf b/Platform/Intel/KabylakeOpenBoardPkg/Include/Fdf/FlashMapInclude.fdf
index 3a28bd4109..6cb49c941c 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/Include/Fdf/FlashMapInclude.fdf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/Include/Fdf/FlashMapInclude.fdf
@@ -1,7 +1,7 @@
## @file
# FDF file of Platform.
#
-# Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -41,6 +41,6 @@ SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize = 0x00060000
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset = 0x00600000 # Flash addr (0xFFE00000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize = 0x000BC000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset = 0x006BC000 # Flash addr (0xFFEBC000)
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize = 0x00004000 #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset = 0x006C0000 # Flash addr (0xFFEC0000)
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize = 0x00140000 #
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize = 0x00014000 #
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset = 0x006D0000 # Flash addr (0xFFED0000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize = 0x00130000 #
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
index 7f19ad1eed..1dfe49a7ad 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
@@ -15,7 +15,7 @@
DEFINE PLATFORM_PACKAGE = MinPlatformPkg
DEFINE PLATFORM_SI_PACKAGE = KabylakeSiliconPkg
DEFINE PLATFORM_SI_BIN_PACKAGE = KabylakeSiliconBinPkg
- DEFINE PLATFORM_FSP_BIN_PACKAGE = KabylakeFspBinPkg
+ DEFINE PLATFORM_FSP_BIN_PACKAGE = AmberLakeFspBinPkg
DEFINE PLATFORM_BOARD_PACKAGE = KabylakeOpenBoardPkg
DEFINE BOARD = KabylakeRvp3
DEFINE PROJECT = $(PLATFORM_BOARD_PACKAGE)/$(BOARD)
@@ -24,6 +24,21 @@
# Platform On/Off features are defined here
#
!include OpenBoardPkgConfig.dsc
+ !include OpenBoardPkgPcd.dsc
+
+[Defines]
+!if gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection == 1
+ #
+ # For backward compatibility API mode will use KabylakeFspBinPkg.
+ # KabylakeFspBinPkg only supports API mode.
+ #
+ DEFINE PLATFORM_FSP_BIN_PACKAGE = KabylakeFspBinPkg
+!else
+ #
+ # AmberLakeFspBinPkg supports both API and Dispatch modes
+ #
+ DEFINE PLATFORM_FSP_BIN_PACKAGE = AmberLakeFspBinPkg
+!endif
################################################################################
#
@@ -92,8 +107,20 @@
FspWrapperApiTestLib|IntelFsp2WrapperPkg/Library/PeiFspWrapperApiTestLib/PeiFspWrapperApiTestLib.inf
FspWrapperPlatformLib|$(PLATFORM_PACKAGE)/FspWrapper/Library/PeiFspWrapperPlatformLib/PeiFspWrapperPlatformLib.inf
- SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconPolicyInitLibFsp/PeiSiliconPolicyInitLibFsp.inf
+
+!if gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection == 1
+ #
+ # Below library are used by FSP API mode
+ #
SiliconPolicyUpdateLib|$(PLATFORM_BOARD_PACKAGE)/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf
+ SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconPolicyInitLibFsp/PeiSiliconPolicyInitLibFsp.inf
+!else
+ #
+ # Below library are used by FSP Dispatch mode and non-FSP build (EDK2 build)
+ #
+ SiliconPolicyUpdateLib|$(PLATFORM_BOARD_PACKAGE)/Policy/Library/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf
+ SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconPolicyInitLibFsp/PeiSiliconPolicyInitLibFspAml.inf
+!endif
ConfigBlockLib|$(PLATFORM_SI_PACKAGE)/Library/BaseConfigBlockLib/BaseConfigBlockLib.inf
SiliconInitLib|$(PLATFORM_SI_PACKAGE)/Library/SiliconInitLib/SiliconInitLib.inf
@@ -173,8 +200,6 @@
[LibraryClasses.X64.DXE_RUNTIME_DRIVER]
ResetSystemLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/DxeRuntimeResetSystemLib/DxeRuntimeResetSystemLib.inf
-!include OpenBoardPkgPcd.dsc
-
[Components.IA32]
#
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc
index 9774acb5eb..63d0c4c2e6 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc
@@ -28,6 +28,11 @@
[PcdsFixedAtBuild.common]
gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode|TRUE
+ #
+ # 0: FSP Wrapper is running in Dispatch mode.
+ # 1: FSP Wrapper is running in API mode.
+ #
+ gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection|1
!if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE
gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|0x1
@@ -49,9 +54,33 @@
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase|0xFEF00000
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize|0x00040000
+!if gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection == 1
+ #
+ # FSP API mode is backward compatible with earlier FSP which
+ # does not share stack with boot loader, so FSP needs more
+ # temporary memory for FSP heap + stack size.
+ #
gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize | 0x00026000
+ #
+ # In FSP API mode, FSP and boot loader runnig on different stack
+ # so no need to enlarge boot loader stack size.
+ #
gSiPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0x20000
+!else
+ #
+ # FSP Dispatch mode will share the same stack with boot loader,
+ # here temporary ram size is used by FSP heap and can be smaller
+ #
+ gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize | 0x00010000
+
+ #
+ # In FSP Dispatch mode boot loader stack size must be big enough for executing
+ # both boot loader and FSP.
+ #
+ gSiPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0x40000
+!endif
+
gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x5000
gEfiMdeModulePkgTokenSpaceGuid.PcdHwErrStorageSize|0x00000800
gEfiMdeModulePkgTokenSpaceGuid.PcdMaxHardwareErrorVariableSize|0x400
--
2.13.3.windows.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [edk2-devel] [PATCH 1/2] KabylakeSiliconPkg: Add FSP Dispatch switch.
2019-05-22 8:35 ` [PATCH 1/2] KabylakeSiliconPkg: Add FSP Dispatch switch Chiu, Chasel
@ 2019-05-29 1:12 ` Nate DeSimone
0 siblings, 0 replies; 5+ messages in thread
From: Nate DeSimone @ 2019-05-29 1:12 UTC (permalink / raw)
To: devel@edk2.groups.io, Chiu, Chasel; +Cc: Kubacki, Michael A
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Chiu, Chasel
Sent: Wednesday, May 22, 2019 1:35 AM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@intel.com>; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; Kubacki, Michael A <michael.a.kubacki@intel.com>
Subject: [edk2-devel] [PATCH 1/2] KabylakeSiliconPkg: Add FSP Dispatch switch.
From: "Chasel, Chiu" <chasel.chiu@intel.com>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1832
PcdFspModeSelection is used as switch for boot loader to consume FSP in API mode or Dispatch mode. For backward compatibility, if boot loader running in FSP API mode the KabylakeFspBinPkg will be used which does not have FSP 2.1 changes. For FSP Dispatch mode AmberLakeFspBinPkg will be used with FSP 2.1 support.
One INF was duplicate to include different DEC file in each build type.
Test: Booted Kabylake RVP3 to Windows successfully.
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Michael Kubacki <michael.a.kubacki@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
---
Silicon/Intel/KabylakeSiliconPkg/Library/PeiSiliconPolicyInitLibFsp/PeiSiliconPolicyInitLibFspAml.inf | 146 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 146 insertions(+)
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Library/PeiSiliconPolicyInitLibFsp/PeiSiliconPolicyInitLibFspAml.inf b/Silicon/Intel/KabylakeSiliconPkg/Library/PeiSiliconPolicyInitLibFsp/PeiSiliconPolicyInitLibFspAml.inf
new file mode 100644
index 0000000000..aebd3583bc
--- /dev/null
+++ b/Silicon/Intel/KabylakeSiliconPkg/Library/PeiSiliconPolicyInitLibFs
+++ p/PeiSiliconPolicyInitLibFspAml.inf
@@ -0,0 +1,146 @@
+### @file
+# Library functions for Fsp Policy Initialization Library.
+#
+# Copyright (c) 2019, Intel Corporation. All rights reserved.<BR> # #
+SPDX-License-Identifier: BSD-2-Clause-Patent # ##
+
+#######################################################################
+#########
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+#######################################################################
+#########
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = PeiSiliconPolicyInitLibFspAml
+ FILE_GUID = 930816C4-D182-4A23-BF21-9AED635AF06C
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = SiliconPolicyInitLib
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32
+#
+
+#######################################################################
+#########
+#
+# Sources Section - list of files that are required for the build to succeed.
+#
+#######################################################################
+#########
+
+[Sources]
+ PeiFspPolicyInitLib.c
+ PeiFspSiPolicyInitLib.c
+ PeiFspPchPolicyInitLib.c
+ PeiFspCpuPolicyInitLib.c
+ PeiFspMePolicyInitLib.c
+ PeiFspSaPolicyInitLib.c
+ PeiFspMiscUpdInitLib.c
+
+ PeiPolicyInitPreMem.c
+ PeiPolicyInit.c
+ PeiPolicyInit.h
+
+#######################################################################
+#########
+#
+# Package Dependency Section - list of Package files that are required for
+# this module.
+#
+#######################################################################
+#########
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ IntelFsp2Pkg/IntelFsp2Pkg.dec
+ IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
+ KabylakeSiliconPkg/SiPkg.dec
+ AmberLakeFspBinPkg/AmberLakeFspBinPkg.dec
+
+[LibraryClasses]
+ BaseMemoryLib
+ DebugLib
+ IoLib
+ PeiServicesLib
+ PcdLib
+ SmbusLib
+ MmPciLib
+ ConfigBlockLib
+ MemoryAllocationLib
+ DebugPrintErrorLevelLib
+ FspWrapperApiLib
+
+[Pcd]
+ gSiPkgTokenSpaceGuid.PcdTsegSize ## CONSUMES
+ gSiPkgTokenSpaceGuid.PcdSmbusBaseAddress ## CONSUMES
+ gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase ## CONSUMES
+ gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize ## CONSUMES
+ gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize ## CONSUMES
+ gIntelFsp2PkgTokenSpaceGuid.PcdFspReservedBufferSize ## CONSUMES
+ gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress ## CONSUMES
+ gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress ## CONSUMES
+ gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress ## CONSUMES
+ gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress ## CONSUMES
+
+[Ppis]
+ gSiPolicyPpiGuid ## CONSUMES
+ gSiPreMemPolicyPpiGuid ## CONSUMES
+
+[Guids]
+ gTraceHubPreMemConfigGuid ## CONSUMES
+ gSmbusPreMemConfigGuid ## CONSUMES
+ gDciPreMemConfigGuid ## CONSUMES
+ gHpetPreMemConfigGuid ## CONSUMES
+ gHsioPciePreMemConfigGuid ## CONSUMES
+ gHsioSataPreMemConfigGuid ## CONSUMES
+ gHsioPreMemConfigGuid ## CONSUMES
+ gPcieRpPreMemConfigGuid ## CONSUMES
+ gLpcPreMemConfigGuid ## CONSUMES
+ gPchGeneralPreMemConfigGuid ## CONSUMES
+ gWatchDogPreMemConfigGuid ## CONSUMES
+ gLanConfigGuid ## CONSUMES
+ gPcieRpConfigGuid ## CONSUMES
+ gSataConfigGuid ## CONSUMES
+ gHdAudioConfigGuid ## CONSUMES
+ gCio2ConfigGuid ## CONSUMES
+ gScsConfigGuid ## CONSUMES
+ gIshConfigGuid ## CONSUMES
+ gSpiConfigGuid ## CONSUMES
+ gSataConfigGuid ## CONSUMES
+ gUsbConfigGuid ## CONSUMES
+ gSerialIoConfigGuid ## CONSUMES
+ gInterruptConfigGuid ## CONSUMES
+ gLockDownConfigGuid ## CONSUMES
+ gSaMiscPeiPreMemConfigGuid ## PRODUCES
+ gMemoryConfigGuid ## CONSUMES
+ gMemoryConfigNoCrcGuid ## CONSUMES
+ gGraphicsPeiConfigGuid ## CONSUMES
+ gMePeiPreMemConfigGuid ## CONSUMES
+ gMePeiConfigGuid ## CONSUMES
+ gAmtPeiConfigGuid ## CONSUMES
+ gDmiConfigGuid ## CONSUMES
+ gFlashProtectionConfigGuid ## CONSUMES
+ gIoApicConfigGuid ## CONSUMES
+ gPmConfigGuid ## CONSUMES
+ gP2sbConfigGuid ## CONSUMES
+ gPchGeneralConfigGuid ## CONSUMES
+ gPort61ConfigGuid ## CONSUMES
+ gSerialIrqConfigGuid ## CONSUMES
+ gThermalConfigGuid ## CONSUMES
+ gCpuSecurityPreMemConfigGuid ## CONSUMES
+ gCpuTxtPreMemConfigGuid ## CONSUMES
+ gCpuConfigGuid ## CONSUMES
+ gBiosGuardConfigGuid ## CONSUMES
+ gCpuOverclockingPreMemConfigGuid ## CONSUMES
+ gCpuConfigLibPreMemConfigGuid ## CONSUMES
+ gCpuSgxConfigGuid ## CONSUMES
+ gCpuPowerMgmtBasicConfigGuid ## CONSUMES
+ gCpuPowerMgmtCustomConfigGuid ## CONSUMES
+ gCpuTestConfigGuid ## CONSUMES
+ gCpuPidTestConfigGuid ## CONSUMES
+ gCpuPowerMgmtTestConfigGuid ## CONSUMES
+ gSmramCpuDataHeaderGuid ## CONSUMES
+ gFspReservedMemoryResourceHobTsegGuid ## CONSUMES
--
2.13.3.windows.1
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 2/2] KabylakeOpenBoardPkg: Add FSP Dispatch switch.
2019-05-22 8:35 ` [PATCH 2/2] KabylakeOpenBoardPkg: " Chiu, Chasel
@ 2019-05-29 1:12 ` Nate DeSimone
0 siblings, 0 replies; 5+ messages in thread
From: Nate DeSimone @ 2019-05-29 1:12 UTC (permalink / raw)
To: Chiu, Chasel, devel@edk2.groups.io; +Cc: Kubacki, Michael A
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
-----Original Message-----
From: Chiu, Chasel
Sent: Wednesday, May 22, 2019 1:35 AM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@intel.com>; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; Kubacki, Michael A <michael.a.kubacki@intel.com>
Subject: [PATCH 2/2] KabylakeOpenBoardPkg: Add FSP Dispatch switch.
From: "Chasel, Chiu" <chasel.chiu@intel.com>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1832
Basing on PcdFspModeSelection setting either KabylakeFspBinPkg or AmberLakeFspBinPkg will be used and temporary memory arrangement will be different as AmberLakeFspBinPkg will share the same stack with boot loader. Also enlarged FSP-T size to support future larger FSP binary.
Test: Booted Kabylake RVP3 to Windows successfully.
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Michael Kubacki <michael.a.kubacki@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
---
Platform/Intel/KabylakeOpenBoardPkg/Include/Fdf/FlashMapInclude.fdf | 8 ++++----
Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc | 33 +++++++++++++++++++++++++++++----
Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc | 29 +++++++++++++++++++++++++++++
3 files changed, 62 insertions(+), 8 deletions(-)
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/Include/Fdf/FlashMapInclude.fdf b/Platform/Intel/KabylakeOpenBoardPkg/Include/Fdf/FlashMapInclude.fdf
index 3a28bd4109..6cb49c941c 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/Include/Fdf/FlashMapInclude.fdf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/Include/Fdf/FlashMapInclude.fd
+++ f
@@ -1,7 +1,7 @@
## @file
# FDF file of Platform.
#
-# Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2017 - 2019, Intel Corporation. All rights
+reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent #
@@ -41,6 +41,6 @@ SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize = 0x00060000
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset = 0x00600000 # Flash addr (0xFFE00000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize = 0x000BC000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset = 0x006BC000 # Flash addr (0xFFEBC000)
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize = 0x00004000 #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset = 0x006C0000 # Flash addr (0xFFEC0000)
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize = 0x00140000 #
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize = 0x00014000 #
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset = 0x006D0000 # Flash addr (0xFFED0000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize = 0x00130000 #
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
index 7f19ad1eed..1dfe49a7ad 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
@@ -15,7 +15,7 @@
DEFINE PLATFORM_PACKAGE = MinPlatformPkg
DEFINE PLATFORM_SI_PACKAGE = KabylakeSiliconPkg
DEFINE PLATFORM_SI_BIN_PACKAGE = KabylakeSiliconBinPkg
- DEFINE PLATFORM_FSP_BIN_PACKAGE = KabylakeFspBinPkg
+ DEFINE PLATFORM_FSP_BIN_PACKAGE = AmberLakeFspBinPkg
DEFINE PLATFORM_BOARD_PACKAGE = KabylakeOpenBoardPkg
DEFINE BOARD = KabylakeRvp3
DEFINE PROJECT = $(PLATFORM_BOARD_PACKAGE)/$(BOARD)
@@ -24,6 +24,21 @@
# Platform On/Off features are defined here
#
!include OpenBoardPkgConfig.dsc
+ !include OpenBoardPkgPcd.dsc
+
+[Defines]
+!if gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection == 1
+ #
+ # For backward compatibility API mode will use KabylakeFspBinPkg.
+ # KabylakeFspBinPkg only supports API mode.
+ #
+ DEFINE PLATFORM_FSP_BIN_PACKAGE = KabylakeFspBinPkg
+!else
+ #
+ # AmberLakeFspBinPkg supports both API and Dispatch modes
+ #
+ DEFINE PLATFORM_FSP_BIN_PACKAGE = AmberLakeFspBinPkg
+!endif
################################################################################
#
@@ -92,8 +107,20 @@
FspWrapperApiTestLib|IntelFsp2WrapperPkg/Library/PeiFspWrapperApiTestLib/PeiFspWrapperApiTestLib.inf
FspWrapperPlatformLib|$(PLATFORM_PACKAGE)/FspWrapper/Library/PeiFspWrapperPlatformLib/PeiFspWrapperPlatformLib.inf
- SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconPolicyInitLibFsp/PeiSiliconPolicyInitLibFsp.inf
+
+!if gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection == 1
+ #
+ # Below library are used by FSP API mode
+ #
SiliconPolicyUpdateLib|$(PLATFORM_BOARD_PACKAGE)/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf
+
+SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconPolicyIni
+tLibFsp/PeiSiliconPolicyInitLibFsp.inf
+!else
+ #
+ # Below library are used by FSP Dispatch mode and non-FSP build (EDK2
+build)
+ #
+
+SiliconPolicyUpdateLib|$(PLATFORM_BOARD_PACKAGE)/Policy/Library/PeiSili
+conPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf
+
+SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconPolicyIni
+tLibFsp/PeiSiliconPolicyInitLibFspAml.inf
+!endif
ConfigBlockLib|$(PLATFORM_SI_PACKAGE)/Library/BaseConfigBlockLib/BaseConfigBlockLib.inf
SiliconInitLib|$(PLATFORM_SI_PACKAGE)/Library/SiliconInitLib/SiliconInitLib.inf
@@ -173,8 +200,6 @@
[LibraryClasses.X64.DXE_RUNTIME_DRIVER]
ResetSystemLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/DxeRuntimeResetSystemLib/DxeRuntimeResetSystemLib.inf
-!include OpenBoardPkgPcd.dsc
-
[Components.IA32]
#
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc
index 9774acb5eb..63d0c4c2e6 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.d
+++ sc
@@ -28,6 +28,11 @@
[PcdsFixedAtBuild.common]
gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode|TRUE
+ #
+ # 0: FSP Wrapper is running in Dispatch mode.
+ # 1: FSP Wrapper is running in API mode.
+ #
+ gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection|1
!if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE
gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|0x1
@@ -49,9 +54,33 @@
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase|0xFEF00000
gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize|0x00040000
+!if gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection == 1
+ #
+ # FSP API mode is backward compatible with earlier FSP which
+ # does not share stack with boot loader, so FSP needs more
+ # temporary memory for FSP heap + stack size.
+ #
gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize | 0x00026000
+ #
+ # In FSP API mode, FSP and boot loader runnig on different stack #
+ so no need to enlarge boot loader stack size.
+ #
gSiPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0x20000
+!else
+ #
+ # FSP Dispatch mode will share the same stack with boot loader,
+ # here temporary ram size is used by FSP heap and can be smaller
+ #
+ gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize | 0x00010000
+
+ #
+ # In FSP Dispatch mode boot loader stack size must be big enough for
+executing
+ # both boot loader and FSP.
+ #
+ gSiPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0x40000
+!endif
+
gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x5000
gEfiMdeModulePkgTokenSpaceGuid.PcdHwErrStorageSize|0x00000800
gEfiMdeModulePkgTokenSpaceGuid.PcdMaxHardwareErrorVariableSize|0x400
--
2.13.3.windows.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
end of thread, other threads:[~2019-05-29 1:12 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2019-05-22 8:35 [PATCH 0/2] Add FSP Dispatch mode switch Chiu, Chasel
2019-05-22 8:35 ` [PATCH 1/2] KabylakeSiliconPkg: Add FSP Dispatch switch Chiu, Chasel
2019-05-29 1:12 ` [edk2-devel] " Nate DeSimone
2019-05-22 8:35 ` [PATCH 2/2] KabylakeOpenBoardPkg: " Chiu, Chasel
2019-05-29 1:12 ` Nate DeSimone
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