From: "Nate DeSimone" <nathaniel.l.desimone@intel.com>
To: "Chiu, Chasel" <chasel.chiu@intel.com>,
"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: "Kubacki, Michael A" <michael.a.kubacki@intel.com>,
"Chaganty, Rangasai V" <rangasai.v.chaganty@intel.com>
Subject: Re: [PATCH 1/2] KabylakeSiliconPkg: Support DynamicExPCD from FSP.
Date: Wed, 5 Jun 2019 19:45:40 +0000 [thread overview]
Message-ID: <02A34F284D1DA44BB705E61F7180EF0AAEBD24F0@ORSMSX114.amr.corp.intel.com> (raw)
In-Reply-To: <20190531114207.21112-2-chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
-----Original Message-----
From: Chiu, Chasel
Sent: Friday, May 31, 2019 4:42 AM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@intel.com>; Kubacki, Michael A <michael.a.kubacki@intel.com>; Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>
Subject: [PATCH 1/2] KabylakeSiliconPkg: Support DynamicExPCD from FSP.
From: "Chasel, Chiu" <chasel.chiu@intel.com>
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1864
FSP Dispatch mode can consume DynamicEx PCD from boot loader so it must include those PCD in PCD database for FSP to consume.
PeiPostMemSiliconPolicyInitLib.inf (this is for FSP Dispatch mode) has all PCDs included to ensure they can be built into PCD database.
Also cleaned up unused PciExpress related PCD from INFs.
Cc: Michael A Kubacki <michael.a.kubacki@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
---
Silicon/Intel/KabylakeSiliconPkg/Library/PeiDxeSmmMmPciLib/PeiDxeSmmMmPciLib.c | 8 ++++++--
Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiDxeSmmCpuPlatformLib/PeiDxeSmmCpuPlatformLib.inf | 7 +------
Silicon/Intel/KabylakeSiliconPkg/KabylakeSiliconPkg.dsc | 6 +++++-
Silicon/Intel/KabylakeSiliconPkg/Library/PeiDxeSmmMmPciLib/PeiDxeSmmMmPciLib.inf | 5 +++--
Silicon/Intel/KabylakeSiliconPkg/Library/SiliconInitLib/SiliconInitLib.inf | 3 +--
Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec | 8 ++++++--
Silicon/Intel/KabylakeSiliconPkg/SystemAgent/Library/PeiDxeSmmSaPlatformLib/PeiDxeSmmSaPlatformLib.inf | 7 +------
Silicon/Intel/KabylakeSiliconPkg/SystemAgent/Library/PeiSaPolicyLib/PeiSaPolicyLib.inf | 3 +--
Silicon/Intel/KabylakeSiliconPkg/SystemAgent/SaInit/Dxe/SaInitDxe.inf | 3 +--
9 files changed, 25 insertions(+), 25 deletions(-)
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Library/PeiDxeSmmMmPciLib/PeiDxeSmmMmPciLib.c b/Silicon/Intel/KabylakeSiliconPkg/Library/PeiDxeSmmMmPciLib/PeiDxeSmmMmPciLib.c
index 51a06528e0..d99ee8e644 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Library/PeiDxeSmmMmPciLib/PeiDxeSmmMmPciLib.c
+++ b/Silicon/Intel/KabylakeSiliconPkg/Library/PeiDxeSmmMmPciLib/PeiDxeS
+++ mmMmPciLib.c
@@ -1,7 +1,7 @@
/** @file
This file contains routines that get PCI Express Address
-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -27,5 +27,9 @@ MmPciBase (
{
ASSERT ((Bus <= 0xFF) && (Device <= 0x1F) && (Function <= 0x7));
- return ((UINTN) PcdGet64 (PcdPciExpressBaseAddress) + (UINTN) (Bus << 20) + (UINTN) (Device << 15) + (UINTN) (Function << 12));
+#ifdef FSP_FLAG
+ return ((UINTN) PcdGet64 (PcdSiPciExpressBaseAddress) + (UINTN) (Bus
+<< 20) + (UINTN) (Device << 15) + (UINTN) (Function << 12)); #else
+ return ((UINTN) PcdGet64 (PcdPciExpressBaseAddress) + (UINTN) (Bus << 20) + (UINTN) (Device << 15) + (UINTN) (Function << 12));
+#endif
}
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiDxeSmmCpuPlatformLib/PeiDxeSmmCpuPlatformLib.inf b/Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiDxeSmmCpuPlatformLib/PeiDxeSmmCpuPlatformLib.inf
index 21d441a577..d2e813fea3 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiDxeSmmCpuPlatformLib/PeiDxeSmmCpuPlatformLib.inf
+++ b/Silicon/Intel/KabylakeSiliconPkg/Cpu/Library/PeiDxeSmmCpuPlatformL
+++ ib/PeiDxeSmmCpuPlatformLib.inf
@@ -1,7 +1,7 @@
## @file
# Component description file for CPU Platform Lib # -# Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2017 - 2019, Intel Corporation. All rights
+reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -34,11 +34,6 @@ MdePkg/MdePkg.dec UefiCpuPkg/UefiCpuPkg.dec KabylakeSiliconPkg/SiPkg.dec
-
-[Pcd]
-gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
-
-
[Sources]
CpuPlatformLibrary.h
CpuPlatformLibrary.c
diff --git a/Silicon/Intel/KabylakeSiliconPkg/KabylakeSiliconPkg.dsc b/Silicon/Intel/KabylakeSiliconPkg/KabylakeSiliconPkg.dsc
index 5b114ae99e..aa481d0307 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/KabylakeSiliconPkg.dsc
+++ b/Silicon/Intel/KabylakeSiliconPkg/KabylakeSiliconPkg.dsc
@@ -47,7 +47,11 @@ gSiPkgTokenSpaceGuid.PcdSiCatalogDebugEnable |FALSE
[PcdsFixedAtBuild.common]
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress |0xE0000000
-gSiPkgTokenSpaceGuid.PcdPciExpressRegionLength |0x10000000
+gSiPkgTokenSpaceGuid.PcdSiPciExpressRegionLength |0x10000000
+#
+# This DSC mainly for GreenH Silicon code build so
+PciExpressBaseAddress can be FixedAtBuild #
+gSiPkgTokenSpaceGuid.PcdSiPciExpressBaseAddress|gEfiMdePkgTokenSpaceGui
+d.PcdPciExpressBaseAddress
[Defines]
PLATFORM_NAME = KabylakeSiliconPkg
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Library/PeiDxeSmmMmPciLib/PeiDxeSmmMmPciLib.inf b/Silicon/Intel/KabylakeSiliconPkg/Library/PeiDxeSmmMmPciLib/PeiDxeSmmMmPciLib.inf
index 8ae40a0c9e..02495953a7 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Library/PeiDxeSmmMmPciLib/PeiDxeSmmMmPciLib.inf
+++ b/Silicon/Intel/KabylakeSiliconPkg/Library/PeiDxeSmmMmPciLib/PeiDxeS
+++ mmMmPciLib.inf
@@ -1,7 +1,7 @@
## @file
# Component description file for the PeiDxeSmmMmPciLib # -# Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2017 - 2019, Intel Corporation. All rights
+reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -31,11 +31,12 @@ DebugLib
[Packages]
MdePkg/MdePkg.dec
+KabylakeSiliconPkg/SiPkg.dec
[Pcd]
+gSiPkgTokenSpaceGuid.PcdSiPciExpressBaseAddress
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
-
[Sources]
PeiDxeSmmMmPciLib.c
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Library/SiliconInitLib/SiliconInitLib.inf b/Silicon/Intel/KabylakeSiliconPkg/Library/SiliconInitLib/SiliconInitLib.inf
index 9007f299bb..132080e876 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Library/SiliconInitLib/SiliconInitLib.inf
+++ b/Silicon/Intel/KabylakeSiliconPkg/Library/SiliconInitLib/SiliconIni
+++ tLib.inf
@@ -1,6 +1,6 @@
### @file
#
-# Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2017 - 2019, Intel Corporation. All rights
+reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -44,7 +44,6 @@
SiliconInitPreMem.c
[Pcd]
- gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress ## CONSUMES
gSiPkgTokenSpaceGuid.PcdAcpiBaseAddress ## CONSUMES
gSiPkgTokenSpaceGuid.PcdTcoBaseAddress ## CONSUMES
diff --git a/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec b/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec
index a613079dd4..baee73038b 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec
+++ b/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec
@@ -573,8 +573,12 @@ gSiPkgTokenSpaceGuid.PcdSerialIoUartInputClock |1843200|UINT32|0x00100003 ## PCI Express MMIO region length ## Valid settings: 0x10000000/256MB, 0x8000000/128MB, 0x4000000/64MB ##
-gSiPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000|UINT32|0x0010004
-
+gSiPkgTokenSpaceGuid.PcdSiPciExpressRegionLength|0x10000000|UINT32|0x00
+10004
+##
+## Typically this should be the same with gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress.
+## This PCD is added for supporting different PCD type in different phases.
+##
+gSiPkgTokenSpaceGuid.PcdSiPciExpressBaseAddress
+|0xE0000000|UINT64|0x0010008
[PcdsFeatureFlag]
##
diff --git a/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/Library/PeiDxeSmmSaPlatformLib/PeiDxeSmmSaPlatformLib.inf b/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/Library/PeiDxeSmmSaPlatformLib/PeiDxeSmmSaPlatformLib.inf
index 9fe71e5bac..5b034c2e9d 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/Library/PeiDxeSmmSaPlatformLib/PeiDxeSmmSaPlatformLib.inf
+++ b/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/Library/PeiDxeSmmSaPl
+++ atformLib/PeiDxeSmmSaPlatformLib.inf
@@ -1,7 +1,7 @@
## @file
# Component description file for SA Platform Lib # -# Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2017 - 2019, Intel Corporation. All rights
+reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -28,11 +28,6 @@ IoLib MdePkg/MdePkg.dec KabylakeSiliconPkg/SiPkg.dec
-
-[Pcd]
-gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
-
-
[Sources]
SaPlatformLibrary.h
SaPlatformLibrary.c
diff --git a/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/Library/PeiSaPolicyLib/PeiSaPolicyLib.inf b/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/Library/PeiSaPolicyLib/PeiSaPolicyLib.inf
index 8fae4cee61..2adfc28d6c 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/Library/PeiSaPolicyLib/PeiSaPolicyLib.inf
+++ b/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/Library/PeiSaPolicyLi
+++ b/PeiSaPolicyLib.inf
@@ -1,7 +1,7 @@
## @file
# Component description file for the PeiSaPolicy library.
#
-# Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2017 - 2019, Intel Corporation. All rights
+reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -35,7 +35,6 @@ UefiCpuPkg/UefiCpuPkg.dec KabylakeSiliconPkg/SiPkg.dec
[Pcd]
-gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
gSiPkgTokenSpaceGuid.PcdTsegSize
gSiPkgTokenSpaceGuid.PcdMchBaseAddress
gSiPkgTokenSpaceGuid.PcdSmbusBaseAddress
diff --git a/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/SaInit/Dxe/SaInitDxe.inf b/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/SaInit/Dxe/SaInitDxe.inf
index cc05f336b3..3c4c79affb 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/SaInit/Dxe/SaInitDxe.inf
+++ b/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/SaInit/Dxe/SaInitDxe.
+++ inf
@@ -1,7 +1,7 @@
## @file
# Component description file for SystemAgent Initialization driver # -# Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2017 - 2019, Intel Corporation. All rights
+reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -53,7 +53,6 @@ KabylakeSiliconPkg/KabylakeSiliconPrivate.dec
[Pcd]
-gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
gSiPkgTokenSpaceGuid.PcdAcpiDefaultOemId
gSiPkgTokenSpaceGuid.PcdMchBaseAddress
--
2.19.1.windows.1
next prev parent reply other threads:[~2019-06-05 19:45 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-31 11:42 [PATCH 0/2] Support DynamicExPCD from FSP Chiu, Chasel
2019-05-31 11:42 ` [PATCH 1/2] KabylakeSiliconPkg: " Chiu, Chasel
2019-06-05 19:45 ` Nate DeSimone [this message]
2019-05-31 11:42 ` [PATCH 2/2] KabylakeOpenBoardPkg: " Chiu, Chasel
2019-06-05 19:45 ` Nate DeSimone
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