From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 134.134.136.20, mailfrom: nathaniel.l.desimone@intel.com) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by groups.io with SMTP; Wed, 05 Jun 2019 12:45:43 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Jun 2019 12:45:43 -0700 X-ExtLoop1: 1 Received: from orsmsx109.amr.corp.intel.com ([10.22.240.7]) by fmsmga006.fm.intel.com with ESMTP; 05 Jun 2019 12:45:43 -0700 Received: from orsmsx114.amr.corp.intel.com ([169.254.8.116]) by ORSMSX109.amr.corp.intel.com ([169.254.11.251]) with mapi id 14.03.0415.000; Wed, 5 Jun 2019 12:45:42 -0700 From: "Nate DeSimone" To: "Chiu, Chasel" , "devel@edk2.groups.io" CC: "Kubacki, Michael A" , "Chaganty, Rangasai V" Subject: Re: [PATCH 2/2] KabylakeOpenBoardPkg: Support DynamicExPCD from FSP. Thread-Topic: [PATCH 2/2] KabylakeOpenBoardPkg: Support DynamicExPCD from FSP. Thread-Index: AQHVF6Xnw135JkSD2k+UmpKAOvtnOKaNfnkw Date: Wed, 5 Jun 2019 19:45:42 +0000 Message-ID: <02A34F284D1DA44BB705E61F7180EF0AAEBD24FC@ORSMSX114.amr.corp.intel.com> References: <20190531114207.21112-1-chasel.chiu@intel.com> <20190531114207.21112-3-chasel.chiu@intel.com> In-Reply-To: <20190531114207.21112-3-chasel.chiu@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiMTQzZThiNmMtOTMwMS00ZDc0LTljY2EtZmMzNjVkNjZiM2NkIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiMzg2Zk0rVWJcL2Q0MUZNZkxwbnNNYVVZcWlNTlRXcnNoUGFUWndKeklQWnNpYU1SdzBEeU9idVcwMXVJUVA2WXAifQ== x-ctpclassification: CTP_NT x-originating-ip: [10.22.254.138] MIME-Version: 1.0 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Nate DeSimone -----Original Message----- From: Chiu, Chasel=20 Sent: Friday, May 31, 2019 4:42 AM To: devel@edk2.groups.io Cc: Chiu, Chasel ; Kubacki, Michael A ; Chaganty, Rangasai V ; Desi= mone, Nathaniel L Subject: [PATCH 2/2] KabylakeOpenBoardPkg: Support DynamicExPCD from FSP. From: "Chasel, Chiu" REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1864 Cleaned up unused PciExpress related PCD from INF and remove unnecessary DE= FINE from DSC. Defines some PCDs as different types per API mode or Dispatch mode, also en= large PeiMemory for Dispatch mode as both FSP and boot loader shares the sa= me PeiMemory. Test: Boot with FSP API mode successfully. Cc: Michael A Kubacki Cc: Sai Chaganty Cc: Nate DeSimone Signed-off-by: Chasel Chiu --- Platform/Intel/KabylakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtSmm.inf | = 3 +-- Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc | = 17 ++++++++++++++++- Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc | = 25 +++++++++++++++++++------ 3 files changed, 36 insertions(+), 9 deletions(-) diff --git a/Platform/Intel/KabylakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/T= btSmm.inf b/Platform/Intel/KabylakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/Tb= tSmm.inf index 9218c8fe67..8bc2f8729f 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtSmm.i= nf +++ b/Platform/Intel/KabylakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtSm +++ m.inf @@ -1,7 +1,7 @@ ### @file # Component information file for the ThunderBolt Smm module. # -# Copyright (c) 2018, Intel Corporation. All rights reserved.
+# Copyright (c) 2018 - 2019, Intel Corporation. All rights=20 +reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -44,7 +44,6 @@ =20 [Pcd] gBoardModuleTokenSpaceGuid.PcdSwSmiDTbtEnumerate ## CONSUMES - gSiPkgTokenSpaceGuid.PcdPciExpressRegionLength ## CONSUMES =20 [FixedPcd] gSiPkgTokenSpaceGuid.PcdAcpiBaseAddress ## CONSUMES diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.= dsc b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc index 1dfe49a7ad..8dbdf25787 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc +++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc @@ -15,7 +15,6 @@ DEFINE PLATFORM_PACKAGE =3D MinPlatformPkg DEFINE PLATFORM_SI_PACKAGE =3D KabylakeSiliconPkg DEFINE PLATFORM_SI_BIN_PACKAGE =3D KabylakeSiliconBinPkg - DEFINE PLATFORM_FSP_BIN_PACKAGE =3D AmberLakeFspBinPkg DEFINE PLATFORM_BOARD_PACKAGE =3D KabylakeOpenBoardPkg DEFINE BOARD =3D KabylakeRvp3 DEFINE PROJECT =3D $(PLATFORM_BOARD_PACKAGE= )/$(BOARD) @@ -40,6 +39,22 @@ DEFINE PLATFORM_FSP_BIN_PACKAGE =3D AmberLakeFspBinPkg !endif =20 +[PcdsDynamicExDefault.common.DEFAULT] +!if gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode =3D=3D TRUE !if=20 +gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection =3D=3D 0 + # + # Include FSP DynamicEx PCD settings in Dispatch mode + # + !include $(PLATFORM_FSP_BIN_PACKAGE)/FspPcds.dsc + + # + # Override some FSP consumed PCD default value to match platform require= ment. + # + gSiPkgTokenSpaceGuid.PcdSiPciExpressBaseAddress=20 +|gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress + =20 +gSiPkgTokenSpaceGuid.PcdSiPciExpressRegionLength|gMinPlatformPkgTokenSp +aceGuid.PcdPciExpressRegionLength +!endif +!endif + ##########################################################################= ###### # # Defines Section - statements that will be processed to create a Makefile= . diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgP= cd.dsc b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.d= sc index 63d0c4c2e6..fbd43a6947 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc +++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.d +++ sc @@ -48,7 +48,7 @@ gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount|1 =20 gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000 - gSiPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000 + gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000 gSiPkgTokenSpaceGuid.PcdTemporaryRamBase|0xFEF80000 gSiPkgTokenSpaceGuid.PcdTemporaryRamSize|0x00040000 gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase|0xFEF00000 @@ -147,6 +147,15 @@ gSiPkgTokenSpaceGuid.PcdTsegSize|0x800000 gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0xFFEBC000 gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0xFFE00000 =20 + ## Specifies timeout value in microseconds for the BSP to detect all APs= for the first time. + # @Prompt Timeout for the BSP to detect all APs for the first time. + gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|1000 + +!if (gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode =3D=3D FALSE) ||= =20 +(gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection =3D=3D 1) + # + # In non-FSP build (EDK2 build) or FSP API mode below PCD are=20 +FixedAtBuild + # (They will be DynamicEx in FSP Dispatch mode) + # ## Specifies max supported number of Logical Processors. # @Prompt Configure max supported number of Logical Processorss gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|12 @@ -155,10 +164,6 @@ gSiPkgTokenSpaceGuid.PcdTsegSize|0x800000 # @Prompt Microcode Region size. gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0 =20 - ## Specifies timeout value in microseconds for the BSP to detect all APs= for the first time. - # @Prompt Timeout for the BSP to detect all APs for the first time. - gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|1000 - ## Specifies the AP wait loop state during POST phase. # The value is defined as below. # 1: Place AP in the Hlt-Loop state. @@ -167,6 +172,15 @@ gSiPkgTokenSpaceGuid.PcdTsegSize|0x800000 # @Prompt The AP wait loop state. gUefiCpuPkgTokenSpaceGuid.PcdCpuApLoopMode|2 =20 + =20 +gSiPkgTokenSpaceGuid.PcdSiPciExpressBaseAddress|gEfiMdePkgTokenSpaceGui +d.PcdPciExpressBaseAddress + =20 +gSiPkgTokenSpaceGuid.PcdSiPciExpressRegionLength|gMinPlatformPkgTokenSp +aceGuid.PcdPciExpressRegionLength +!else + # + # FSP Dispatch mode requires more platform memory as boot loader and=20 +FSP sharing the same + # platform memory. + # + gSiPkgTokenSpaceGuid.PcdPeiMinMemorySize|0x5500000 +!endif =20 # # The PCDs are used to control the Windows SMM Security Mitigations Tabl= e - Protection Flags @@ -294,4 +308,3 @@ gBoardModuleTokenSpaceGuid.PcdDTbt= PcieMemAddrRngMax | 26 gBoardModuleTokenSpaceGuid.PcdDTbtPciePMemRsvd | 10= 0 gBoardModuleTokenSpaceGuid.PcdDTbtPciePMemAddrRngMax | 28 gBoardModuleT= okenSpaceGuid.PcdPchPcieRootPortHpe| 0x00000001 - -- 2.19.1.windows.1