Re: [edk2-devel] [PATCH 1/2] KabylakeSiliconPkg: FSP 2.1 SEC handling.

["Nate DeSimone" <nathaniel.l.desimone@intel.com>]

Hi Chasel,

FSP_TEMP_RAM_EXIT_PPI is defined by the FSP 2.1 specification. The definition for it should not go in KabyLakeSiliconPkg, it should be placed in IntelFsp2Pkg/Include/Ppi.

Thanks,
Nate

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Chiu, Chasel
Sent: Friday, May 31, 2019 4:43 AM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@intel.com>; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; Kubacki, Michael A <michael.a.kubacki@intel.com>; Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>
Subject: [edk2-devel] [PATCH 1/2] KabylakeSiliconPkg: FSP 2.1 SEC handling.

From: "Chasel, Chiu" <chasel.chiu@intel.com>

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1865

To support FSP Dispatch mode, PlatformSecLib should consume FSP_TEMP_RAM_EXIT_PPI to disable temporary memory. This patch added the definition of this FSP_TEMP_RAM_EXIT_PPI.

Test: API mode no impact and can still booted.

Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Michael A Kubacki <michael.a.kubacki@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
---
 Silicon/Intel/KabylakeSiliconPkg/Include/Ppi/TempRamExitPpi.h | 50 ++++++++++++++++++++++++++++++++++++++++++++++++++
 Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec                    |  2 ++
 2 files changed, 52 insertions(+)

diff --git a/Silicon/Intel/KabylakeSiliconPkg/Include/Ppi/TempRamExitPpi.h b/Silicon/Intel/KabylakeSiliconPkg/Include/Ppi/TempRamExitPpi.h
new file mode 100644
index 0000000000..9e728a5d4d
--- /dev/null
+++ b/Silicon/Intel/KabylakeSiliconPkg/Include/Ppi/TempRamExitPpi.h
@@ -0,0 +1,50 @@
+/** @file
+  This file defines the Silicon Temp Ram Exit PPI which implements the
+  required programming steps for disabling temporary memory.
+
+Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _FSP_TEMP_RAM_EXIT_PPI_H_
+#define _FSP_TEMP_RAM_EXIT_PPI_H_
+
+///
+/// Global ID for the FSP_TEMP_RAM_EXIT_PPI.
+///
+#define FSP_TEMP_RAM_EXIT_GUID \
+  { \
+    0xbc1cfbdb, 0x7e50, 0x42be, { 0xb4, 0x87, 0x22, 0xe0, 0xa9, 0x0c, 
+0xb0, 0x52 } \
+  }
+
+//
+// Forward declaration for the FSP_TEMP_RAM_EXIT_PPI.
+//
+typedef struct _FSP_TEMP_RAM_EXIT_PPI FSP_TEMP_RAM_EXIT_PPI;
+
+/**
+  Silicon function for disabling temporary memory.
+  @param[in] TempRamExitParamPtr - Pointer to the TempRamExit parameters structure.
+                                   This structure is normally defined in the Integration
+                                   Guide. If it is not defined in the Integration Guide,
+                                   pass NULL.
+  @retval EFI_SUCCESS            - Execution was completed successfully.
+  @retval Status                 - Error status reported by sub-functions if implemented.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *FSP_TEMP_RAM_EXIT) (
+  IN  VOID    *TempRamExitParamPtr
+  );
+
+///
+/// This PPI provides function to disable temporary memory.
+///
+struct _FSP_TEMP_RAM_EXIT_PPI {
+  FSP_TEMP_RAM_EXIT   TempRamExit;
+};
+
+extern EFI_GUID gFspTempRamExitPpiGuid;
+
+#endif // _FSP_TEMP_RAM_EXIT_PPI_H_
diff --git a/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec b/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec
index a613079dd4..874cbee7a7 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec
+++ b/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec
@@ -347,6 +347,8 @@ gPeiTpmInitializationDonePpiGuid = {0xa030d115, 0x54dd, 0x447b, { 0x90, 0x64, 0x  ##  gSiPolicyPpiGuid  =  {0xaebffa01, 0x7edc, 0x49ff, {0x8d, 0x88, 0xcb, 0x84, 0x8c, 0x5e, 0x86, 0x70}}  gSiPreMemPolicyPpiGuid = {0xc133fe57, 0x17c7, 0x4b09, {0x8b, 0x3c, 0x97, 0xc1, 0x89, 0xd0, 0xab, 0x8d}}
+gFspTempRamExitPpiGuid      = {0xbc1cfbdb, 0x7e50, 0x42be, {0xb4, 0x87, 0x22, 0xe0, 0xa9, 0x0c, 0xb0, 0x52}}
+
 ##
 ## SystemAgent
 ##
--
2.19.1.windows.1