From: "Nate DeSimone" <nathaniel.l.desimone@intel.com>
To: "devel@edk2.groups.io" <devel@edk2.groups.io>,
"Chiu, Chasel" <chasel.chiu@intel.com>
Cc: "Kubacki, Michael A" <michael.a.kubacki@intel.com>,
"Sinha, Ankit" <ankit.sinha@intel.com>,
"Gao, Liming" <liming.gao@intel.com>
Subject: Re: [edk2-devel] [PATCH 4/4] ClevoOpenBoardPkg: Auto configure Fsp*BaseAddress PCD
Date: Tue, 30 Jul 2019 22:19:05 +0000 [thread overview]
Message-ID: <02A34F284D1DA44BB705E61F7180EF0AAED95B36@ORSMSX114.amr.corp.intel.com> (raw)
In-Reply-To: <20190729110715.2312-5-chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Chiu, Chasel
Sent: Monday, July 29, 2019 4:07 AM
To: devel@edk2.groups.io
Cc: Kubacki, Michael A <michael.a.kubacki@intel.com>; Sinha, Ankit <ankit.sinha@intel.com>; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; Gao, Liming <liming.gao@intel.com>
Subject: [edk2-devel] [PATCH 4/4] ClevoOpenBoardPkg: Auto configure Fsp*BaseAddress PCD
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1863
PcdFsp*BaseAddress now will be updated in FDF basing on flash map.
DSC will only define types of those PCDs and always having 0 as default.
Test: interanl platform booted with this patch.
Cc: Michael Kubacki <michael.a.kubacki@intel.com>
Cc: Ankit Sinha <ankit.sinha@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
---
Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf | 3 +++
Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgPcd.dsc | 12 +++++++++---
2 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf
index da498ad379..c425e4b280 100644
--- a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf
+++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf
@@ -53,6 +53,9 @@ SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize = gSiPkgTokenSpaceG
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset = gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset
SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress
SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize = gSiPkgTokenSpaceGuid.PcdFlashAreaSize
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress = $(gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress = $(gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset)
+SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress = $(gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress = gSiPkgTokenSpaceGuid.PcdFlashAreaBaseAddress
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize = gSiPkgTokenSpaceGuid.PcdFlashAreaSize
################################################################################
diff --git a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgPcd.dsc b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgPcd.dsc
index c6bce19856..83cbd18557 100644
--- a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgPcd.dsc
@@ -109,8 +109,11 @@
gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0xE0
!endif
- gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0xFFEBC000
- gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0xFFE00000
+ #
+ # FSP Base address PCD will be updated in FDF basing on flash map.
+ #
+ gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0
+ gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0
## Specifies max supported number of Logical Processors.
# @Prompt Configure max supported number of Logical Processorss @@ -201,7 +204,10 @@ !endif
[PcdsDynamicDefault]
- gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0xFFDA0000
+ #
+ # FSP Base address PCD will be updated in FDF basing on flash map.
+ #
+ gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0
# Platform will pre-allocate UPD buffer and pass it to FspWrapper
# Those dummy address will be patched before FspWrapper executing
gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress|0xFFFFFFFF
--
2.13.3.windows.1
next prev parent reply other threads:[~2019-07-30 22:19 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-29 11:07 [PATCH 0/4] Auto configure Fsp*BaseAddress PCD Chiu, Chasel
2019-07-29 11:07 ` [PATCH 1/4] MinPlatformPkg: " Chiu, Chasel
2019-07-30 22:18 ` Nate DeSimone
2019-07-31 18:58 ` [edk2-devel] " Sinha, Ankit
2019-07-29 11:07 ` [PATCH 2/4] Platform/Intel: " Chiu, Chasel
2019-07-30 22:18 ` [edk2-devel] " Nate DeSimone
2019-07-31 18:59 ` Sinha, Ankit
2019-07-29 11:07 ` [PATCH 3/4] KabylakeOpenBoardPkg: " Chiu, Chasel
2019-07-30 22:19 ` [edk2-devel] " Nate DeSimone
2019-07-31 18:59 ` Sinha, Ankit
2019-07-29 11:07 ` [PATCH 4/4] ClevoOpenBoardPkg: " Chiu, Chasel
2019-07-30 22:19 ` Nate DeSimone [this message]
2019-07-31 19:00 ` Sinha, Ankit
2019-07-29 13:47 ` [edk2-devel] [PATCH 0/4] " Laszlo Ersek
2019-07-30 1:07 ` Chiu, Chasel
2019-07-30 3:46 ` Liming Gao
2019-07-30 3:49 ` Chiu, Chasel
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