From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=fail (domain: intel.com, ip: , mailfrom: nathaniel.l.desimone@intel.com) Received: from mga06.intel.com (mga06.intel.com []) by groups.io with SMTP; Tue, 30 Jul 2019 15:19:06 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Jul 2019 15:19:06 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,327,1559545200"; d="scan'208";a="191050691" Received: from orsmsx110.amr.corp.intel.com ([10.22.240.8]) by fmsmga001.fm.intel.com with ESMTP; 30 Jul 2019 15:19:06 -0700 Received: from orsmsx113.amr.corp.intel.com (10.22.240.9) by ORSMSX110.amr.corp.intel.com (10.22.240.8) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 30 Jul 2019 15:19:05 -0700 Received: from orsmsx114.amr.corp.intel.com ([169.254.8.96]) by ORSMSX113.amr.corp.intel.com ([169.254.9.128]) with mapi id 14.03.0439.000; Tue, 30 Jul 2019 15:19:05 -0700 From: "Nate DeSimone" To: "devel@edk2.groups.io" , "Chiu, Chasel" CC: "Kubacki, Michael A" , "Sinha, Ankit" , "Gao, Liming" Subject: Re: [edk2-devel] [PATCH 4/4] ClevoOpenBoardPkg: Auto configure Fsp*BaseAddress PCD Thread-Topic: [edk2-devel] [PATCH 4/4] ClevoOpenBoardPkg: Auto configure Fsp*BaseAddress PCD Thread-Index: AQHVRf3mgKJ4n59q20ypWDa2mrX/QqbjvXow Date: Tue, 30 Jul 2019 22:19:05 +0000 Message-ID: <02A34F284D1DA44BB705E61F7180EF0AAED95B36@ORSMSX114.amr.corp.intel.com> References: <20190729110715.2312-1-chasel.chiu@intel.com> <20190729110715.2312-5-chasel.chiu@intel.com> In-Reply-To: <20190729110715.2312-5-chasel.chiu@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiMGI1N2E3YzEtNWQxYi00OTNiLWI5Y2QtOTg5MTYwZTIxOWJmIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiUDJKTnp3QU5UZ28xYk1GQWZENXE0bnRxVWtHeWdrQ1diSlZqTnVtOFVDNDErQWtMVGZwWGVoSlJLWG0xQ2dXciJ9 x-ctpclassification: CTP_NT x-originating-ip: [10.22.254.138] MIME-Version: 1.0 Return-Path: nathaniel.l.desimone@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Nate DeSimone -----Original Message----- From: devel@edk2.groups.io On Behalf Of Chiu, Chase= l Sent: Monday, July 29, 2019 4:07 AM To: devel@edk2.groups.io Cc: Kubacki, Michael A ; Sinha, Ankit ; Desimone, Nathaniel L ; G= ao, Liming Subject: [edk2-devel] [PATCH 4/4] ClevoOpenBoardPkg: Auto configure Fsp*Ba= seAddress PCD REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1863 PcdFsp*BaseAddress now will be updated in FDF basing on flash map. DSC will only define types of those PCDs and always having 0 as default. Test: interanl platform booted with this patch. Cc: Michael Kubacki Cc: Ankit Sinha Cc: Nate DeSimone Cc: Liming Gao Signed-off-by: Chasel Chiu --- Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf | 3 +++ Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgPcd.dsc | 12 ++++++++= +--- 2 files changed, 12 insertions(+), 3 deletions(-) diff --git a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf b/Pl= atform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf index da498ad379..c425e4b280 100644 --- a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf +++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.fdf @@ -53,6 +53,9 @@ SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSiz= e =3D gSiPkgTokenSpaceG SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset =3D gSiPkgTo= kenSpaceGuid.PcdFlashMicrocodeFvOffset SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =3D gSiPkgTo= kenSpaceGuid.PcdFlashAreaBaseAddress SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize =3D gSiPkgTo= kenSpaceGuid.PcdFlashAreaSize +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress =3D $(gSiPkg= TokenSpaceGuid.PcdFlashAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.P= cdFlashFvFspTOffset) +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress =3D $(gSiPkg= TokenSpaceGuid.PcdFlashAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.P= cdFlashFvFspMOffset) +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress =3D $(gSiPkg= TokenSpaceGuid.PcdFlashAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.P= cdFlashFvFspSOffset) SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =3D gSiPkgTo= kenSpaceGuid.PcdFlashAreaBaseAddress SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =3D gSiPkgTo= kenSpaceGuid.PcdFlashAreaSize #########################################################################= ####### diff --git a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgPcd.dsc b= /Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgPcd.dsc index c6bce19856..83cbd18557 100644 --- a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgPcd.dsc +++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgPcd.dsc @@ -109,8 +109,11 @@ gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0xE0 !endif =20 - gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0xFFEBC000 - gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0xFFE00000 + # + # FSP Base address PCD will be updated in FDF basing on flash map. + # + gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0 + gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0 =20 ## Specifies max supported number of Logical Processors. # @Prompt Configure max supported number of Logical Processorss @@ -201= ,7 +204,10 @@ !endif =20 [PcdsDynamicDefault] - gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0xFFDA0000 + # + # FSP Base address PCD will be updated in FDF basing on flash map. + # + gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0 # Platform will pre-allocate UPD buffer and pass it to FspWrapper # Those dummy address will be patched before FspWrapper executing gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress|0xFFFFFFFF -- 2.13.3.windows.1