From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=fail (domain: intel.com, ip: , mailfrom: nathaniel.l.desimone@intel.com) Received: from mga09.intel.com (mga09.intel.com []) by groups.io with SMTP; Fri, 16 Aug 2019 17:53:05 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 16 Aug 2019 17:53:04 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,395,1559545200"; d="scan'208";a="179830032" Received: from orsmsx108.amr.corp.intel.com ([10.22.240.6]) by orsmga003.jf.intel.com with ESMTP; 16 Aug 2019 17:53:04 -0700 Received: from orsmsx125.amr.corp.intel.com (10.22.240.125) by ORSMSX108.amr.corp.intel.com (10.22.240.6) with Microsoft SMTP Server (TLS) id 14.3.439.0; Fri, 16 Aug 2019 17:53:04 -0700 Received: from orsmsx114.amr.corp.intel.com ([169.254.8.96]) by ORSMSX125.amr.corp.intel.com ([169.254.3.92]) with mapi id 14.03.0439.000; Fri, 16 Aug 2019 17:53:04 -0700 From: "Nate DeSimone" To: "Kubacki, Michael A" , "devel@edk2.groups.io" CC: "Chaganty, Rangasai V" , "Chiu, Chasel" , "Gao, Liming" , "Kinney, Michael D" , "Sinha, Ankit" Subject: Re: [edk2-platforms][PATCH V1 20/37] CoffeelakeSiliconPkg/Pch: Add SMM library instances Thread-Topic: [edk2-platforms][PATCH V1 20/37] CoffeelakeSiliconPkg/Pch: Add SMM library instances Thread-Index: AQHVVJEYG/xAmMg1BEeBdWS39Xt6Q6b+gxmg Date: Sat, 17 Aug 2019 00:53:03 +0000 Message-ID: <02A34F284D1DA44BB705E61F7180EF0AAEE12A1A@ORSMSX114.amr.corp.intel.com> References: <20190817001603.30632-1-michael.a.kubacki@intel.com> <20190817001603.30632-21-michael.a.kubacki@intel.com> In-Reply-To: <20190817001603.30632-21-michael.a.kubacki@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiMzUwMDAyNWUtNzhmZC00NGU5LWEzNWUtNmFjYjQ2NjY5NGZiIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiV0pMKzMyZjlVN1QxUE5oeUlNa05JK1FZNUl4QmRxY2dQT0t2bmtYaEgwZkw3TXQ0QWtRWDVHVlVhdllYTXdHbCJ9 x-ctpclassification: CTP_NT x-originating-ip: [10.22.254.139] MIME-Version: 1.0 Return-Path: nathaniel.l.desimone@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Nate DeSimone -----Original Message----- From: Kubacki, Michael A=20 Sent: Friday, August 16, 2019 5:16 PM To: devel@edk2.groups.io Cc: Chaganty, Rangasai V ; Chiu, Chasel ; Desimone, Nathaniel L = ; Gao, Liming ; Kinney, Michael D ; Sinha, Ankit Subject: [edk2-platforms][PATCH V1 20/37] CoffeelakeSiliconPkg/Pch: Add SMM= library instances REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D2082 Adds PCH SMM library class instances. * SmmSpiFlashCommonLib Cc: Sai Chaganty Cc: Chasel Chiu Cc: Nate DeSimone Cc: Liming Gao Cc: Michael D Kinney Cc: Ankit Sinha Signed-off-by: Michael Kubacki --- Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SmmSpi= FlashCommonLib.inf | 51 +++++ Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFla= shCommon.c | 196 ++++++++++++++++++++ Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiFla= shCommonSmmLib.c | 54 ++++++ 3 files changed, 301 insertions(+) diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashComm= onLib/SmmSpiFlashCommonLib.inf b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Lib= rary/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf new file mode 100644 index 0000000000..abc919867c --- /dev/null +++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLi +++ b/SmmSpiFlashCommonLib.inf @@ -0,0 +1,51 @@ +## @file +# SMM Library instance of Spi Flash Common Library Class # # Copyright=20 +(c) 2019 Intel Corporation. All rights reserved.
# #=20 +SPDX-License-Identifier: BSD-2-Clause-Patent # ## + +[Defines] + INF_VERSION =3D 0x00010017 + BASE_NAME =3D SmmSpiFlashCommonLib + FILE_GUID =3D 9632D96E-E849-4217-9217-DC500B8AAE47 + VERSION_STRING =3D 1.0 + MODULE_TYPE =3D DXE_SMM_DRIVER + LIBRARY_CLASS =3D SpiFlashCommonLib|DXE_SMM_DRIVER + CONSTRUCTOR =3D SmmSpiFlashCommonLibConstructor +# +# The following information is for reference only and not required by the = build tools. +# +# VALID_ARCHITECTURES =3D IA32 X64 +# + +[LibraryClasses] + PciLib + IoLib + MemoryAllocationLib + BaseLib + UefiLib + SmmServicesTableLib + BaseMemoryLib + DebugLib + MmPciLib + +[Packages] + MdePkg/MdePkg.dec + CoffeelakeSiliconPkg/SiPkg.dec + +[Pcd] + gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress ## CONSUMES + gSiPkgTokenSpaceGuid.PcdBiosSize ## CONSUMES + +[Sources] + SpiFlashCommonSmmLib.c + SpiFlashCommon.c + +[Protocols] + gPchSmmSpiProtocolGuid ## CONSUMES + +[Depex.X64.DXE_SMM_DRIVER] + gPchSmmSpiProtocolGuid diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashComm= onLib/SpiFlashCommon.c b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Smm= SpiFlashCommonLib/SpiFlashCommon.c new file mode 100644 index 0000000000..53711db632 --- /dev/null +++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLi +++ b/SpiFlashCommon.c @@ -0,0 +1,196 @@ +/** @file + Wrap EFI_SPI_PROTOCOL to provide some library level interfaces + for module use. + + Copyright (c) 2019 Intel Corporation. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent **/ + +#include +#include +#include +#include +#include +#include + + +PCH_SPI_PROTOCOL *mSpiProtocol; + +// +// FlashAreaBaseAddress and Size for boottime and runtime usage. +// +UINTN mFlashAreaBaseAddress =3D 0; +UINTN mFlashAreaSize =3D 0; + +/** + Enable block protection on the Serial Flash device. + + @retval EFI_SUCCESS Opertion is successful. + @retval EFI_DEVICE_ERROR If there is any device errors. + +**/ +EFI_STATUS +EFIAPI +SpiFlashLock ( + VOID + ) +{ + return EFI_SUCCESS; +} + +/** + Read NumBytes bytes of data from the address specified by + PAddress into Buffer. + + @param[in] Address The starting physical address of the read. + @param[in,out] NumBytes On input, the number of bytes to read. On = output, the number + of bytes actually read. + @param[out] Buffer The destination data buffer for the read. + + @retval EFI_SUCCESS Opertion is successful. + @retval EFI_DEVICE_ERROR If there is any device errors. + +**/ +EFI_STATUS +EFIAPI +SpiFlashRead ( + IN UINTN Address, + IN OUT UINT32 *NumBytes, + OUT UINT8 *Buffer + ) +{ + ASSERT ((NumBytes !=3D NULL) && (Buffer !=3D NULL)); + if ((NumBytes =3D=3D NULL) || (Buffer =3D=3D NULL)) { + return EFI_INVALID_PARAMETER; + } + + // + // This function is implemented specifically for those platforms //=20 + at which the SPI device is memory mapped for read. So this //=20 + function just do a memory copy for Spi Flash Read. + // + CopyMem (Buffer, (VOID *) Address, *NumBytes); + + return EFI_SUCCESS; +} + +/** + Write NumBytes bytes of data from Buffer to the address specified by + PAddresss. + + @param[in] Address The starting physical address of the wri= te. + @param[in,out] NumBytes On input, the number of bytes to write. = On output, + the actual number of bytes written. + @param[in] Buffer The source data buffer for the write. + + @retval EFI_SUCCESS Opertion is successful. + @retval EFI_DEVICE_ERROR If there is any device errors. + +**/ +EFI_STATUS +EFIAPI +SpiFlashWrite ( + IN UINTN Address, + IN OUT UINT32 *NumBytes, + IN UINT8 *Buffer + ) +{ + EFI_STATUS Status; + UINTN Offset; + UINT32 Length; + UINT32 RemainingBytes; + + ASSERT ((NumBytes !=3D NULL) && (Buffer !=3D NULL)); if ((NumBytes =3D= =3D=20 + NULL) || (Buffer =3D=3D NULL)) { + return EFI_INVALID_PARAMETER; + } + + ASSERT (Address >=3D mFlashAreaBaseAddress); + + Offset =3D Address - mFlashAreaBaseAddress; + + ASSERT ((*NumBytes + Offset) <=3D mFlashAreaSize); + + Status =3D EFI_SUCCESS; + RemainingBytes =3D *NumBytes; + + + while (RemainingBytes > 0) { + if (RemainingBytes > SECTOR_SIZE_4KB) { + Length =3D SECTOR_SIZE_4KB; + } else { + Length =3D RemainingBytes; + } + Status =3D mSpiProtocol->FlashWrite ( + mSpiProtocol, + FlashRegionBios, + (UINT32) Offset, + Length, + Buffer + ); + if (EFI_ERROR (Status)) { + break; + } + RemainingBytes -=3D Length; + Offset +=3D Length; + Buffer +=3D Length; + } + + // + // Actual number of bytes written + // + *NumBytes -=3D RemainingBytes; + + return Status; +} + +/** + Erase the block starting at Address. + + @param[in] Address The starting physical address of the block t= o be erased. + This library assume that caller garantee tha= t the PAddress + is at the starting address of this block. + @param[in] NumBytes On input, the number of bytes of the logical= block to be erased. + On output, the actual number of bytes erased= . + + @retval EFI_SUCCESS. Opertion is successful. + @retval EFI_DEVICE_ERROR If there is any device errors. + +**/ +EFI_STATUS +EFIAPI +SpiFlashBlockErase ( + IN UINTN Address, + IN UINTN *NumBytes + ) +{ + EFI_STATUS Status; + UINTN Offset; + UINTN RemainingBytes; + + ASSERT (NumBytes !=3D NULL); + if (NumBytes =3D=3D NULL) { + return EFI_INVALID_PARAMETER; + } + + ASSERT (Address >=3D mFlashAreaBaseAddress); + + Offset =3D Address - mFlashAreaBaseAddress; + + ASSERT ((*NumBytes % SECTOR_SIZE_4KB) =3D=3D 0); ASSERT ((*NumBytes +=20 + Offset) <=3D mFlashAreaSize); + + Status =3D EFI_SUCCESS; + RemainingBytes =3D *NumBytes; + + + Status =3D mSpiProtocol->FlashErase ( + mSpiProtocol, + FlashRegionBios, + (UINT32) Offset, + (UINT32) RemainingBytes + ); + return Status; +} + diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashComm= onLib/SpiFlashCommonSmmLib.c b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Libra= ry/SmmSpiFlashCommonLib/SpiFlashCommonSmmLib.c new file mode 100644 index 0000000000..43c0218d85 --- /dev/null +++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLi +++ b/SpiFlashCommonSmmLib.c @@ -0,0 +1,54 @@ +/** @file + SMM Library instance of SPI Flash Common Library Class + + Copyright (c) 2019 Intel Corporation. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent **/ + +#include +#include #include + +extern PCH_SPI_PROTOCOL *mSpiProtocol; + +extern UINTN mFlashAreaBaseAddress; +extern UINTN mFlashAreaSize; + +/** + The library constructuor. + + The function does the necessary initialization work for this library =20 + instance. + + @param[in] ImageHandle The firmware allocated handle for the UEFI= image. + @param[in] SystemTable A pointer to the EFI system table. + + @retval EFI_SUCCESS The function always return EFI_SUCCESS for= now. + It will ASSERT on error for debug version. + @retval EFI_ERROR Please reference LocateProtocol for error = code details. +**/ +EFI_STATUS +EFIAPI +SmmSpiFlashCommonLibConstructor ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + + mFlashAreaBaseAddress =3D (UINTN)PcdGet32 (PcdBiosAreaBaseAddress); + mFlashAreaSize =3D (UINTN)PcdGet32 (PcdBiosSize); + + // + // Locate the SMM SPI protocol. + // + Status =3D gSmst->SmmLocateProtocol ( + &gPchSmmSpiProtocolGuid, + NULL, + (VOID **) &mSpiProtocol + ); + ASSERT_EFI_ERROR (Status); + + return Status; +} -- 2.16.2.windows.1