* Re: [edk2-platforms] ClevoOpenBoardPkg: Update board gpios
2019-08-30 1:12 [edk2-platforms] ClevoOpenBoardPkg: Update board gpios Agyeman, Prince
@ 2019-08-30 12:41 ` Chiu, Chasel
2019-08-30 16:47 ` [edk2-devel] " Kubacki, Michael A
2019-08-30 18:39 ` Nate DeSimone
2 siblings, 0 replies; 4+ messages in thread
From: Chiu, Chasel @ 2019-08-30 12:41 UTC (permalink / raw)
To: Agyeman, Prince, devel@edk2.groups.io
Cc: Gao, Liming, Wei, David Y, Kubacki, Michael A,
Desimone, Nathaniel L
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
> -----Original Message-----
> From: Agyeman, Prince
> Sent: Friday, August 30, 2019 9:12 AM
> To: devel@edk2.groups.io
> Cc: Gao, Liming <liming.gao@intel.com>; Wei, David Y
> <david.y.wei@intel.com>; Kubacki, Michael A <michael.a.kubacki@intel.com>;
> Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; Chiu, Chasel
> <chasel.chiu@intel.com>
> Subject: [edk2-platforms] ClevoOpenBoardPkg: Update board gpios
>
> Updated board GPIOS
>
> Cc: Liming Gao <liming.gao@intel.com>
> Cc: David Y Wei <david.y.wei@intel.com>
> Cc: Michael Kubacki <michael.a.kubacki@intel.com>
> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
> Cc: Chasel Chiu <chasel.chiu@intel.com>
>
> Signed-off-by: Agyeman <prince.agyeman@intel.com>
> ---
> .../Library/BoardInitLib/N1xxWUGpioTable.c | 329 +++++++++---------
> 1 file changed, 165 insertions(+), 164 deletions(-)
>
> diff --git
> a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Library/BoardInitLib/N1xxW
> UGpioTable.c
> b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Library/BoardInitLib/N1xxW
> UGpioTable.c
> index d055fda8c3..c99b83753f 100644
> ---
> a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Library/BoardInitLib/N1xxW
> UGpioTable.c
> +++
> b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Library/BoardInitLib/N1xxW
> UGpioTable.c
> @@ -20,170 +20,171 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
>
> GPIO_INIT_CONFIG mGpioTableN1xxWU[] =
> {
> -//skip for eSPI function {GPIO_SKL_LP_GPP_A0, {GpioPadModeNative1,
> GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis,
> GpioHostDeepReset, GpioTermNone}},//H_RCIN_N
> -//skip for eSPI function {GPIO_SKL_LP_GPP_A1, {GpioPadModeNative1,
> GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis,
> GpioHostDeepReset, GpioTermWpd20K}},//LPC_AD0_ESPI_IO0
> -//skip for eSPI function {GPIO_SKL_LP_GPP_A2, {GpioPadModeNative1,
> GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis,
> GpioHostDeepReset, GpioTermWpd20K}},//LPC_AD1_ESPI_IO1
> -//skip for eSPI function {GPIO_SKL_LP_GPP_A3, {GpioPadModeNative1,
> GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis,
> GpioHostDeepReset, GpioTermWpd20K}},//LPC_AD2_ESPI_IO2
> -//skip for eSPI function {GPIO_SKL_LP_GPP_A4, {GpioPadModeNative1,
> GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis,
> GpioHostDeepReset, GpioTermWpd20K}},//LPC_AD3_ESPI_IO3
> -//skip for eSPI function {GPIO_SKL_LP_GPP_A5, {GpioPadModeNative1,
> GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis,
> GpioHostDeepReset, GpioTermNone}},//LPC_FRAME_ESPI_CS_N
> -//skip for eSPI function {GPIO_SKL_LP_GPP_A6, {GpioPadModeNative1,
> GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis,
> GpioHostDeepReset, GpioTermNone}},//INT_SERIRQ
> - {GPIO_SKL_LP_GPP_A7, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//PM_SLP_S0ix_R_N
> -// skip for PM_CLKRUN_N {GPIO_SKL_LP_GPP_A8, {GpioPadModeNative1,
> GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis,
> GpioHostDeepReset, GpioTermNone}},//PM_CLKRUN_N
> -//skip for eSPI function {GPIO_SKL_LP_GPP_A9, {GpioPadModeNative1,
> GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis,
> GpioHostDeepReset, GpioTermWpd20K}},//LPC_CLK_ESPI_CLK
> -// skip for PCH_CLK_PCI_TPM {GPIO_SKL_LP_GPP_A10,
> {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault,
> GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}},//PCH_CLK_PCI_TPM
> - {GPIO_SKL_LP_GPP_A11, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirIn, GpioOutDefault, GpioIntLevel | GpioIntApic,
> GpioHostDeepReset, GpioTermNone}},//EC_HID_INTR
> - {GPIO_SKL_LP_GPP_A12, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutLow, GpioIntDis, GpioResumeReset,
> GpioTermNone}},//M.2_WWAN_GNSS_UART_RST_N
> -//skip for SUS_PWR_ACK_R {GPIO_SKL_LP_GPP_A13,
> {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault,
> GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SUS_PWR_ACK_R
> -//skip for eSPI function {GPIO_SKL_LP_GPP_A14, {GpioPadModeNative1,
> GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis,
> GpioHostDeepReset, GpioTermNone}},//PM_SUS_STAT_ESPI_RST_N
> -//skip for SUSACK_R_N {GPIO_SKL_LP_GPP_A15, {GpioPadModeNative1,
> GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis,
> GpioHostDeepReset, GpioTermWpd20K}},//SUSACK_R_N
> - {GPIO_SKL_LP_GPP_A16, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirIn, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SD_1P8_SEL
> - {GPIO_SKL_LP_GPP_A17, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SD_PWR_EN_N
> - {GPIO_SKL_LP_GPP_A18, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//ISH_GP_0_SENSOR
> - {GPIO_SKL_LP_GPP_A19, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//ISH_GP_1_SENSOR
> - {GPIO_SKL_LP_GPP_A20, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//ISH_GP_2_SENSOR
> - {GPIO_SKL_LP_GPP_A21, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//GNSS_CHUB_IRQ
> - {GPIO_SKL_LP_GPP_A22, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//FPS_SLP_N
> - {GPIO_SKL_LP_GPP_A23, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirIn, GpioOutDefault, GpioIntLevel | GpioIntApic,
> GpioHostDeepReset, GpioTermNone}},//FPS_DRDY
> - {GPIO_SKL_LP_GPP_B0, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//V0.85A_VID0
> - {GPIO_SKL_LP_GPP_B1, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//V0.85A_VID1
> - {GPIO_SKL_LP_GPP_B2, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//GP_VRALERTB
> - {GPIO_SKL_LP_GPP_B3, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirIn, GpioOutDefault, GpioIntLevel | GpioIntApic,
> GpioPlatformReset, GpioTermNone}},//TCH_PAD_INTR_R_N
> - {GPIO_SKL_LP_GPP_B4, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//BT_RF_KILL_N
> - {GPIO_SKL_LP_GPP_B5, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirIn, GpioOutDefault, GpioIntLevel | GpioIntApic,
> GpioHostDeepReset, GpioTermNone}},//M.2_BT_UART_WAKE_N
> - // {GPIO_SKL_LP_GPP_B6, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//CLK_REQ_SLOT1_N
> - // {GPIO_SKL_LP_GPP_B7, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//CLK_REQ_SLOT2_LAN_N
> - // {GPIO_SKL_LP_GPP_B8, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//CLK_REQ_M.2_SSD_SLOT3_N
> - // {GPIO_SKL_LP_GPP_B9, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//CLK_REQ_M.2_WIGIG_N
> - // {GPIO_SKL_LP_GPP_B10, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//CLK_REQ_M.2_WLAN_N
> - {GPIO_SKL_LP_GPP_B11, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//MPHY_EXT_PWR_GATEB
> - {GPIO_SKL_LP_GPP_B12, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//PCH_SLP_S0_N
> - {GPIO_SKL_LP_GPP_B13, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//PLT_RST_N
> - {GPIO_SKL_LP_GPP_B14, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset,
> GpioTermWpd20K}},//TCH_PNL_PWREN
> - // {GPIO_SKL_LP_GPP_B15, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutLow, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//PCH_NFC_DFU, NOT OWNED BY BIOS
> - {GPIO_SKL_LP_GPP_B16, {GpioPadModeGpio, GpioHostOwnAcpi,
> GpioDirInInv, GpioOutDefault, GpioIntLevel | GpioIntSci, GpioPlatformReset,
> GpioTermNone}},//M.2_WLAN_WIFI_WAKE_N
> - {GPIO_SKL_LP_GPP_B17, {GpioPadModeGpio, GpioHostOwnAcpi,
> GpioDirInInv, GpioOutDefault, GpioIntEdge | GpioIntSci, GpioPlatformReset,
> GpioTermWpu20K}},//TBT_CIO_PLUG_EVENT_N
> - {GPIO_SKL_LP_GPP_B18, {GpioPadModeGpio, GpioHostOwnAcpi,
> GpioDirInInv, GpioOutDefault, GpioIntLevel | GpioIntSci, GpioPlatformReset,
> GpioTermWpu20K}},//PCH_SLOT1_WAKE_N
> - {GPIO_SKL_LP_GPP_B19, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//FPS_GSPI1_CS_R1_N
> - {GPIO_SKL_LP_GPP_B20, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermWpd20K}},//FPS_GSPI1_CLK_R1
> - {GPIO_SKL_LP_GPP_B21, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermWpd20K}},//FPS_GSPI1_MISO_R1
> - {GPIO_SKL_LP_GPP_B22, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermWpd20K}},//FPS_GSPI1_MOSI_R1
> - {GPIO_SKL_LP_GPP_B23, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset,
> GpioTermWpd20K}},//DISCRETE_GNSS_RESET_N
> - {GPIO_SKL_LP_GPP_C0, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SMB_CLK
> - {GPIO_SKL_LP_GPP_C1, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermWpd20K}},//SMB_DATA
> - {GPIO_SKL_LP_GPP_C2, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset,
> GpioTermWpd20K}},//SKIN_THRM_SNSR_ALERT_N
> - {GPIO_SKL_LP_GPP_C3, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SML0_CLK
> - {GPIO_SKL_LP_GPP_C4, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SML0_DATA
> - {GPIO_SKL_LP_GPP_C5, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirInInv, GpioOutDefault, GpioIntLevel | GpioIntApic,
> GpioHostDeepReset, GpioTermWpd20K}},//M.2_WIGIG_WAKE_N
> - {GPIO_SKL_LP_GPP_C6, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SML1_CLK, OWNED BY ME
> - {GPIO_SKL_LP_GPP_C7, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermWpd20K}},//SML1_DATA, OWNED BY ME
> - {GPIO_SKL_LP_GPP_C8, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SERIALIO_UART0_RXD
> - {GPIO_SKL_LP_GPP_C9, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SERIALIO_UART0_TXD
> - {GPIO_SKL_LP_GPP_C10, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SERIALIO_UART0_RTS_N
> - {GPIO_SKL_LP_GPP_C11, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SERIALIO_UART0_CTS_N
> - {GPIO_SKL_LP_GPP_C12, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SERIALIO_UART1_ISH_UART1_RXD
> - {GPIO_SKL_LP_GPP_C13, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SERIALIO_UART1_ISH_UART1_TXD
> - {GPIO_SKL_LP_GPP_C14, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SERIALIO_UART1_ISH_UART1_RTS_N
> - {GPIO_SKL_LP_GPP_C15, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SERIALIO_UART1_ISH_UART1_CTS_N
> - {GPIO_SKL_LP_GPP_C16, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SERIALIO_I2C0_SDA
> - {GPIO_SKL_LP_GPP_C17, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SERIALIO_I2C0_SCL
> - {GPIO_SKL_LP_GPP_C18, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SERIALIO_I2C1_SDA
> - {GPIO_SKL_LP_GPP_C19, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SERIALIO_I2C1_SCL
> - {GPIO_SKL_LP_GPP_C20, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SERIALIO_UART2_RXD
> - {GPIO_SKL_LP_GPP_C21, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SERIALIO_UART2_TXD
> - {GPIO_SKL_LP_GPP_C22, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SERIALIO_UART2_RTS_N
> - {GPIO_SKL_LP_GPP_C23, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SERIALIO_UART2_CTS_N
> - {GPIO_SKL_LP_GPP_D0, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SPI1_TCHPNL_CS_N
> - {GPIO_SKL_LP_GPP_D1, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SPI1_TCHPNL_CLK
> - {GPIO_SKL_LP_GPP_D2, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SPI1_TCHPNL_MISO
> - {GPIO_SKL_LP_GPP_D3, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SPI1_TCHPNL_MOSI
> - {GPIO_SKL_LP_GPP_D4, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//CSI2_FLASH_STROBE
> - {GPIO_SKL_LP_GPP_D5, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//ISH_I2C0_SDA
> - {GPIO_SKL_LP_GPP_D6, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//ISH_I2C0_SCL
> - {GPIO_SKL_LP_GPP_D7, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//ISH_I2C1_SDA
> - {GPIO_SKL_LP_GPP_D8, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//ISH_I2C1_SCL/SB_BLON
> - {GPIO_SKL_LP_GPP_D9, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirIn, GpioOutDefault, GpioIntLevel | GpioIntDis,
> GpioHostDeepReset, GpioTermNone}},//HOME_BTN
> - {GPIO_SKL_LP_GPP_D10, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirIn, GpioOutDefault, GpioIntLevel | GpioIntDis,
> GpioHostDeepReset, GpioTermNone}},//SCREEN_LOCK_PCH
> - {GPIO_SKL_LP_GPP_D11, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirIn, GpioOutDefault, GpioIntLevel | GpioIntDis,
> GpioHostDeepReset, GpioTermNone}},//VOL_UP_PCH
> - {GPIO_SKL_LP_GPP_D12, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirIn, GpioOutDefault, GpioIntLevel | GpioIntDis,
> GpioHostDeepReset, GpioTermNone}},//VOL_DOWN_PCH
> - {GPIO_SKL_LP_GPP_D13, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//ISH_UART0_RXD_SML0B_DATA
> - {GPIO_SKL_LP_GPP_D14, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//ISH_UART0_TXD_SML0B_CLK
> - {GPIO_SKL_LP_GPP_D15, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//ISH_UART0_RTS_N
> - {GPIO_SKL_LP_GPP_D16, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//ISH_UART0_CTS_SML0B_ALERT_N
> - {GPIO_SKL_LP_GPP_D17, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//DMIC_CLK_1
> - {GPIO_SKL_LP_GPP_D18, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermWpd20K}},//DMIC_DATA_1
> - {GPIO_SKL_LP_GPP_D19, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//DMIC_CLK_0
> - {GPIO_SKL_LP_GPP_D20, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermWpd20K}},//DMIC_DATA_0
> - {GPIO_SKL_LP_GPP_D21, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SPI1_TCHPNL_IO2
> - {GPIO_SKL_LP_GPP_D22, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SPI1_TCHPNL_IO3
> - {GPIO_SKL_LP_GPP_D23, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SSP_MCLK
> - {GPIO_SKL_LP_GPP_E0, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirInInv, GpioOutDefault, GpioIntEdge | GpioIntApic,
> GpioHostDeepReset, GpioTermNone}},//SPI_TPM_HDR_IRQ_N
> - {GPIO_SKL_LP_GPP_E1, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SATA_ODD_PRSNT_N
> - {GPIO_SKL_LP_GPP_E2, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntLvlEdgDis | GpioIntApic,
> GpioHostDeepReset, GpioTermNone}},//M.2_SSD_SATA2_PCIE3_DET_N
> - {GPIO_SKL_LP_GPP_E3, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutHigh, GpioIntDis, GpioResumeReset,
> GpioTermNone}},//EINK_SSR_DFU_N
> - {GPIO_SKL_LP_GPP_E4, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//PCH_NFC_RESET
> - {GPIO_SKL_LP_GPP_E5, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SATA1_PHYSLP1_DIRECT_R
> - // {GPIO_SKL_LP_GPP_E6, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutLow, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SATA2_PHYSLP2_M.2SSD_R, NOT OWNED BY BIOS
> - {GPIO_SKL_LP_GPP_E8, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//PCH_SATA_LED_N
> - {GPIO_SKL_LP_GPP_E9, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//USB_OC_0_WP1_OTG_N
> - {GPIO_SKL_LP_GPP_E10, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//USB_OC_1_WP4_N
> - {GPIO_SKL_LP_GPP_E11, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//USB_OC_2_WP2_WP3_WP5_R_N
> - // {GPIO_SKL_LP_GPP_E12, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirIn, GpioOutDefault, GpioIntLevel | GpioIntDis,
> GpioHostDeepReset, GpioTermNone}},//PCH_NFC_IRQ, NOT OWNED BY
> BIOS
> - {GPIO_SKL_LP_GPP_E13, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//DDI1_HPD_Q
> - {GPIO_SKL_LP_GPP_E14, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//DDI2_HPD_Q
> - {GPIO_SKL_LP_GPP_E15, {GpioPadModeGpio, GpioHostOwnAcpi,
> GpioDirInInv, GpioOutDefault, GpioIntEdge | GpioIntSmi,
> GpioHostDeepReset, GpioTermNone}},//SMC_EXTSMI_R_N
> - {GPIO_SKL_LP_GPP_E16, {GpioPadModeGpio, GpioHostOwnAcpi,
> GpioDirInInv, GpioOutDefault, GpioIntLevel | GpioIntSci, GpioPlatformReset,
> GpioTermNone}},//SMC_RUNTIME_SCI_R_N
> - {GPIO_SKL_LP_GPP_E17, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//EDP_HPD
> - {GPIO_SKL_LP_GPP_E18, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//DDI1_CTRL_CLK
> - {GPIO_SKL_LP_GPP_E19, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermWpd20K}},//DDI1_CTRL_DATA
> - {GPIO_SKL_LP_GPP_E20, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//DDI2_CTRL_CLK
> - {GPIO_SKL_LP_GPP_E21, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermWpd20K}},//DDI2_CTRL_DATA
> - {GPIO_SKL_LP_GPP_E22, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirInInv, GpioOutDefault, GpioIntLevel | GpioIntApic,
> GpioHostDeepReset, GpioTermNone}},//PCH_CODEC_IRQ
> - {GPIO_SKL_LP_GPP_E23, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset,
> GpioTermWpd20K}},//TCH_PNL_RST_N
> - {GPIO_SKL_LP_GPP_F0, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SSP2_SCLK
> - {GPIO_SKL_LP_GPP_F1, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SSP2_SFRM
> - {GPIO_SKL_LP_GPP_F2, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SSP2_TXD
> - {GPIO_SKL_LP_GPP_F3, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SSP2_RXD
> - {GPIO_SKL_LP_GPP_F4, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTolerance1v8 | GpioTermNone}},//SERIALIO_I2C2_SDA
> - {GPIO_SKL_LP_GPP_F5, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTolerance1v8 | GpioTermNone}},//SERIALIO_I2C2_SCL
> - {GPIO_SKL_LP_GPP_F6, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTolerance1v8 | GpioTermNone}},//SERIALIO_I2C3_SDA
> - {GPIO_SKL_LP_GPP_F7, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTolerance1v8 | GpioTermNone}},//SERIALIO_I2C3_SCL
> - {GPIO_SKL_LP_GPP_F8, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTolerance1v8 | GpioTermNone}},//SERIALIO_I2C4_SDA
> - {GPIO_SKL_LP_GPP_F9, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTolerance1v8 | GpioTermNone}},//SERIALIO_I2C4_SCL
> - {GPIO_SKL_LP_GPP_F10, {GpioPadModeNative2, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTolerance1v8 | GpioTermNone}},//SERIALIO_I2C5_ISH_12C2_SDA
> - {GPIO_SKL_LP_GPP_F11, {GpioPadModeNative2, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTolerance1v8 | GpioTermNone}},//SERIALIO_I2C5_ISH_12C2_SCL
> - {GPIO_SKL_LP_GPP_F12, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//EMMC_CMD
> - {GPIO_SKL_LP_GPP_F13, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//EMMC_DATA0
> - {GPIO_SKL_LP_GPP_F14, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//EMMC_DATA1
> - {GPIO_SKL_LP_GPP_F15, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//EMMC_DATA2
> - {GPIO_SKL_LP_GPP_F16, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//EMMC_DATA3
> - {GPIO_SKL_LP_GPP_F17, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//EMMC_DATA4
> - {GPIO_SKL_LP_GPP_F18, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//EMMC_DATA5
> - {GPIO_SKL_LP_GPP_F19, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//EMMC_DATA6
> - {GPIO_SKL_LP_GPP_F20, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//EMMC_DATA7
> - {GPIO_SKL_LP_GPP_F21, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//EMMC_RCLK
> - {GPIO_SKL_LP_GPP_F22, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//EMMC_CLK
> - {GPIO_SKL_LP_GPP_F23, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirIn, GpioOutDefault, GpioIntLevel | GpioIntApic,
> GpioHostDeepReset, GpioTermNone}},//PCH_M.2_WWAN_UIM_SIM_DET
> - {GPIO_SKL_LP_GPP_G0, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SD_CMD
> - {GPIO_SKL_LP_GPP_G1, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SD_DATA0
> - {GPIO_SKL_LP_GPP_G2, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SD_DATA1
> - {GPIO_SKL_LP_GPP_G3, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SD_DATA2
> - {GPIO_SKL_LP_GPP_G4, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SD_DATA3
> - {GPIO_SKL_LP_GPP_G5, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SD_CDB
> - {GPIO_SKL_LP_GPP_G6, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SD_CLK
> - {GPIO_SKL_LP_GPP_G7, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SD_WP
> - {GPIO_SKL_LP_GPD0, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioDswReset,
> GpioTermNone}},//PM_BATLOW_R_N
> - {GPIO_SKL_LP_GPD1, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioDswReset,
> GpioTermNone}},//AC_PRESENT_R
> - {GPIO_SKL_LP_GPD2, {GpioPadModeNative1, GpioHostOwnAcpi,
> GpioDirIn, GpioOutDefault, GpioIntLevel | GpioIntSci, GpioDswReset,
> GpioTermNone}},//LANWAKE_SMC_WAKE_SCI_N
> - {GPIO_SKL_LP_GPD3, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioDswReset,
> GpioTermWpu20K}},//PM_PWRBTN_R_N
> - {GPIO_SKL_LP_GPD4, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioDswReset,
> GpioTermNone}},//SLP_S3_R_N
> - {GPIO_SKL_LP_GPD5, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioDswReset,
> GpioTermNone}},//SLP_S4_R_N
> - {GPIO_SKL_LP_GPD6, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioDswReset,
> GpioTermNone}},//SLP_M_R_N
> - {GPIO_SKL_LP_GPD7, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioDswReset,
> GpioTermNone}},//USB_WAKEOUT_INTRUDET_N
> - {GPIO_SKL_LP_GPD8, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioDswReset,
> GpioTermNone}},//SUS_CLK
> - {GPIO_SKL_LP_GPD9, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioDswReset,
> GpioTermNone}},//PCH_SLP_WLAN_N
> - {GPIO_SKL_LP_GPD10, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioDswReset,
> GpioTermNone}},//SLP_S5_R_N
> - {GPIO_SKL_LP_GPD11, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioDswReset,
> GpioTermNone}},//PM_LANPHY_ENABLE
> - {END_OF_GPIO_TABLE, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioDswReset,
> GpioTermNone}},//Marking End of Table
> + {GPIO_SKL_LP_GPP_A0, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirIn, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //RCINB_TIME_SYNC_1
> + {GPIO_SKL_LP_GPP_A1, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirInOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNative}}, //LAD_0_ESPI_IO_0
> + {GPIO_SKL_LP_GPP_A2, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirInOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //LAD_1_ESPI_IO_1
> + {GPIO_SKL_LP_GPP_A3, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirInOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNative}}, //LAD_2_ESPI_IO_2
> + {GPIO_SKL_LP_GPP_A4, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirInOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //LAD_3_ESPI_IO_3
> + {GPIO_SKL_LP_GPP_A5, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //LFRAMEB_ESPI_CSB
> + {GPIO_SKL_LP_GPP_A6, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirInOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SERIRQ
> + {GPIO_SKL_LP_GPP_A7, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirIn, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //PIRQAB_GSPI0_CS1B
> + {GPIO_SKL_LP_GPP_A8, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //CLKRUNB
> + {GPIO_SKL_LP_GPP_A9, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermWpd20K}}, //CLKOUT_LPC_0_ESPI_CLK
> + {GPIO_SKL_LP_GPP_A10, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermWpd20K}}, //CLKOUT_LPC_1
> + {GPIO_SKL_LP_GPP_A11, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermWpu20K}}, //PMEB_GSPI1_CS1B
> + {GPIO_SKL_LP_GPP_A12, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //BM_BUSYB_ISH_GP_6
> + {GPIO_SKL_LP_GPP_A13, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SUSWARNB_SUSPWRDNACK
> + {GPIO_SKL_LP_GPP_A14, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SUS_STATB_ESPI_RESETB
> + {GPIO_SKL_LP_GPP_A15, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirIn, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermWpu20K}}, //SUSACKB
> + {GPIO_SKL_LP_GPP_A16, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SD_1P8_SEL
> + {GPIO_SKL_LP_GPP_A17, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SD_VDD1_PWR_EN_B_ISH_GP_7
> + {GPIO_SKL_LP_GPP_A18, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //ISH_GP_0
> + {GPIO_SKL_LP_GPP_A19, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //ISH_GP_1
> + {GPIO_SKL_LP_GPP_A20, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //ISH_GP_2
> + {GPIO_SKL_LP_GPP_A21, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioPlatformReset,
> GpioTermNone}}, //ISH_GP_3
> + {GPIO_SKL_LP_GPP_A22, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioResumeReset,
> GpioTermNone}}, //ISH_GP_4
> + {GPIO_SKL_LP_GPP_A23, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioResumeReset,
> GpioTermNone}}, //ISH_GP_5
> + {GPIO_SKL_LP_GPP_B0, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //CORE_VID_0
> + {GPIO_SKL_LP_GPP_B1, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //CORE_VID_1
> + {GPIO_SKL_LP_GPP_B2, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //VRALERTB
> + {GPIO_SKL_LP_GPP_B3, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //CPU_GP_2
> + {GPIO_SKL_LP_GPP_B4, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //CPU_GP_3
> + {GPIO_SKL_LP_GPP_B5, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SRCCLKREQB_0
> + {GPIO_SKL_LP_GPP_B6, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SRCCLKREQB_1
> + {GPIO_SKL_LP_GPP_B7, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SRCCLKREQB_2
> + {GPIO_SKL_LP_GPP_B8, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SRCCLKREQB_3
> + {GPIO_SKL_LP_GPP_B9, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutLow, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SRCCLKREQB_4
> + {GPIO_SKL_LP_GPP_B10, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SRCCLKREQB_5
> + {GPIO_SKL_LP_GPP_B11, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //EXT_PWR_GATEB
> + {GPIO_SKL_LP_GPP_B12, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SLP_S0B
> + {GPIO_SKL_LP_GPP_B13, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //PLTRSTB
> + {GPIO_SKL_LP_GPP_B14, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermWpd20K}}, //SPKR
> + {GPIO_SKL_LP_GPP_B15, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //GSPI0_CS0B
> + {GPIO_SKL_LP_GPP_B16, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //GSPI0_CLK
> + {GPIO_SKL_LP_GPP_B17, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //GSPI0_MISO
> + {GPIO_SKL_LP_GPP_B18, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermWpu20K}}, //GSPI0_MOSI
> + {GPIO_SKL_LP_GPP_B19, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //GSPI1_CS0B
> + {GPIO_SKL_LP_GPP_B20, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //GSPI1_CLK_NFC_CLK
> + {GPIO_SKL_LP_GPP_B21, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //GSPI1_MISO_NFC_CLKREQ
> + {GPIO_SKL_LP_GPP_B22, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermWpd20K}}, //GSPI1_MOSI
> + {GPIO_SKL_LP_GPP_B23, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SML1ALERTB_PCHHOTB
> + {GPIO_SKL_LP_GPP_G0, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //GPPC_G_0_SD3_CMD
> + {GPIO_SKL_LP_GPP_G1, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirIn, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //GPPC_G_1_SD3_D0_SD4_RCLK_P
> + {GPIO_SKL_LP_GPP_G2, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //GPPC_G_2_SD3_D1_SD4_RCLK_N
> + {GPIO_SKL_LP_GPP_G3, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //GPPC_G_3_SD3_D2
> + {GPIO_SKL_LP_GPP_G4, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //GPPC_G_4_SD3_D3
> + {GPIO_SKL_LP_GPP_G5, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //GPPC_G_5_SD3_CDB
> + {GPIO_SKL_LP_GPP_G6, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //GPPC_G_6_SD3_CLK
> + {GPIO_SKL_LP_GPP_G7, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //GPPC_G_7_SD3_WP
> + {GPIO_SKL_LP_GPP_D0, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SPI1_CSB_BK_0
> + {GPIO_SKL_LP_GPP_D1, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SPI1_CLK_BK_1
> + {GPIO_SKL_LP_GPP_D2, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SPI1_MISO_IO_1_BK_2
> + {GPIO_SKL_LP_GPP_D3, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SPI1_MOSI_IO_0_BK_3
> + {GPIO_SKL_LP_GPP_D4, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //IMGCLKOUT_0_BK_4
> + {GPIO_SKL_LP_GPP_D5, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutHigh, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //ISH_I2C0_SDA
> + {GPIO_SKL_LP_GPP_D6, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //ISH_I2C0_SCL
> + {GPIO_SKL_LP_GPP_D7, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //ISH_I2C1_SDA
> + {GPIO_SKL_LP_GPP_D8, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //ISH_I2C1_SCL
> + {GPIO_SKL_LP_GPP_D9, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //ISH_SPI_CSB
> + {GPIO_SKL_LP_GPP_D10, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //ISH_SPI_CLK
> + {GPIO_SKL_LP_GPP_D11, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //ISH_SPI_MISO_GP_BSSB_CLK
> + {GPIO_SKL_LP_GPP_D12, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //ISH_SPI_MOSI_GP_BSSB_DI
> + {GPIO_SKL_LP_GPP_D13, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //ISH_UART0_RXD_SML0BDATA
> + {GPIO_SKL_LP_GPP_D14, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //ISH_UART0_TXD_SML0BCLK
> + {GPIO_SKL_LP_GPP_D15, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //ISH_UART0_RTSB_GSPI2_CS1B
> + {GPIO_SKL_LP_GPP_D16, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //ISH_UART0_CTSB_SML0BALERTB
> + {GPIO_SKL_LP_GPP_D17, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //DMIC_CLK_1_SNDW3_CLK
> + {GPIO_SKL_LP_GPP_D18, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //DMIC_DATA_1_SNDW3_DATA
> + {GPIO_SKL_LP_GPP_D19, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //DMIC_CLK_0_SNDW4_CLK
> + {GPIO_SKL_LP_GPP_D20, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //DMIC_DATA_0_SNDW4_DATA
> + {GPIO_SKL_LP_GPP_D21, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirIn, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SPI1_IO_2
> + {GPIO_SKL_LP_GPP_D22, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SPI1_IO_3
> + {GPIO_SKL_LP_GPP_D23, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SSP_MCLK
> + {GPIO_SKL_LP_GPP_F0, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //CNV_GNSS_PA_BLANKING
> + {GPIO_SKL_LP_GPP_F1, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //CNV_GNSS_FTA
> + {GPIO_SKL_LP_GPP_F2, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //CNV_GNSS_SYSCK
> + {GPIO_SKL_LP_GPP_F3, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //
> + {GPIO_SKL_LP_GPP_F4, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //CNV_BRI_DT_UART0_RTSB
> + {GPIO_SKL_LP_GPP_F5, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //CNV_BRI_RSP_UART0_RXD
> + {GPIO_SKL_LP_GPP_F6, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //CNV_RGI_DT_UART0_TXD
> + {GPIO_SKL_LP_GPP_F7, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //CNV_RGI_RSP_UART0_CTSB
> + {GPIO_SKL_LP_GPP_F8, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //CNV_MFUART2_RXD
> + {GPIO_SKL_LP_GPP_F9, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutHigh, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //CNV_MFUART2_TXD
> + {GPIO_SKL_LP_GPP_F10, {GpioPadModeNative2, GpioHostOwnDefault,
> GpioDirDefault, GpioOutHigh, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //
> + {GPIO_SKL_LP_GPP_F11, {GpioPadModeNative2, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //EMMC_CMD
> + {GPIO_SKL_LP_GPP_F12, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //EMMC_DATA0
> + {GPIO_SKL_LP_GPP_F13, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //EMMC_DATA1
> + {GPIO_SKL_LP_GPP_F14, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //EMMC_DATA2
> + {GPIO_SKL_LP_GPP_F15, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //EMMC_DATA3
> + {GPIO_SKL_LP_GPP_F16, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //EMMC_DATA4
> + {GPIO_SKL_LP_GPP_F17, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //EMMC_DATA5
> + {GPIO_SKL_LP_GPP_F18, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //EMMC_DATA6
> + {GPIO_SKL_LP_GPP_F19, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //EMMC_DATA7
> + {GPIO_SKL_LP_GPP_F20, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //EMMC_RCLK
> + {GPIO_SKL_LP_GPP_F21, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //EMMC_CLK
> + {GPIO_SKL_LP_GPP_F22, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //EMMC_RESETB
> + {GPIO_SKL_LP_GPP_F23, {GpioPadModeGpio, GpioHostOwnAcpi,
> GpioDirIn, GpioOutDefault, GpioIntLevel | GpioIntApic,
> GpioHostDeepReset, GpioTermNone}}, //A4WP_PRESENT
> + {GPIO_SKL_LP_GPD0, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioResetDefault,
> GpioTermNone}}, //BATLOWB
> + {GPIO_SKL_LP_GPD1, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioResetDefault,
> GpioTermNative}}, //ACPRESENT
> + {GPIO_SKL_LP_GPD2, {GpioPadModeNative1, GpioHostOwnAcpi,
> GpioDirInInv, GpioOutDefault, GpioIntLevel | GpioIntSci,
> GpioResetDefault, GpioTermNone}}, //LAN_WAKEB
> + {GPIO_SKL_LP_GPD3, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioResetDefault,
> GpioTermWpu20K}}, //PWRBTNB
> + {GPIO_SKL_LP_GPD4, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioResetDefault,
> GpioTermNone}}, //SLP_S3B
> + {GPIO_SKL_LP_GPD5, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioResetDefault,
> GpioTermNone}}, //SLP_S4B
> + {GPIO_SKL_LP_GPD6, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioResetDefault,
> GpioTermNone}}, //SLP_AB
> + {GPIO_SKL_LP_GPD7, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioResetDefault,
> GpioTermNone}}, //
> + {GPIO_SKL_LP_GPD8, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioResetDefault,
> GpioTermNone}}, //SUSCLK
> + {GPIO_SKL_LP_GPD9, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioResetDefault,
> GpioTermNone}}, //SLP_WLANB
> + {GPIO_SKL_LP_GPD10, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioResetDefault,
> GpioTermNone}}, //SLP_S5B
> + {GPIO_SKL_LP_GPD11, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirIn, GpioOutDefault, GpioIntDis, GpioResetDefault,
> GpioTermNone}}, //LANPHYPC
> + {GPIO_SKL_LP_GPP_C0, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SMBCLK
> + {GPIO_SKL_LP_GPP_C1, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SMBDATA
> + {GPIO_SKL_LP_GPP_C2, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset,
> GpioTermWpd20K}}, //SMBALERTB
> + {GPIO_SKL_LP_GPP_C3, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SML0CLK
> + {GPIO_SKL_LP_GPP_C4, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SML0DATA
> + {GPIO_SKL_LP_GPP_C5, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SML0ALERTB
> + {GPIO_SKL_LP_GPP_C6, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SML1CLK
> + {GPIO_SKL_LP_GPP_C7, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SML1DATA
> + {GPIO_SKL_LP_GPP_C8, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //UART0_RXD
> + {GPIO_SKL_LP_GPP_C9, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //UART0_TXD
> + {GPIO_SKL_LP_GPP_C10, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //UART0_RTSB
> + {GPIO_SKL_LP_GPP_C11, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //UART0_CTSB
> + {GPIO_SKL_LP_GPP_C12, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //UART1_RXD_ISH_UART1_RXD
> + {GPIO_SKL_LP_GPP_C13, {GpioPadModeGpio, GpioHostOwnAcpi,
> GpioDirInInv, GpioOutDefault, GpioIntEdge | GpioIntSci,
> GpioPlatformReset, GpioTermNone}}, //UART1_TXD_ISH_UART1_TXD
> + {GPIO_SKL_LP_GPP_C14, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //UART1_RTSB_ISH_UART1_RTSB
> + {GPIO_SKL_LP_GPP_C15, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutHigh, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //UART1_CTSB_ISH_UART1_CTSB
> + {GPIO_SKL_LP_GPP_C16, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutLow, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //I2C0_SDA
> + {GPIO_SKL_LP_GPP_C17, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //I2C0_SCL
> + {GPIO_SKL_LP_GPP_C18, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //I2C1_SDA
> + {GPIO_SKL_LP_GPP_C19, GpioPadModeGpio, GpioHostOwnAcpi,
> GpioDirInInv, GpioOutDefault, GpioIntLevel | GpioIntSci,
> GpioHostDeepReset, GpioTermNone}, //I2C1_SCL
> + {GPIO_SKL_LP_GPP_C20, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutLow, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //UART2_RXD
> + {GPIO_SKL_LP_GPP_C21, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //UART2_TXD
> + {GPIO_SKL_LP_GPP_C22, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //UART2_RTSB
> + {GPIO_SKL_LP_GPP_C23, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //UART2_CTSB
> + {GPIO_SKL_LP_GPP_E0, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirIn, GpioOutDefault, GpioIntEdge | GpioIntApic,
> GpioHostDeepReset, GpioTermWpd20K}}, //SATAXPCIE_0_SATAGP_0
> + {GPIO_SKL_LP_GPP_E1, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SATAXPCIE_1_SATAGP_1
> + {GPIO_SKL_LP_GPP_E2, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirIn, GpioOutLow, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SATAXPCIE_2_SATAGP_2
> + {GPIO_SKL_LP_GPP_E3, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirInOut, GpioOutLow, GpioIntLevel | GpioIntDis,
> GpioHostDeepReset, GpioTermNone}}, //CPU_GP_0
> + {GPIO_SKL_LP_GPP_E4, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioResumeReset,
> GpioTermNone}}, //SATA_DEVSLP_0
> + {GPIO_SKL_LP_GPP_E5, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioResumeReset,
> GpioTermNone}}, //SATA_DEVSLP_1
> + {GPIO_SKL_LP_GPP_E6, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SATA_DEVSLP_2
> + {GPIO_SKL_LP_GPP_E7, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirIn, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //CPU_GP_1
> + {GPIO_SKL_LP_GPP_E8, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SATA_LEDB
> + {GPIO_SKL_LP_GPP_E9, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //USB2_OCB_0_GP_BSSB_CLk
> + {GPIO_SKL_LP_GPP_E10, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //USB2_OCB_1_GP_BSSB_DI
> + {GPIO_SKL_LP_GPP_E11, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //USB2_OCB_2
> + {GPIO_SKL_LP_GPP_E12, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //USB2_OCB_3
> + {GPIO_SKL_LP_GPP_E13, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //DDSP_HPD_0_DISP_MISC_0
> + {GPIO_SKL_LP_GPP_E14, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //DDSP_HPD_1_DISP_MISC_1
> + {GPIO_SKL_LP_GPP_E15, {GpioPadModeGpio, GpioHostOwnAcpi,
> GpioDirInInv, GpioOutDefault, GpioIntEdge | GpioIntSmi,
> GpioHostDeepReset, GpioTermNone}}, //DDSP_HPD_2_DISP_MISC_2
> + {GPIO_SKL_LP_GPP_E16, {GpioPadModeGpio, GpioHostOwnAcpi,
> GpioDirInInv, GpioOutDefault, GpioIntLevel | GpioIntSci,
> GpioPlatformReset, GpioTermNone}}, //DDSP_HPD_3_DISP_MISC_3
> + {GPIO_SKL_LP_GPP_E17, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //EDP_HPD_DISP_MISC_4
> + {GPIO_SKL_LP_GPP_E18, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //DDPB_CTRLCLK
> + {GPIO_SKL_LP_GPP_E19, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //DDPB_CTRLDATA
> + {GPIO_SKL_LP_GPP_E20, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //DDPC_CTRLCLK
> + {GPIO_SKL_LP_GPP_E21, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //DDPC_CTRLDATA
> + {GPIO_SKL_LP_GPP_E22, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirInOut, GpioOutDefault, GpioIntLevel | GpioIntApic,
> GpioHostDeepReset, GpioTermNone}}, //DDPD_CTRLCLK
> + {GPIO_SKL_LP_GPP_E23, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //DDPD_CTRLDATA
> + {END_OF_GPIO_TABLE, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioDswReset,
> GpioTermNone}},//Marking End of Table
> };
>
> UINT16 mGpioTableN1xxWUSize = sizeof (mGpioTableN1xxWU) / sizeof
> (GPIO_INIT_CONFIG) - 1;
> --
> 2.19.1.windows.1
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [edk2-devel] [edk2-platforms] ClevoOpenBoardPkg: Update board gpios
2019-08-30 1:12 [edk2-platforms] ClevoOpenBoardPkg: Update board gpios Agyeman, Prince
2019-08-30 12:41 ` Chiu, Chasel
@ 2019-08-30 16:47 ` Kubacki, Michael A
2019-08-30 18:39 ` Nate DeSimone
2 siblings, 0 replies; 4+ messages in thread
From: Kubacki, Michael A @ 2019-08-30 16:47 UTC (permalink / raw)
To: devel@edk2.groups.io, Agyeman, Prince
Cc: Gao, Liming, Wei, David Y, Desimone, Nathaniel L, Chiu, Chasel
Reviewed-by: Michael Kubacki <michael.a.kubacki@intel.com>
> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of
> Agyeman, Prince
> Sent: Thursday, August 29, 2019 6:12 PM
> To: devel@edk2.groups.io
> Cc: Gao, Liming <liming.gao@intel.com>; Wei, David Y
> <david.y.wei@intel.com>; Kubacki, Michael A
> <michael.a.kubacki@intel.com>; Desimone, Nathaniel L
> <nathaniel.l.desimone@intel.com>; Chiu, Chasel <chasel.chiu@intel.com>
> Subject: [edk2-devel] [edk2-platforms] ClevoOpenBoardPkg: Update board
> gpios
>
> Updated board GPIOS
>
> Cc: Liming Gao <liming.gao@intel.com>
> Cc: David Y Wei <david.y.wei@intel.com>
> Cc: Michael Kubacki <michael.a.kubacki@intel.com>
> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
> Cc: Chasel Chiu <chasel.chiu@intel.com>
>
> Signed-off-by: Agyeman <prince.agyeman@intel.com>
> ---
> .../Library/BoardInitLib/N1xxWUGpioTable.c | 329 +++++++++---------
> 1 file changed, 165 insertions(+), 164 deletions(-)
>
> diff --git
> a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Library/BoardInitLib/N1xxW
> UGpioTable.c
> b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Library/BoardInitLib/N1xxW
> UGpioTable.c
> index d055fda8c3..c99b83753f 100644
> ---
> a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Library/BoardInitLib/N1xxW
> UGpioTable.c
> +++
> b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Library/BoardInitLib/N1xxW
> UGpioTable.c
> @@ -20,170 +20,171 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
>
> GPIO_INIT_CONFIG mGpioTableN1xxWU[] =
> {
> -//skip for eSPI function {GPIO_SKL_LP_GPP_A0, {GpioPadModeNative1,
> GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis,
> GpioHostDeepReset, GpioTermNone}},//H_RCIN_N
> -//skip for eSPI function {GPIO_SKL_LP_GPP_A1, {GpioPadModeNative1,
> GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis,
> GpioHostDeepReset, GpioTermWpd20K}},//LPC_AD0_ESPI_IO0
> -//skip for eSPI function {GPIO_SKL_LP_GPP_A2, {GpioPadModeNative1,
> GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis,
> GpioHostDeepReset, GpioTermWpd20K}},//LPC_AD1_ESPI_IO1
> -//skip for eSPI function {GPIO_SKL_LP_GPP_A3, {GpioPadModeNative1,
> GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis,
> GpioHostDeepReset, GpioTermWpd20K}},//LPC_AD2_ESPI_IO2
> -//skip for eSPI function {GPIO_SKL_LP_GPP_A4, {GpioPadModeNative1,
> GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis,
> GpioHostDeepReset, GpioTermWpd20K}},//LPC_AD3_ESPI_IO3
> -//skip for eSPI function {GPIO_SKL_LP_GPP_A5, {GpioPadModeNative1,
> GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis,
> GpioHostDeepReset, GpioTermNone}},//LPC_FRAME_ESPI_CS_N
> -//skip for eSPI function {GPIO_SKL_LP_GPP_A6, {GpioPadModeNative1,
> GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis,
> GpioHostDeepReset, GpioTermNone}},//INT_SERIRQ
> - {GPIO_SKL_LP_GPP_A7, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//PM_SLP_S0ix_R_N
> -// skip for PM_CLKRUN_N {GPIO_SKL_LP_GPP_A8, {GpioPadModeNative1,
> GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis,
> GpioHostDeepReset, GpioTermNone}},//PM_CLKRUN_N
> -//skip for eSPI function {GPIO_SKL_LP_GPP_A9, {GpioPadModeNative1,
> GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis,
> GpioHostDeepReset, GpioTermWpd20K}},//LPC_CLK_ESPI_CLK
> -// skip for PCH_CLK_PCI_TPM {GPIO_SKL_LP_GPP_A10,
> {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault,
> GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}},//PCH_CLK_PCI_TPM
> - {GPIO_SKL_LP_GPP_A11, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirIn, GpioOutDefault, GpioIntLevel | GpioIntApic,
> GpioHostDeepReset, GpioTermNone}},//EC_HID_INTR
> - {GPIO_SKL_LP_GPP_A12, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutLow, GpioIntDis, GpioResumeReset,
> GpioTermNone}},//M.2_WWAN_GNSS_UART_RST_N
> -//skip for SUS_PWR_ACK_R {GPIO_SKL_LP_GPP_A13,
> {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault,
> GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SUS_PWR_ACK_R
> -//skip for eSPI function {GPIO_SKL_LP_GPP_A14, {GpioPadModeNative1,
> GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis,
> GpioHostDeepReset, GpioTermNone}},//PM_SUS_STAT_ESPI_RST_N
> -//skip for SUSACK_R_N {GPIO_SKL_LP_GPP_A15, {GpioPadModeNative1,
> GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis,
> GpioHostDeepReset, GpioTermWpd20K}},//SUSACK_R_N
> - {GPIO_SKL_LP_GPP_A16, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirIn, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SD_1P8_SEL
> - {GPIO_SKL_LP_GPP_A17, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SD_PWR_EN_N
> - {GPIO_SKL_LP_GPP_A18, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//ISH_GP_0_SENSOR
> - {GPIO_SKL_LP_GPP_A19, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//ISH_GP_1_SENSOR
> - {GPIO_SKL_LP_GPP_A20, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//ISH_GP_2_SENSOR
> - {GPIO_SKL_LP_GPP_A21, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//GNSS_CHUB_IRQ
> - {GPIO_SKL_LP_GPP_A22, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//FPS_SLP_N
> - {GPIO_SKL_LP_GPP_A23, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirIn, GpioOutDefault, GpioIntLevel | GpioIntApic,
> GpioHostDeepReset, GpioTermNone}},//FPS_DRDY
> - {GPIO_SKL_LP_GPP_B0, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//V0.85A_VID0
> - {GPIO_SKL_LP_GPP_B1, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//V0.85A_VID1
> - {GPIO_SKL_LP_GPP_B2, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//GP_VRALERTB
> - {GPIO_SKL_LP_GPP_B3, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirIn, GpioOutDefault, GpioIntLevel | GpioIntApic, GpioPlatformReset,
> GpioTermNone}},//TCH_PAD_INTR_R_N
> - {GPIO_SKL_LP_GPP_B4, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//BT_RF_KILL_N
> - {GPIO_SKL_LP_GPP_B5, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirIn, GpioOutDefault, GpioIntLevel | GpioIntApic,
> GpioHostDeepReset, GpioTermNone}},//M.2_BT_UART_WAKE_N
> - // {GPIO_SKL_LP_GPP_B6, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//CLK_REQ_SLOT1_N
> - // {GPIO_SKL_LP_GPP_B7, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//CLK_REQ_SLOT2_LAN_N
> - // {GPIO_SKL_LP_GPP_B8, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//CLK_REQ_M.2_SSD_SLOT3_N
> - // {GPIO_SKL_LP_GPP_B9, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//CLK_REQ_M.2_WIGIG_N
> - // {GPIO_SKL_LP_GPP_B10, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//CLK_REQ_M.2_WLAN_N
> - {GPIO_SKL_LP_GPP_B11, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//MPHY_EXT_PWR_GATEB
> - {GPIO_SKL_LP_GPP_B12, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//PCH_SLP_S0_N
> - {GPIO_SKL_LP_GPP_B13, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//PLT_RST_N
> - {GPIO_SKL_LP_GPP_B14, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset,
> GpioTermWpd20K}},//TCH_PNL_PWREN
> - // {GPIO_SKL_LP_GPP_B15, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutLow, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//PCH_NFC_DFU, NOT OWNED BY BIOS
> - {GPIO_SKL_LP_GPP_B16, {GpioPadModeGpio, GpioHostOwnAcpi,
> GpioDirInInv, GpioOutDefault, GpioIntLevel | GpioIntSci, GpioPlatformReset,
> GpioTermNone}},//M.2_WLAN_WIFI_WAKE_N
> - {GPIO_SKL_LP_GPP_B17, {GpioPadModeGpio, GpioHostOwnAcpi,
> GpioDirInInv, GpioOutDefault, GpioIntEdge | GpioIntSci, GpioPlatformReset,
> GpioTermWpu20K}},//TBT_CIO_PLUG_EVENT_N
> - {GPIO_SKL_LP_GPP_B18, {GpioPadModeGpio, GpioHostOwnAcpi,
> GpioDirInInv, GpioOutDefault, GpioIntLevel | GpioIntSci, GpioPlatformReset,
> GpioTermWpu20K}},//PCH_SLOT1_WAKE_N
> - {GPIO_SKL_LP_GPP_B19, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//FPS_GSPI1_CS_R1_N
> - {GPIO_SKL_LP_GPP_B20, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermWpd20K}},//FPS_GSPI1_CLK_R1
> - {GPIO_SKL_LP_GPP_B21, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermWpd20K}},//FPS_GSPI1_MISO_R1
> - {GPIO_SKL_LP_GPP_B22, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermWpd20K}},//FPS_GSPI1_MOSI_R1
> - {GPIO_SKL_LP_GPP_B23, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset,
> GpioTermWpd20K}},//DISCRETE_GNSS_RESET_N
> - {GPIO_SKL_LP_GPP_C0, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SMB_CLK
> - {GPIO_SKL_LP_GPP_C1, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermWpd20K}},//SMB_DATA
> - {GPIO_SKL_LP_GPP_C2, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset,
> GpioTermWpd20K}},//SKIN_THRM_SNSR_ALERT_N
> - {GPIO_SKL_LP_GPP_C3, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SML0_CLK
> - {GPIO_SKL_LP_GPP_C4, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SML0_DATA
> - {GPIO_SKL_LP_GPP_C5, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirInInv, GpioOutDefault, GpioIntLevel | GpioIntApic,
> GpioHostDeepReset, GpioTermWpd20K}},//M.2_WIGIG_WAKE_N
> - {GPIO_SKL_LP_GPP_C6, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SML1_CLK, OWNED BY ME
> - {GPIO_SKL_LP_GPP_C7, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermWpd20K}},//SML1_DATA, OWNED BY ME
> - {GPIO_SKL_LP_GPP_C8, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SERIALIO_UART0_RXD
> - {GPIO_SKL_LP_GPP_C9, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SERIALIO_UART0_TXD
> - {GPIO_SKL_LP_GPP_C10, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SERIALIO_UART0_RTS_N
> - {GPIO_SKL_LP_GPP_C11, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SERIALIO_UART0_CTS_N
> - {GPIO_SKL_LP_GPP_C12, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SERIALIO_UART1_ISH_UART1_RXD
> - {GPIO_SKL_LP_GPP_C13, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SERIALIO_UART1_ISH_UART1_TXD
> - {GPIO_SKL_LP_GPP_C14, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SERIALIO_UART1_ISH_UART1_RTS_N
> - {GPIO_SKL_LP_GPP_C15, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SERIALIO_UART1_ISH_UART1_CTS_N
> - {GPIO_SKL_LP_GPP_C16, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SERIALIO_I2C0_SDA
> - {GPIO_SKL_LP_GPP_C17, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SERIALIO_I2C0_SCL
> - {GPIO_SKL_LP_GPP_C18, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SERIALIO_I2C1_SDA
> - {GPIO_SKL_LP_GPP_C19, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SERIALIO_I2C1_SCL
> - {GPIO_SKL_LP_GPP_C20, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SERIALIO_UART2_RXD
> - {GPIO_SKL_LP_GPP_C21, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SERIALIO_UART2_TXD
> - {GPIO_SKL_LP_GPP_C22, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SERIALIO_UART2_RTS_N
> - {GPIO_SKL_LP_GPP_C23, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SERIALIO_UART2_CTS_N
> - {GPIO_SKL_LP_GPP_D0, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SPI1_TCHPNL_CS_N
> - {GPIO_SKL_LP_GPP_D1, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SPI1_TCHPNL_CLK
> - {GPIO_SKL_LP_GPP_D2, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SPI1_TCHPNL_MISO
> - {GPIO_SKL_LP_GPP_D3, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SPI1_TCHPNL_MOSI
> - {GPIO_SKL_LP_GPP_D4, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//CSI2_FLASH_STROBE
> - {GPIO_SKL_LP_GPP_D5, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//ISH_I2C0_SDA
> - {GPIO_SKL_LP_GPP_D6, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//ISH_I2C0_SCL
> - {GPIO_SKL_LP_GPP_D7, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//ISH_I2C1_SDA
> - {GPIO_SKL_LP_GPP_D8, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//ISH_I2C1_SCL/SB_BLON
> - {GPIO_SKL_LP_GPP_D9, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirIn, GpioOutDefault, GpioIntLevel | GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//HOME_BTN
> - {GPIO_SKL_LP_GPP_D10, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirIn, GpioOutDefault, GpioIntLevel | GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SCREEN_LOCK_PCH
> - {GPIO_SKL_LP_GPP_D11, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirIn, GpioOutDefault, GpioIntLevel | GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//VOL_UP_PCH
> - {GPIO_SKL_LP_GPP_D12, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirIn, GpioOutDefault, GpioIntLevel | GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//VOL_DOWN_PCH
> - {GPIO_SKL_LP_GPP_D13, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//ISH_UART0_RXD_SML0B_DATA
> - {GPIO_SKL_LP_GPP_D14, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//ISH_UART0_TXD_SML0B_CLK
> - {GPIO_SKL_LP_GPP_D15, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//ISH_UART0_RTS_N
> - {GPIO_SKL_LP_GPP_D16, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//ISH_UART0_CTS_SML0B_ALERT_N
> - {GPIO_SKL_LP_GPP_D17, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//DMIC_CLK_1
> - {GPIO_SKL_LP_GPP_D18, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermWpd20K}},//DMIC_DATA_1
> - {GPIO_SKL_LP_GPP_D19, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//DMIC_CLK_0
> - {GPIO_SKL_LP_GPP_D20, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermWpd20K}},//DMIC_DATA_0
> - {GPIO_SKL_LP_GPP_D21, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SPI1_TCHPNL_IO2
> - {GPIO_SKL_LP_GPP_D22, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SPI1_TCHPNL_IO3
> - {GPIO_SKL_LP_GPP_D23, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SSP_MCLK
> - {GPIO_SKL_LP_GPP_E0, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirInInv, GpioOutDefault, GpioIntEdge | GpioIntApic,
> GpioHostDeepReset, GpioTermNone}},//SPI_TPM_HDR_IRQ_N
> - {GPIO_SKL_LP_GPP_E1, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SATA_ODD_PRSNT_N
> - {GPIO_SKL_LP_GPP_E2, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntLvlEdgDis | GpioIntApic,
> GpioHostDeepReset, GpioTermNone}},//M.2_SSD_SATA2_PCIE3_DET_N
> - {GPIO_SKL_LP_GPP_E3, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutHigh, GpioIntDis, GpioResumeReset,
> GpioTermNone}},//EINK_SSR_DFU_N
> - {GPIO_SKL_LP_GPP_E4, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//PCH_NFC_RESET
> - {GPIO_SKL_LP_GPP_E5, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SATA1_PHYSLP1_DIRECT_R
> - // {GPIO_SKL_LP_GPP_E6, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutLow, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SATA2_PHYSLP2_M.2SSD_R, NOT OWNED BY BIOS
> - {GPIO_SKL_LP_GPP_E8, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//PCH_SATA_LED_N
> - {GPIO_SKL_LP_GPP_E9, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//USB_OC_0_WP1_OTG_N
> - {GPIO_SKL_LP_GPP_E10, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//USB_OC_1_WP4_N
> - {GPIO_SKL_LP_GPP_E11, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//USB_OC_2_WP2_WP3_WP5_R_N
> - // {GPIO_SKL_LP_GPP_E12, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirIn, GpioOutDefault, GpioIntLevel | GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//PCH_NFC_IRQ, NOT OWNED BY BIOS
> - {GPIO_SKL_LP_GPP_E13, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//DDI1_HPD_Q
> - {GPIO_SKL_LP_GPP_E14, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//DDI2_HPD_Q
> - {GPIO_SKL_LP_GPP_E15, {GpioPadModeGpio, GpioHostOwnAcpi,
> GpioDirInInv, GpioOutDefault, GpioIntEdge | GpioIntSmi,
> GpioHostDeepReset, GpioTermNone}},//SMC_EXTSMI_R_N
> - {GPIO_SKL_LP_GPP_E16, {GpioPadModeGpio, GpioHostOwnAcpi,
> GpioDirInInv, GpioOutDefault, GpioIntLevel | GpioIntSci, GpioPlatformReset,
> GpioTermNone}},//SMC_RUNTIME_SCI_R_N
> - {GPIO_SKL_LP_GPP_E17, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//EDP_HPD
> - {GPIO_SKL_LP_GPP_E18, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//DDI1_CTRL_CLK
> - {GPIO_SKL_LP_GPP_E19, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermWpd20K}},//DDI1_CTRL_DATA
> - {GPIO_SKL_LP_GPP_E20, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//DDI2_CTRL_CLK
> - {GPIO_SKL_LP_GPP_E21, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermWpd20K}},//DDI2_CTRL_DATA
> - {GPIO_SKL_LP_GPP_E22, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirInInv, GpioOutDefault, GpioIntLevel | GpioIntApic,
> GpioHostDeepReset, GpioTermNone}},//PCH_CODEC_IRQ
> - {GPIO_SKL_LP_GPP_E23, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset,
> GpioTermWpd20K}},//TCH_PNL_RST_N
> - {GPIO_SKL_LP_GPP_F0, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SSP2_SCLK
> - {GPIO_SKL_LP_GPP_F1, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SSP2_SFRM
> - {GPIO_SKL_LP_GPP_F2, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SSP2_TXD
> - {GPIO_SKL_LP_GPP_F3, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SSP2_RXD
> - {GPIO_SKL_LP_GPP_F4, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTolerance1v8 | GpioTermNone}},//SERIALIO_I2C2_SDA
> - {GPIO_SKL_LP_GPP_F5, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTolerance1v8 | GpioTermNone}},//SERIALIO_I2C2_SCL
> - {GPIO_SKL_LP_GPP_F6, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTolerance1v8 | GpioTermNone}},//SERIALIO_I2C3_SDA
> - {GPIO_SKL_LP_GPP_F7, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTolerance1v8 | GpioTermNone}},//SERIALIO_I2C3_SCL
> - {GPIO_SKL_LP_GPP_F8, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTolerance1v8 | GpioTermNone}},//SERIALIO_I2C4_SDA
> - {GPIO_SKL_LP_GPP_F9, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTolerance1v8 | GpioTermNone}},//SERIALIO_I2C4_SCL
> - {GPIO_SKL_LP_GPP_F10, {GpioPadModeNative2, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTolerance1v8 | GpioTermNone}},//SERIALIO_I2C5_ISH_12C2_SDA
> - {GPIO_SKL_LP_GPP_F11, {GpioPadModeNative2, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTolerance1v8 | GpioTermNone}},//SERIALIO_I2C5_ISH_12C2_SCL
> - {GPIO_SKL_LP_GPP_F12, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//EMMC_CMD
> - {GPIO_SKL_LP_GPP_F13, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//EMMC_DATA0
> - {GPIO_SKL_LP_GPP_F14, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//EMMC_DATA1
> - {GPIO_SKL_LP_GPP_F15, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//EMMC_DATA2
> - {GPIO_SKL_LP_GPP_F16, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//EMMC_DATA3
> - {GPIO_SKL_LP_GPP_F17, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//EMMC_DATA4
> - {GPIO_SKL_LP_GPP_F18, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//EMMC_DATA5
> - {GPIO_SKL_LP_GPP_F19, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//EMMC_DATA6
> - {GPIO_SKL_LP_GPP_F20, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//EMMC_DATA7
> - {GPIO_SKL_LP_GPP_F21, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//EMMC_RCLK
> - {GPIO_SKL_LP_GPP_F22, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//EMMC_CLK
> - {GPIO_SKL_LP_GPP_F23, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirIn, GpioOutDefault, GpioIntLevel | GpioIntApic,
> GpioHostDeepReset, GpioTermNone}},//PCH_M.2_WWAN_UIM_SIM_DET
> - {GPIO_SKL_LP_GPP_G0, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SD_CMD
> - {GPIO_SKL_LP_GPP_G1, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SD_DATA0
> - {GPIO_SKL_LP_GPP_G2, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SD_DATA1
> - {GPIO_SKL_LP_GPP_G3, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SD_DATA2
> - {GPIO_SKL_LP_GPP_G4, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SD_DATA3
> - {GPIO_SKL_LP_GPP_G5, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SD_CDB
> - {GPIO_SKL_LP_GPP_G6, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SD_CLK
> - {GPIO_SKL_LP_GPP_G7, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}},//SD_WP
> - {GPIO_SKL_LP_GPD0, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioDswReset,
> GpioTermNone}},//PM_BATLOW_R_N
> - {GPIO_SKL_LP_GPD1, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioDswReset,
> GpioTermNone}},//AC_PRESENT_R
> - {GPIO_SKL_LP_GPD2, {GpioPadModeNative1, GpioHostOwnAcpi,
> GpioDirIn, GpioOutDefault, GpioIntLevel | GpioIntSci, GpioDswReset,
> GpioTermNone}},//LANWAKE_SMC_WAKE_SCI_N
> - {GPIO_SKL_LP_GPD3, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioDswReset,
> GpioTermWpu20K}},//PM_PWRBTN_R_N
> - {GPIO_SKL_LP_GPD4, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioDswReset,
> GpioTermNone}},//SLP_S3_R_N
> - {GPIO_SKL_LP_GPD5, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioDswReset,
> GpioTermNone}},//SLP_S4_R_N
> - {GPIO_SKL_LP_GPD6, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioDswReset,
> GpioTermNone}},//SLP_M_R_N
> - {GPIO_SKL_LP_GPD7, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioDswReset,
> GpioTermNone}},//USB_WAKEOUT_INTRUDET_N
> - {GPIO_SKL_LP_GPD8, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioDswReset,
> GpioTermNone}},//SUS_CLK
> - {GPIO_SKL_LP_GPD9, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioDswReset,
> GpioTermNone}},//PCH_SLP_WLAN_N
> - {GPIO_SKL_LP_GPD10, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioDswReset,
> GpioTermNone}},//SLP_S5_R_N
> - {GPIO_SKL_LP_GPD11, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioDswReset,
> GpioTermNone}},//PM_LANPHY_ENABLE
> - {END_OF_GPIO_TABLE, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioDswReset,
> GpioTermNone}},//Marking End of Table
> + {GPIO_SKL_LP_GPP_A0, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirIn, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //RCINB_TIME_SYNC_1
> + {GPIO_SKL_LP_GPP_A1, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirInOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNative}}, //LAD_0_ESPI_IO_0
> + {GPIO_SKL_LP_GPP_A2, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirInOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //LAD_1_ESPI_IO_1
> + {GPIO_SKL_LP_GPP_A3, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirInOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNative}}, //LAD_2_ESPI_IO_2
> + {GPIO_SKL_LP_GPP_A4, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirInOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //LAD_3_ESPI_IO_3
> + {GPIO_SKL_LP_GPP_A5, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //LFRAMEB_ESPI_CSB
> + {GPIO_SKL_LP_GPP_A6, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirInOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SERIRQ
> + {GPIO_SKL_LP_GPP_A7, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirIn, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //PIRQAB_GSPI0_CS1B
> + {GPIO_SKL_LP_GPP_A8, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //CLKRUNB
> + {GPIO_SKL_LP_GPP_A9, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermWpd20K}}, //CLKOUT_LPC_0_ESPI_CLK
> + {GPIO_SKL_LP_GPP_A10, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermWpd20K}}, //CLKOUT_LPC_1
> + {GPIO_SKL_LP_GPP_A11, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermWpu20K}}, //PMEB_GSPI1_CS1B
> + {GPIO_SKL_LP_GPP_A12, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //BM_BUSYB_ISH_GP_6
> + {GPIO_SKL_LP_GPP_A13, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SUSWARNB_SUSPWRDNACK
> + {GPIO_SKL_LP_GPP_A14, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SUS_STATB_ESPI_RESETB
> + {GPIO_SKL_LP_GPP_A15, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirIn, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermWpu20K}}, //SUSACKB
> + {GPIO_SKL_LP_GPP_A16, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SD_1P8_SEL
> + {GPIO_SKL_LP_GPP_A17, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SD_VDD1_PWR_EN_B_ISH_GP_7
> + {GPIO_SKL_LP_GPP_A18, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //ISH_GP_0
> + {GPIO_SKL_LP_GPP_A19, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //ISH_GP_1
> + {GPIO_SKL_LP_GPP_A20, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //ISH_GP_2
> + {GPIO_SKL_LP_GPP_A21, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioPlatformReset,
> GpioTermNone}}, //ISH_GP_3
> + {GPIO_SKL_LP_GPP_A22, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioResumeReset,
> GpioTermNone}}, //ISH_GP_4
> + {GPIO_SKL_LP_GPP_A23, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioResumeReset,
> GpioTermNone}}, //ISH_GP_5
> + {GPIO_SKL_LP_GPP_B0, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //CORE_VID_0
> + {GPIO_SKL_LP_GPP_B1, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //CORE_VID_1
> + {GPIO_SKL_LP_GPP_B2, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //VRALERTB
> + {GPIO_SKL_LP_GPP_B3, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //CPU_GP_2
> + {GPIO_SKL_LP_GPP_B4, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //CPU_GP_3
> + {GPIO_SKL_LP_GPP_B5, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SRCCLKREQB_0
> + {GPIO_SKL_LP_GPP_B6, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SRCCLKREQB_1
> + {GPIO_SKL_LP_GPP_B7, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SRCCLKREQB_2
> + {GPIO_SKL_LP_GPP_B8, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SRCCLKREQB_3
> + {GPIO_SKL_LP_GPP_B9, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutLow, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SRCCLKREQB_4
> + {GPIO_SKL_LP_GPP_B10, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SRCCLKREQB_5
> + {GPIO_SKL_LP_GPP_B11, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //EXT_PWR_GATEB
> + {GPIO_SKL_LP_GPP_B12, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SLP_S0B
> + {GPIO_SKL_LP_GPP_B13, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //PLTRSTB
> + {GPIO_SKL_LP_GPP_B14, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermWpd20K}}, //SPKR
> + {GPIO_SKL_LP_GPP_B15, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //GSPI0_CS0B
> + {GPIO_SKL_LP_GPP_B16, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //GSPI0_CLK
> + {GPIO_SKL_LP_GPP_B17, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //GSPI0_MISO
> + {GPIO_SKL_LP_GPP_B18, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermWpu20K}}, //GSPI0_MOSI
> + {GPIO_SKL_LP_GPP_B19, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //GSPI1_CS0B
> + {GPIO_SKL_LP_GPP_B20, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //GSPI1_CLK_NFC_CLK
> + {GPIO_SKL_LP_GPP_B21, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //GSPI1_MISO_NFC_CLKREQ
> + {GPIO_SKL_LP_GPP_B22, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermWpd20K}}, //GSPI1_MOSI
> + {GPIO_SKL_LP_GPP_B23, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SML1ALERTB_PCHHOTB
> + {GPIO_SKL_LP_GPP_G0, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //GPPC_G_0_SD3_CMD
> + {GPIO_SKL_LP_GPP_G1, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirIn, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //GPPC_G_1_SD3_D0_SD4_RCLK_P
> + {GPIO_SKL_LP_GPP_G2, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //GPPC_G_2_SD3_D1_SD4_RCLK_N
> + {GPIO_SKL_LP_GPP_G3, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //GPPC_G_3_SD3_D2
> + {GPIO_SKL_LP_GPP_G4, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //GPPC_G_4_SD3_D3
> + {GPIO_SKL_LP_GPP_G5, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //GPPC_G_5_SD3_CDB
> + {GPIO_SKL_LP_GPP_G6, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //GPPC_G_6_SD3_CLK
> + {GPIO_SKL_LP_GPP_G7, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //GPPC_G_7_SD3_WP
> + {GPIO_SKL_LP_GPP_D0, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SPI1_CSB_BK_0
> + {GPIO_SKL_LP_GPP_D1, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SPI1_CLK_BK_1
> + {GPIO_SKL_LP_GPP_D2, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SPI1_MISO_IO_1_BK_2
> + {GPIO_SKL_LP_GPP_D3, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SPI1_MOSI_IO_0_BK_3
> + {GPIO_SKL_LP_GPP_D4, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //IMGCLKOUT_0_BK_4
> + {GPIO_SKL_LP_GPP_D5, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutHigh, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //ISH_I2C0_SDA
> + {GPIO_SKL_LP_GPP_D6, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //ISH_I2C0_SCL
> + {GPIO_SKL_LP_GPP_D7, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //ISH_I2C1_SDA
> + {GPIO_SKL_LP_GPP_D8, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //ISH_I2C1_SCL
> + {GPIO_SKL_LP_GPP_D9, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //ISH_SPI_CSB
> + {GPIO_SKL_LP_GPP_D10, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //ISH_SPI_CLK
> + {GPIO_SKL_LP_GPP_D11, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //ISH_SPI_MISO_GP_BSSB_CLK
> + {GPIO_SKL_LP_GPP_D12, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //ISH_SPI_MOSI_GP_BSSB_DI
> + {GPIO_SKL_LP_GPP_D13, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //ISH_UART0_RXD_SML0BDATA
> + {GPIO_SKL_LP_GPP_D14, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //ISH_UART0_TXD_SML0BCLK
> + {GPIO_SKL_LP_GPP_D15, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //ISH_UART0_RTSB_GSPI2_CS1B
> + {GPIO_SKL_LP_GPP_D16, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //ISH_UART0_CTSB_SML0BALERTB
> + {GPIO_SKL_LP_GPP_D17, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //DMIC_CLK_1_SNDW3_CLK
> + {GPIO_SKL_LP_GPP_D18, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //DMIC_DATA_1_SNDW3_DATA
> + {GPIO_SKL_LP_GPP_D19, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //DMIC_CLK_0_SNDW4_CLK
> + {GPIO_SKL_LP_GPP_D20, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //DMIC_DATA_0_SNDW4_DATA
> + {GPIO_SKL_LP_GPP_D21, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirIn, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SPI1_IO_2
> + {GPIO_SKL_LP_GPP_D22, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SPI1_IO_3
> + {GPIO_SKL_LP_GPP_D23, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SSP_MCLK
> + {GPIO_SKL_LP_GPP_F0, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //CNV_GNSS_PA_BLANKING
> + {GPIO_SKL_LP_GPP_F1, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //CNV_GNSS_FTA
> + {GPIO_SKL_LP_GPP_F2, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //CNV_GNSS_SYSCK
> + {GPIO_SKL_LP_GPP_F3, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //
> + {GPIO_SKL_LP_GPP_F4, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //CNV_BRI_DT_UART0_RTSB
> + {GPIO_SKL_LP_GPP_F5, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //CNV_BRI_RSP_UART0_RXD
> + {GPIO_SKL_LP_GPP_F6, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //CNV_RGI_DT_UART0_TXD
> + {GPIO_SKL_LP_GPP_F7, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //CNV_RGI_RSP_UART0_CTSB
> + {GPIO_SKL_LP_GPP_F8, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //CNV_MFUART2_RXD
> + {GPIO_SKL_LP_GPP_F9, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutHigh, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //CNV_MFUART2_TXD
> + {GPIO_SKL_LP_GPP_F10, {GpioPadModeNative2, GpioHostOwnDefault,
> GpioDirDefault, GpioOutHigh, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //
> + {GPIO_SKL_LP_GPP_F11, {GpioPadModeNative2, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //EMMC_CMD
> + {GPIO_SKL_LP_GPP_F12, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //EMMC_DATA0
> + {GPIO_SKL_LP_GPP_F13, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //EMMC_DATA1
> + {GPIO_SKL_LP_GPP_F14, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //EMMC_DATA2
> + {GPIO_SKL_LP_GPP_F15, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //EMMC_DATA3
> + {GPIO_SKL_LP_GPP_F16, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //EMMC_DATA4
> + {GPIO_SKL_LP_GPP_F17, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //EMMC_DATA5
> + {GPIO_SKL_LP_GPP_F18, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //EMMC_DATA6
> + {GPIO_SKL_LP_GPP_F19, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //EMMC_DATA7
> + {GPIO_SKL_LP_GPP_F20, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //EMMC_RCLK
> + {GPIO_SKL_LP_GPP_F21, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //EMMC_CLK
> + {GPIO_SKL_LP_GPP_F22, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //EMMC_RESETB
> + {GPIO_SKL_LP_GPP_F23, {GpioPadModeGpio, GpioHostOwnAcpi,
> GpioDirIn, GpioOutDefault, GpioIntLevel | GpioIntApic,
> GpioHostDeepReset, GpioTermNone}}, //A4WP_PRESENT
> + {GPIO_SKL_LP_GPD0, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioResetDefault,
> GpioTermNone}}, //BATLOWB
> + {GPIO_SKL_LP_GPD1, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioResetDefault,
> GpioTermNative}}, //ACPRESENT
> + {GPIO_SKL_LP_GPD2, {GpioPadModeNative1, GpioHostOwnAcpi,
> GpioDirInInv, GpioOutDefault, GpioIntLevel | GpioIntSci, GpioResetDefault,
> GpioTermNone}}, //LAN_WAKEB
> + {GPIO_SKL_LP_GPD3, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioResetDefault,
> GpioTermWpu20K}}, //PWRBTNB
> + {GPIO_SKL_LP_GPD4, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioResetDefault,
> GpioTermNone}}, //SLP_S3B
> + {GPIO_SKL_LP_GPD5, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioResetDefault,
> GpioTermNone}}, //SLP_S4B
> + {GPIO_SKL_LP_GPD6, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioResetDefault,
> GpioTermNone}}, //SLP_AB
> + {GPIO_SKL_LP_GPD7, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioResetDefault,
> GpioTermNone}}, //
> + {GPIO_SKL_LP_GPD8, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioResetDefault,
> GpioTermNone}}, //SUSCLK
> + {GPIO_SKL_LP_GPD9, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioResetDefault,
> GpioTermNone}}, //SLP_WLANB
> + {GPIO_SKL_LP_GPD10, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioResetDefault,
> GpioTermNone}}, //SLP_S5B
> + {GPIO_SKL_LP_GPD11, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirIn, GpioOutDefault, GpioIntDis, GpioResetDefault,
> GpioTermNone}}, //LANPHYPC
> + {GPIO_SKL_LP_GPP_C0, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SMBCLK
> + {GPIO_SKL_LP_GPP_C1, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SMBDATA
> + {GPIO_SKL_LP_GPP_C2, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset,
> GpioTermWpd20K}}, //SMBALERTB
> + {GPIO_SKL_LP_GPP_C3, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SML0CLK
> + {GPIO_SKL_LP_GPP_C4, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SML0DATA
> + {GPIO_SKL_LP_GPP_C5, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SML0ALERTB
> + {GPIO_SKL_LP_GPP_C6, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SML1CLK
> + {GPIO_SKL_LP_GPP_C7, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SML1DATA
> + {GPIO_SKL_LP_GPP_C8, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //UART0_RXD
> + {GPIO_SKL_LP_GPP_C9, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //UART0_TXD
> + {GPIO_SKL_LP_GPP_C10, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //UART0_RTSB
> + {GPIO_SKL_LP_GPP_C11, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //UART0_CTSB
> + {GPIO_SKL_LP_GPP_C12, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //UART1_RXD_ISH_UART1_RXD
> + {GPIO_SKL_LP_GPP_C13, {GpioPadModeGpio, GpioHostOwnAcpi,
> GpioDirInInv, GpioOutDefault, GpioIntEdge | GpioIntSci,
> GpioPlatformReset, GpioTermNone}}, //UART1_TXD_ISH_UART1_TXD
> + {GPIO_SKL_LP_GPP_C14, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //UART1_RTSB_ISH_UART1_RTSB
> + {GPIO_SKL_LP_GPP_C15, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutHigh, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //UART1_CTSB_ISH_UART1_CTSB
> + {GPIO_SKL_LP_GPP_C16, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutLow, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //I2C0_SDA
> + {GPIO_SKL_LP_GPP_C17, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //I2C0_SCL
> + {GPIO_SKL_LP_GPP_C18, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //I2C1_SDA
> + {GPIO_SKL_LP_GPP_C19, GpioPadModeGpio, GpioHostOwnAcpi,
> GpioDirInInv, GpioOutDefault, GpioIntLevel | GpioIntSci,
> GpioHostDeepReset, GpioTermNone}, //I2C1_SCL
> + {GPIO_SKL_LP_GPP_C20, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutLow, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //UART2_RXD
> + {GPIO_SKL_LP_GPP_C21, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //UART2_TXD
> + {GPIO_SKL_LP_GPP_C22, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //UART2_RTSB
> + {GPIO_SKL_LP_GPP_C23, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //UART2_CTSB
> + {GPIO_SKL_LP_GPP_E0, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirIn, GpioOutDefault, GpioIntEdge | GpioIntApic,
> GpioHostDeepReset, GpioTermWpd20K}}, //SATAXPCIE_0_SATAGP_0
> + {GPIO_SKL_LP_GPP_E1, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SATAXPCIE_1_SATAGP_1
> + {GPIO_SKL_LP_GPP_E2, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirIn, GpioOutLow, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SATAXPCIE_2_SATAGP_2
> + {GPIO_SKL_LP_GPP_E3, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirInOut, GpioOutLow, GpioIntLevel | GpioIntDis,
> GpioHostDeepReset, GpioTermNone}}, //CPU_GP_0
> + {GPIO_SKL_LP_GPP_E4, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioResumeReset,
> GpioTermNone}}, //SATA_DEVSLP_0
> + {GPIO_SKL_LP_GPP_E5, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioResumeReset,
> GpioTermNone}}, //SATA_DEVSLP_1
> + {GPIO_SKL_LP_GPP_E6, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SATA_DEVSLP_2
> + {GPIO_SKL_LP_GPP_E7, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirIn, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //CPU_GP_1
> + {GPIO_SKL_LP_GPP_E8, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //SATA_LEDB
> + {GPIO_SKL_LP_GPP_E9, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //USB2_OCB_0_GP_BSSB_CLk
> + {GPIO_SKL_LP_GPP_E10, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //USB2_OCB_1_GP_BSSB_DI
> + {GPIO_SKL_LP_GPP_E11, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //USB2_OCB_2
> + {GPIO_SKL_LP_GPP_E12, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //USB2_OCB_3
> + {GPIO_SKL_LP_GPP_E13, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //DDSP_HPD_0_DISP_MISC_0
> + {GPIO_SKL_LP_GPP_E14, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //DDSP_HPD_1_DISP_MISC_1
> + {GPIO_SKL_LP_GPP_E15, {GpioPadModeGpio, GpioHostOwnAcpi,
> GpioDirInInv, GpioOutDefault, GpioIntEdge | GpioIntSmi,
> GpioHostDeepReset, GpioTermNone}}, //DDSP_HPD_2_DISP_MISC_2
> + {GPIO_SKL_LP_GPP_E16, {GpioPadModeGpio, GpioHostOwnAcpi,
> GpioDirInInv, GpioOutDefault, GpioIntLevel | GpioIntSci,
> GpioPlatformReset, GpioTermNone}}, //DDSP_HPD_3_DISP_MISC_3
> + {GPIO_SKL_LP_GPP_E17, {GpioPadModeNative1, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //EDP_HPD_DISP_MISC_4
> + {GPIO_SKL_LP_GPP_E18, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //DDPB_CTRLCLK
> + {GPIO_SKL_LP_GPP_E19, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //DDPB_CTRLDATA
> + {GPIO_SKL_LP_GPP_E20, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //DDPC_CTRLCLK
> + {GPIO_SKL_LP_GPP_E21, {GpioPadModeNative1, GpioHostOwnDefault,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //DDPC_CTRLDATA
> + {GPIO_SKL_LP_GPP_E22, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirInOut, GpioOutDefault, GpioIntLevel | GpioIntApic,
> GpioHostDeepReset, GpioTermNone}}, //DDPD_CTRLCLK
> + {GPIO_SKL_LP_GPP_E23, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset,
> GpioTermNone}}, //DDPD_CTRLDATA
> + {END_OF_GPIO_TABLE, {GpioPadModeGpio, GpioHostOwnGpio,
> GpioDirNone, GpioOutDefault, GpioIntDis, GpioDswReset,
> GpioTermNone}},//Marking End of Table
> };
>
> UINT16 mGpioTableN1xxWUSize = sizeof (mGpioTableN1xxWU) / sizeof
> (GPIO_INIT_CONFIG) - 1;
> --
> 2.19.1.windows.1
>
>
>
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [edk2-devel] [edk2-platforms] ClevoOpenBoardPkg: Update board gpios
2019-08-30 1:12 [edk2-platforms] ClevoOpenBoardPkg: Update board gpios Agyeman, Prince
2019-08-30 12:41 ` Chiu, Chasel
2019-08-30 16:47 ` [edk2-devel] " Kubacki, Michael A
@ 2019-08-30 18:39 ` Nate DeSimone
2 siblings, 0 replies; 4+ messages in thread
From: Nate DeSimone @ 2019-08-30 18:39 UTC (permalink / raw)
To: devel@edk2.groups.io, Agyeman, Prince
Cc: Gao, Liming, Wei, David Y, Kubacki, Michael A, Chiu, Chasel
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Agyeman, Prince
Sent: Thursday, August 29, 2019 6:12 PM
To: devel@edk2.groups.io
Cc: Gao, Liming <liming.gao@intel.com>; Wei, David Y <david.y.wei@intel.com>; Kubacki, Michael A <michael.a.kubacki@intel.com>; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; Chiu, Chasel <chasel.chiu@intel.com>
Subject: [edk2-devel] [edk2-platforms] ClevoOpenBoardPkg: Update board gpios
Updated board GPIOS
Cc: Liming Gao <liming.gao@intel.com>
Cc: David Y Wei <david.y.wei@intel.com>
Cc: Michael Kubacki <michael.a.kubacki@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Signed-off-by: Agyeman <prince.agyeman@intel.com>
---
.../Library/BoardInitLib/N1xxWUGpioTable.c | 329 +++++++++---------
1 file changed, 165 insertions(+), 164 deletions(-)
diff --git a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Library/BoardInitLib/N1xxWUGpioTable.c b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Library/BoardInitLib/N1xxWUGpioTable.c
index d055fda8c3..c99b83753f 100644
--- a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Library/BoardInitLib/N1xxWUGpioTable.c
+++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Library/BoardInitLib/N1xxWUGpioTable.c
@@ -20,170 +20,171 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
GPIO_INIT_CONFIG mGpioTableN1xxWU[] =
{
-//skip for eSPI function {GPIO_SKL_LP_GPP_A0, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//H_RCIN_N
-//skip for eSPI function {GPIO_SKL_LP_GPP_A1, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}},//LPC_AD0_ESPI_IO0
-//skip for eSPI function {GPIO_SKL_LP_GPP_A2, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}},//LPC_AD1_ESPI_IO1
-//skip for eSPI function {GPIO_SKL_LP_GPP_A3, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}},//LPC_AD2_ESPI_IO2
-//skip for eSPI function {GPIO_SKL_LP_GPP_A4, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}},//LPC_AD3_ESPI_IO3
-//skip for eSPI function {GPIO_SKL_LP_GPP_A5, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//LPC_FRAME_ESPI_CS_N
-//skip for eSPI function {GPIO_SKL_LP_GPP_A6, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//INT_SERIRQ
- {GPIO_SKL_LP_GPP_A7, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//PM_SLP_S0ix_R_N
-// skip for PM_CLKRUN_N {GPIO_SKL_LP_GPP_A8, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//PM_CLKRUN_N
-//skip for eSPI function {GPIO_SKL_LP_GPP_A9, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}},//LPC_CLK_ESPI_CLK
-// skip for PCH_CLK_PCI_TPM {GPIO_SKL_LP_GPP_A10, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}},//PCH_CLK_PCI_TPM
- {GPIO_SKL_LP_GPP_A11, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, GpioOutDefault, GpioIntLevel | GpioIntApic, GpioHostDeepReset, GpioTermNone}},//EC_HID_INTR
- {GPIO_SKL_LP_GPP_A12, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutLow, GpioIntDis, GpioResumeReset, GpioTermNone}},//M.2_WWAN_GNSS_UART_RST_N
-//skip for SUS_PWR_ACK_R {GPIO_SKL_LP_GPP_A13, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SUS_PWR_ACK_R
-//skip for eSPI function {GPIO_SKL_LP_GPP_A14, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//PM_SUS_STAT_ESPI_RST_N
-//skip for SUSACK_R_N {GPIO_SKL_LP_GPP_A15, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}},//SUSACK_R_N
- {GPIO_SKL_LP_GPP_A16, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirIn, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SD_1P8_SEL
- {GPIO_SKL_LP_GPP_A17, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SD_PWR_EN_N
- {GPIO_SKL_LP_GPP_A18, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//ISH_GP_0_SENSOR
- {GPIO_SKL_LP_GPP_A19, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//ISH_GP_1_SENSOR
- {GPIO_SKL_LP_GPP_A20, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//ISH_GP_2_SENSOR
- {GPIO_SKL_LP_GPP_A21, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//GNSS_CHUB_IRQ
- {GPIO_SKL_LP_GPP_A22, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//FPS_SLP_N
- {GPIO_SKL_LP_GPP_A23, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, GpioOutDefault, GpioIntLevel | GpioIntApic, GpioHostDeepReset, GpioTermNone}},//FPS_DRDY
- {GPIO_SKL_LP_GPP_B0, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//V0.85A_VID0
- {GPIO_SKL_LP_GPP_B1, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//V0.85A_VID1
- {GPIO_SKL_LP_GPP_B2, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//GP_VRALERTB
- {GPIO_SKL_LP_GPP_B3, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, GpioOutDefault, GpioIntLevel | GpioIntApic, GpioPlatformReset, GpioTermNone}},//TCH_PAD_INTR_R_N
- {GPIO_SKL_LP_GPP_B4, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//BT_RF_KILL_N
- {GPIO_SKL_LP_GPP_B5, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, GpioOutDefault, GpioIntLevel | GpioIntApic, GpioHostDeepReset, GpioTermNone}},//M.2_BT_UART_WAKE_N
- // {GPIO_SKL_LP_GPP_B6, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//CLK_REQ_SLOT1_N
- // {GPIO_SKL_LP_GPP_B7, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//CLK_REQ_SLOT2_LAN_N
- // {GPIO_SKL_LP_GPP_B8, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//CLK_REQ_M.2_SSD_SLOT3_N
- // {GPIO_SKL_LP_GPP_B9, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//CLK_REQ_M.2_WIGIG_N
- // {GPIO_SKL_LP_GPP_B10, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//CLK_REQ_M.2_WLAN_N
- {GPIO_SKL_LP_GPP_B11, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//MPHY_EXT_PWR_GATEB
- {GPIO_SKL_LP_GPP_B12, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//PCH_SLP_S0_N
- {GPIO_SKL_LP_GPP_B13, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//PLT_RST_N
- {GPIO_SKL_LP_GPP_B14, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}},//TCH_PNL_PWREN
- // {GPIO_SKL_LP_GPP_B15, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutLow, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//PCH_NFC_DFU, NOT OWNED BY BIOS
- {GPIO_SKL_LP_GPP_B16, {GpioPadModeGpio, GpioHostOwnAcpi, GpioDirInInv, GpioOutDefault, GpioIntLevel | GpioIntSci, GpioPlatformReset, GpioTermNone}},//M.2_WLAN_WIFI_WAKE_N
- {GPIO_SKL_LP_GPP_B17, {GpioPadModeGpio, GpioHostOwnAcpi, GpioDirInInv, GpioOutDefault, GpioIntEdge | GpioIntSci, GpioPlatformReset, GpioTermWpu20K}},//TBT_CIO_PLUG_EVENT_N
- {GPIO_SKL_LP_GPP_B18, {GpioPadModeGpio, GpioHostOwnAcpi, GpioDirInInv, GpioOutDefault, GpioIntLevel | GpioIntSci, GpioPlatformReset, GpioTermWpu20K}},//PCH_SLOT1_WAKE_N
- {GPIO_SKL_LP_GPP_B19, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//FPS_GSPI1_CS_R1_N
- {GPIO_SKL_LP_GPP_B20, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}},//FPS_GSPI1_CLK_R1
- {GPIO_SKL_LP_GPP_B21, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}},//FPS_GSPI1_MISO_R1
- {GPIO_SKL_LP_GPP_B22, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}},//FPS_GSPI1_MOSI_R1
- {GPIO_SKL_LP_GPP_B23, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}},//DISCRETE_GNSS_RESET_N
- {GPIO_SKL_LP_GPP_C0, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SMB_CLK
- {GPIO_SKL_LP_GPP_C1, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}},//SMB_DATA
- {GPIO_SKL_LP_GPP_C2, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}},//SKIN_THRM_SNSR_ALERT_N
- {GPIO_SKL_LP_GPP_C3, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SML0_CLK
- {GPIO_SKL_LP_GPP_C4, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SML0_DATA
- {GPIO_SKL_LP_GPP_C5, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirInInv, GpioOutDefault, GpioIntLevel | GpioIntApic, GpioHostDeepReset, GpioTermWpd20K}},//M.2_WIGIG_WAKE_N
- {GPIO_SKL_LP_GPP_C6, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SML1_CLK, OWNED BY ME
- {GPIO_SKL_LP_GPP_C7, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}},//SML1_DATA, OWNED BY ME
- {GPIO_SKL_LP_GPP_C8, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SERIALIO_UART0_RXD
- {GPIO_SKL_LP_GPP_C9, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SERIALIO_UART0_TXD
- {GPIO_SKL_LP_GPP_C10, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SERIALIO_UART0_RTS_N
- {GPIO_SKL_LP_GPP_C11, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SERIALIO_UART0_CTS_N
- {GPIO_SKL_LP_GPP_C12, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SERIALIO_UART1_ISH_UART1_RXD
- {GPIO_SKL_LP_GPP_C13, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SERIALIO_UART1_ISH_UART1_TXD
- {GPIO_SKL_LP_GPP_C14, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SERIALIO_UART1_ISH_UART1_RTS_N
- {GPIO_SKL_LP_GPP_C15, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SERIALIO_UART1_ISH_UART1_CTS_N
- {GPIO_SKL_LP_GPP_C16, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SERIALIO_I2C0_SDA
- {GPIO_SKL_LP_GPP_C17, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SERIALIO_I2C0_SCL
- {GPIO_SKL_LP_GPP_C18, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SERIALIO_I2C1_SDA
- {GPIO_SKL_LP_GPP_C19, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SERIALIO_I2C1_SCL
- {GPIO_SKL_LP_GPP_C20, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SERIALIO_UART2_RXD
- {GPIO_SKL_LP_GPP_C21, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SERIALIO_UART2_TXD
- {GPIO_SKL_LP_GPP_C22, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SERIALIO_UART2_RTS_N
- {GPIO_SKL_LP_GPP_C23, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SERIALIO_UART2_CTS_N
- {GPIO_SKL_LP_GPP_D0, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SPI1_TCHPNL_CS_N
- {GPIO_SKL_LP_GPP_D1, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SPI1_TCHPNL_CLK
- {GPIO_SKL_LP_GPP_D2, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SPI1_TCHPNL_MISO
- {GPIO_SKL_LP_GPP_D3, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SPI1_TCHPNL_MOSI
- {GPIO_SKL_LP_GPP_D4, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//CSI2_FLASH_STROBE
- {GPIO_SKL_LP_GPP_D5, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//ISH_I2C0_SDA
- {GPIO_SKL_LP_GPP_D6, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//ISH_I2C0_SCL
- {GPIO_SKL_LP_GPP_D7, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//ISH_I2C1_SDA
- {GPIO_SKL_LP_GPP_D8, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//ISH_I2C1_SCL/SB_BLON
- {GPIO_SKL_LP_GPP_D9, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, GpioOutDefault, GpioIntLevel | GpioIntDis, GpioHostDeepReset, GpioTermNone}},//HOME_BTN
- {GPIO_SKL_LP_GPP_D10, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, GpioOutDefault, GpioIntLevel | GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SCREEN_LOCK_PCH
- {GPIO_SKL_LP_GPP_D11, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, GpioOutDefault, GpioIntLevel | GpioIntDis, GpioHostDeepReset, GpioTermNone}},//VOL_UP_PCH
- {GPIO_SKL_LP_GPP_D12, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, GpioOutDefault, GpioIntLevel | GpioIntDis, GpioHostDeepReset, GpioTermNone}},//VOL_DOWN_PCH
- {GPIO_SKL_LP_GPP_D13, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//ISH_UART0_RXD_SML0B_DATA
- {GPIO_SKL_LP_GPP_D14, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//ISH_UART0_TXD_SML0B_CLK
- {GPIO_SKL_LP_GPP_D15, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//ISH_UART0_RTS_N
- {GPIO_SKL_LP_GPP_D16, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//ISH_UART0_CTS_SML0B_ALERT_N
- {GPIO_SKL_LP_GPP_D17, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//DMIC_CLK_1
- {GPIO_SKL_LP_GPP_D18, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}},//DMIC_DATA_1
- {GPIO_SKL_LP_GPP_D19, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//DMIC_CLK_0
- {GPIO_SKL_LP_GPP_D20, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}},//DMIC_DATA_0
- {GPIO_SKL_LP_GPP_D21, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SPI1_TCHPNL_IO2
- {GPIO_SKL_LP_GPP_D22, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SPI1_TCHPNL_IO3
- {GPIO_SKL_LP_GPP_D23, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SSP_MCLK
- {GPIO_SKL_LP_GPP_E0, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirInInv, GpioOutDefault, GpioIntEdge | GpioIntApic, GpioHostDeepReset, GpioTermNone}},//SPI_TPM_HDR_IRQ_N
- {GPIO_SKL_LP_GPP_E1, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SATA_ODD_PRSNT_N
- {GPIO_SKL_LP_GPP_E2, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntLvlEdgDis | GpioIntApic, GpioHostDeepReset, GpioTermNone}},//M.2_SSD_SATA2_PCIE3_DET_N
- {GPIO_SKL_LP_GPP_E3, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutHigh, GpioIntDis, GpioResumeReset, GpioTermNone}},//EINK_SSR_DFU_N
- {GPIO_SKL_LP_GPP_E4, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//PCH_NFC_RESET
- {GPIO_SKL_LP_GPP_E5, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SATA1_PHYSLP1_DIRECT_R
- // {GPIO_SKL_LP_GPP_E6, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutLow, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SATA2_PHYSLP2_M.2SSD_R, NOT OWNED BY BIOS
- {GPIO_SKL_LP_GPP_E8, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//PCH_SATA_LED_N
- {GPIO_SKL_LP_GPP_E9, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//USB_OC_0_WP1_OTG_N
- {GPIO_SKL_LP_GPP_E10, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//USB_OC_1_WP4_N
- {GPIO_SKL_LP_GPP_E11, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//USB_OC_2_WP2_WP3_WP5_R_N
- // {GPIO_SKL_LP_GPP_E12, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, GpioOutDefault, GpioIntLevel | GpioIntDis, GpioHostDeepReset, GpioTermNone}},//PCH_NFC_IRQ, NOT OWNED BY BIOS
- {GPIO_SKL_LP_GPP_E13, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//DDI1_HPD_Q
- {GPIO_SKL_LP_GPP_E14, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//DDI2_HPD_Q
- {GPIO_SKL_LP_GPP_E15, {GpioPadModeGpio, GpioHostOwnAcpi, GpioDirInInv, GpioOutDefault, GpioIntEdge | GpioIntSmi, GpioHostDeepReset, GpioTermNone}},//SMC_EXTSMI_R_N
- {GPIO_SKL_LP_GPP_E16, {GpioPadModeGpio, GpioHostOwnAcpi, GpioDirInInv, GpioOutDefault, GpioIntLevel | GpioIntSci, GpioPlatformReset, GpioTermNone}},//SMC_RUNTIME_SCI_R_N
- {GPIO_SKL_LP_GPP_E17, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//EDP_HPD
- {GPIO_SKL_LP_GPP_E18, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//DDI1_CTRL_CLK
- {GPIO_SKL_LP_GPP_E19, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}},//DDI1_CTRL_DATA
- {GPIO_SKL_LP_GPP_E20, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//DDI2_CTRL_CLK
- {GPIO_SKL_LP_GPP_E21, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}},//DDI2_CTRL_DATA
- {GPIO_SKL_LP_GPP_E22, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirInInv, GpioOutDefault, GpioIntLevel | GpioIntApic, GpioHostDeepReset, GpioTermNone}},//PCH_CODEC_IRQ
- {GPIO_SKL_LP_GPP_E23, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}},//TCH_PNL_RST_N
- {GPIO_SKL_LP_GPP_F0, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SSP2_SCLK
- {GPIO_SKL_LP_GPP_F1, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SSP2_SFRM
- {GPIO_SKL_LP_GPP_F2, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SSP2_TXD
- {GPIO_SKL_LP_GPP_F3, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SSP2_RXD
- {GPIO_SKL_LP_GPP_F4, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTolerance1v8 | GpioTermNone}},//SERIALIO_I2C2_SDA
- {GPIO_SKL_LP_GPP_F5, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTolerance1v8 | GpioTermNone}},//SERIALIO_I2C2_SCL
- {GPIO_SKL_LP_GPP_F6, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTolerance1v8 | GpioTermNone}},//SERIALIO_I2C3_SDA
- {GPIO_SKL_LP_GPP_F7, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTolerance1v8 | GpioTermNone}},//SERIALIO_I2C3_SCL
- {GPIO_SKL_LP_GPP_F8, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTolerance1v8 | GpioTermNone}},//SERIALIO_I2C4_SDA
- {GPIO_SKL_LP_GPP_F9, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTolerance1v8 | GpioTermNone}},//SERIALIO_I2C4_SCL
- {GPIO_SKL_LP_GPP_F10, {GpioPadModeNative2, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTolerance1v8 | GpioTermNone}},//SERIALIO_I2C5_ISH_12C2_SDA
- {GPIO_SKL_LP_GPP_F11, {GpioPadModeNative2, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTolerance1v8 | GpioTermNone}},//SERIALIO_I2C5_ISH_12C2_SCL
- {GPIO_SKL_LP_GPP_F12, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//EMMC_CMD
- {GPIO_SKL_LP_GPP_F13, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//EMMC_DATA0
- {GPIO_SKL_LP_GPP_F14, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//EMMC_DATA1
- {GPIO_SKL_LP_GPP_F15, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//EMMC_DATA2
- {GPIO_SKL_LP_GPP_F16, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//EMMC_DATA3
- {GPIO_SKL_LP_GPP_F17, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//EMMC_DATA4
- {GPIO_SKL_LP_GPP_F18, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//EMMC_DATA5
- {GPIO_SKL_LP_GPP_F19, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//EMMC_DATA6
- {GPIO_SKL_LP_GPP_F20, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//EMMC_DATA7
- {GPIO_SKL_LP_GPP_F21, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//EMMC_RCLK
- {GPIO_SKL_LP_GPP_F22, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//EMMC_CLK
- {GPIO_SKL_LP_GPP_F23, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, GpioOutDefault, GpioIntLevel | GpioIntApic, GpioHostDeepReset, GpioTermNone}},//PCH_M.2_WWAN_UIM_SIM_DET
- {GPIO_SKL_LP_GPP_G0, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SD_CMD
- {GPIO_SKL_LP_GPP_G1, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SD_DATA0
- {GPIO_SKL_LP_GPP_G2, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SD_DATA1
- {GPIO_SKL_LP_GPP_G3, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SD_DATA2
- {GPIO_SKL_LP_GPP_G4, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SD_DATA3
- {GPIO_SKL_LP_GPP_G5, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SD_CDB
- {GPIO_SKL_LP_GPP_G6, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SD_CLK
- {GPIO_SKL_LP_GPP_G7, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SD_WP
- {GPIO_SKL_LP_GPD0, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioDswReset, GpioTermNone}},//PM_BATLOW_R_N
- {GPIO_SKL_LP_GPD1, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioDswReset, GpioTermNone}},//AC_PRESENT_R
- {GPIO_SKL_LP_GPD2, {GpioPadModeNative1, GpioHostOwnAcpi, GpioDirIn, GpioOutDefault, GpioIntLevel | GpioIntSci, GpioDswReset, GpioTermNone}},//LANWAKE_SMC_WAKE_SCI_N
- {GPIO_SKL_LP_GPD3, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioDswReset, GpioTermWpu20K}},//PM_PWRBTN_R_N
- {GPIO_SKL_LP_GPD4, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioDswReset, GpioTermNone}},//SLP_S3_R_N
- {GPIO_SKL_LP_GPD5, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioDswReset, GpioTermNone}},//SLP_S4_R_N
- {GPIO_SKL_LP_GPD6, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioDswReset, GpioTermNone}},//SLP_M_R_N
- {GPIO_SKL_LP_GPD7, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioDswReset, GpioTermNone}},//USB_WAKEOUT_INTRUDET_N
- {GPIO_SKL_LP_GPD8, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioDswReset, GpioTermNone}},//SUS_CLK
- {GPIO_SKL_LP_GPD9, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioDswReset, GpioTermNone}},//PCH_SLP_WLAN_N
- {GPIO_SKL_LP_GPD10, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioDswReset, GpioTermNone}},//SLP_S5_R_N
- {GPIO_SKL_LP_GPD11, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioDswReset, GpioTermNone}},//PM_LANPHY_ENABLE
- {END_OF_GPIO_TABLE, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioDswReset, GpioTermNone}},//Marking End of Table
+ {GPIO_SKL_LP_GPP_A0, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirIn, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //RCINB_TIME_SYNC_1
+ {GPIO_SKL_LP_GPP_A1, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirInOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNative}}, //LAD_0_ESPI_IO_0
+ {GPIO_SKL_LP_GPP_A2, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirInOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //LAD_1_ESPI_IO_1
+ {GPIO_SKL_LP_GPP_A3, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirInOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNative}}, //LAD_2_ESPI_IO_2
+ {GPIO_SKL_LP_GPP_A4, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirInOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //LAD_3_ESPI_IO_3
+ {GPIO_SKL_LP_GPP_A5, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //LFRAMEB_ESPI_CSB
+ {GPIO_SKL_LP_GPP_A6, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirInOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SERIRQ
+ {GPIO_SKL_LP_GPP_A7, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //PIRQAB_GSPI0_CS1B
+ {GPIO_SKL_LP_GPP_A8, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //CLKRUNB
+ {GPIO_SKL_LP_GPP_A9, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}}, //CLKOUT_LPC_0_ESPI_CLK
+ {GPIO_SKL_LP_GPP_A10, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}}, //CLKOUT_LPC_1
+ {GPIO_SKL_LP_GPP_A11, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpu20K}}, //PMEB_GSPI1_CS1B
+ {GPIO_SKL_LP_GPP_A12, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //BM_BUSYB_ISH_GP_6
+ {GPIO_SKL_LP_GPP_A13, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SUSWARNB_SUSPWRDNACK
+ {GPIO_SKL_LP_GPP_A14, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SUS_STATB_ESPI_RESETB
+ {GPIO_SKL_LP_GPP_A15, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirIn, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpu20K}}, //SUSACKB
+ {GPIO_SKL_LP_GPP_A16, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SD_1P8_SEL
+ {GPIO_SKL_LP_GPP_A17, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SD_VDD1_PWR_EN_B_ISH_GP_7
+ {GPIO_SKL_LP_GPP_A18, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //ISH_GP_0
+ {GPIO_SKL_LP_GPP_A19, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //ISH_GP_1
+ {GPIO_SKL_LP_GPP_A20, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //ISH_GP_2
+ {GPIO_SKL_LP_GPP_A21, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioPlatformReset, GpioTermNone}}, //ISH_GP_3
+ {GPIO_SKL_LP_GPP_A22, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioResumeReset, GpioTermNone}}, //ISH_GP_4
+ {GPIO_SKL_LP_GPP_A23, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioResumeReset, GpioTermNone}}, //ISH_GP_5
+ {GPIO_SKL_LP_GPP_B0, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //CORE_VID_0
+ {GPIO_SKL_LP_GPP_B1, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //CORE_VID_1
+ {GPIO_SKL_LP_GPP_B2, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //VRALERTB
+ {GPIO_SKL_LP_GPP_B3, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //CPU_GP_2
+ {GPIO_SKL_LP_GPP_B4, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //CPU_GP_3
+ {GPIO_SKL_LP_GPP_B5, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SRCCLKREQB_0
+ {GPIO_SKL_LP_GPP_B6, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SRCCLKREQB_1
+ {GPIO_SKL_LP_GPP_B7, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SRCCLKREQB_2
+ {GPIO_SKL_LP_GPP_B8, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SRCCLKREQB_3
+ {GPIO_SKL_LP_GPP_B9, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutLow, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SRCCLKREQB_4
+ {GPIO_SKL_LP_GPP_B10, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SRCCLKREQB_5
+ {GPIO_SKL_LP_GPP_B11, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //EXT_PWR_GATEB
+ {GPIO_SKL_LP_GPP_B12, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SLP_S0B
+ {GPIO_SKL_LP_GPP_B13, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //PLTRSTB
+ {GPIO_SKL_LP_GPP_B14, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}}, //SPKR
+ {GPIO_SKL_LP_GPP_B15, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //GSPI0_CS0B
+ {GPIO_SKL_LP_GPP_B16, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //GSPI0_CLK
+ {GPIO_SKL_LP_GPP_B17, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //GSPI0_MISO
+ {GPIO_SKL_LP_GPP_B18, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpu20K}}, //GSPI0_MOSI
+ {GPIO_SKL_LP_GPP_B19, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //GSPI1_CS0B
+ {GPIO_SKL_LP_GPP_B20, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //GSPI1_CLK_NFC_CLK
+ {GPIO_SKL_LP_GPP_B21, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //GSPI1_MISO_NFC_CLKREQ
+ {GPIO_SKL_LP_GPP_B22, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}}, //GSPI1_MOSI
+ {GPIO_SKL_LP_GPP_B23, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SML1ALERTB_PCHHOTB
+ {GPIO_SKL_LP_GPP_G0, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //GPPC_G_0_SD3_CMD
+ {GPIO_SKL_LP_GPP_G1, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //GPPC_G_1_SD3_D0_SD4_RCLK_P
+ {GPIO_SKL_LP_GPP_G2, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //GPPC_G_2_SD3_D1_SD4_RCLK_N
+ {GPIO_SKL_LP_GPP_G3, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //GPPC_G_3_SD3_D2
+ {GPIO_SKL_LP_GPP_G4, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //GPPC_G_4_SD3_D3
+ {GPIO_SKL_LP_GPP_G5, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //GPPC_G_5_SD3_CDB
+ {GPIO_SKL_LP_GPP_G6, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //GPPC_G_6_SD3_CLK
+ {GPIO_SKL_LP_GPP_G7, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //GPPC_G_7_SD3_WP
+ {GPIO_SKL_LP_GPP_D0, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SPI1_CSB_BK_0
+ {GPIO_SKL_LP_GPP_D1, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SPI1_CLK_BK_1
+ {GPIO_SKL_LP_GPP_D2, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SPI1_MISO_IO_1_BK_2
+ {GPIO_SKL_LP_GPP_D3, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SPI1_MOSI_IO_0_BK_3
+ {GPIO_SKL_LP_GPP_D4, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //IMGCLKOUT_0_BK_4
+ {GPIO_SKL_LP_GPP_D5, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone, GpioOutHigh, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //ISH_I2C0_SDA
+ {GPIO_SKL_LP_GPP_D6, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //ISH_I2C0_SCL
+ {GPIO_SKL_LP_GPP_D7, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //ISH_I2C1_SDA
+ {GPIO_SKL_LP_GPP_D8, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //ISH_I2C1_SCL
+ {GPIO_SKL_LP_GPP_D9, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //ISH_SPI_CSB
+ {GPIO_SKL_LP_GPP_D10, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //ISH_SPI_CLK
+ {GPIO_SKL_LP_GPP_D11, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //ISH_SPI_MISO_GP_BSSB_CLK
+ {GPIO_SKL_LP_GPP_D12, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //ISH_SPI_MOSI_GP_BSSB_DI
+ {GPIO_SKL_LP_GPP_D13, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //ISH_UART0_RXD_SML0BDATA
+ {GPIO_SKL_LP_GPP_D14, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //ISH_UART0_TXD_SML0BCLK
+ {GPIO_SKL_LP_GPP_D15, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //ISH_UART0_RTSB_GSPI2_CS1B
+ {GPIO_SKL_LP_GPP_D16, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //ISH_UART0_CTSB_SML0BALERTB
+ {GPIO_SKL_LP_GPP_D17, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //DMIC_CLK_1_SNDW3_CLK
+ {GPIO_SKL_LP_GPP_D18, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //DMIC_DATA_1_SNDW3_DATA
+ {GPIO_SKL_LP_GPP_D19, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //DMIC_CLK_0_SNDW4_CLK
+ {GPIO_SKL_LP_GPP_D20, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //DMIC_DATA_0_SNDW4_DATA
+ {GPIO_SKL_LP_GPP_D21, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SPI1_IO_2
+ {GPIO_SKL_LP_GPP_D22, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SPI1_IO_3
+ {GPIO_SKL_LP_GPP_D23, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SSP_MCLK
+ {GPIO_SKL_LP_GPP_F0, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //CNV_GNSS_PA_BLANKING
+ {GPIO_SKL_LP_GPP_F1, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //CNV_GNSS_FTA
+ {GPIO_SKL_LP_GPP_F2, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //CNV_GNSS_SYSCK
+ {GPIO_SKL_LP_GPP_F3, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //
+ {GPIO_SKL_LP_GPP_F4, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //CNV_BRI_DT_UART0_RTSB
+ {GPIO_SKL_LP_GPP_F5, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //CNV_BRI_RSP_UART0_RXD
+ {GPIO_SKL_LP_GPP_F6, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //CNV_RGI_DT_UART0_TXD
+ {GPIO_SKL_LP_GPP_F7, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //CNV_RGI_RSP_UART0_CTSB
+ {GPIO_SKL_LP_GPP_F8, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //CNV_MFUART2_RXD
+ {GPIO_SKL_LP_GPP_F9, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone, GpioOutHigh, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //CNV_MFUART2_TXD
+ {GPIO_SKL_LP_GPP_F10, {GpioPadModeNative2, GpioHostOwnDefault, GpioDirDefault, GpioOutHigh, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //
+ {GPIO_SKL_LP_GPP_F11, {GpioPadModeNative2, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //EMMC_CMD
+ {GPIO_SKL_LP_GPP_F12, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //EMMC_DATA0
+ {GPIO_SKL_LP_GPP_F13, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //EMMC_DATA1
+ {GPIO_SKL_LP_GPP_F14, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //EMMC_DATA2
+ {GPIO_SKL_LP_GPP_F15, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //EMMC_DATA3
+ {GPIO_SKL_LP_GPP_F16, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //EMMC_DATA4
+ {GPIO_SKL_LP_GPP_F17, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //EMMC_DATA5
+ {GPIO_SKL_LP_GPP_F18, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //EMMC_DATA6
+ {GPIO_SKL_LP_GPP_F19, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //EMMC_DATA7
+ {GPIO_SKL_LP_GPP_F20, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //EMMC_RCLK
+ {GPIO_SKL_LP_GPP_F21, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //EMMC_CLK
+ {GPIO_SKL_LP_GPP_F22, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //EMMC_RESETB
+ {GPIO_SKL_LP_GPP_F23, {GpioPadModeGpio, GpioHostOwnAcpi, GpioDirIn, GpioOutDefault, GpioIntLevel | GpioIntApic, GpioHostDeepReset, GpioTermNone}}, //A4WP_PRESENT
+ {GPIO_SKL_LP_GPD0, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioResetDefault, GpioTermNone}}, //BATLOWB
+ {GPIO_SKL_LP_GPD1, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioResetDefault, GpioTermNative}}, //ACPRESENT
+ {GPIO_SKL_LP_GPD2, {GpioPadModeNative1, GpioHostOwnAcpi, GpioDirInInv, GpioOutDefault, GpioIntLevel | GpioIntSci, GpioResetDefault, GpioTermNone}}, //LAN_WAKEB
+ {GPIO_SKL_LP_GPD3, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioResetDefault, GpioTermWpu20K}}, //PWRBTNB
+ {GPIO_SKL_LP_GPD4, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone, GpioOutDefault, GpioIntDis, GpioResetDefault, GpioTermNone}}, //SLP_S3B
+ {GPIO_SKL_LP_GPD5, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone, GpioOutDefault, GpioIntDis, GpioResetDefault, GpioTermNone}}, //SLP_S4B
+ {GPIO_SKL_LP_GPD6, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone, GpioOutDefault, GpioIntDis, GpioResetDefault, GpioTermNone}}, //SLP_AB
+ {GPIO_SKL_LP_GPD7, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioResetDefault, GpioTermNone}}, //
+ {GPIO_SKL_LP_GPD8, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioResetDefault, GpioTermNone}}, //SUSCLK
+ {GPIO_SKL_LP_GPD9, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone, GpioOutDefault, GpioIntDis, GpioResetDefault, GpioTermNone}}, //SLP_WLANB
+ {GPIO_SKL_LP_GPD10, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone, GpioOutDefault, GpioIntDis, GpioResetDefault, GpioTermNone}}, //SLP_S5B
+ {GPIO_SKL_LP_GPD11, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirIn, GpioOutDefault, GpioIntDis, GpioResetDefault, GpioTermNone}}, //LANPHYPC
+ {GPIO_SKL_LP_GPP_C0, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SMBCLK
+ {GPIO_SKL_LP_GPP_C1, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SMBDATA
+ {GPIO_SKL_LP_GPP_C2, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset, GpioTermWpd20K}}, //SMBALERTB
+ {GPIO_SKL_LP_GPP_C3, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SML0CLK
+ {GPIO_SKL_LP_GPP_C4, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SML0DATA
+ {GPIO_SKL_LP_GPP_C5, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SML0ALERTB
+ {GPIO_SKL_LP_GPP_C6, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SML1CLK
+ {GPIO_SKL_LP_GPP_C7, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SML1DATA
+ {GPIO_SKL_LP_GPP_C8, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //UART0_RXD
+ {GPIO_SKL_LP_GPP_C9, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //UART0_TXD
+ {GPIO_SKL_LP_GPP_C10, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //UART0_RTSB
+ {GPIO_SKL_LP_GPP_C11, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //UART0_CTSB
+ {GPIO_SKL_LP_GPP_C12, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //UART1_RXD_ISH_UART1_RXD
+ {GPIO_SKL_LP_GPP_C13, {GpioPadModeGpio, GpioHostOwnAcpi, GpioDirInInv, GpioOutDefault, GpioIntEdge | GpioIntSci, GpioPlatformReset, GpioTermNone}}, //UART1_TXD_ISH_UART1_TXD
+ {GPIO_SKL_LP_GPP_C14, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //UART1_RTSB_ISH_UART1_RTSB
+ {GPIO_SKL_LP_GPP_C15, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone, GpioOutHigh, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //UART1_CTSB_ISH_UART1_CTSB
+ {GPIO_SKL_LP_GPP_C16, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutLow, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //I2C0_SDA
+ {GPIO_SKL_LP_GPP_C17, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //I2C0_SCL
+ {GPIO_SKL_LP_GPP_C18, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //I2C1_SDA
+ {GPIO_SKL_LP_GPP_C19, GpioPadModeGpio, GpioHostOwnAcpi, GpioDirInInv, GpioOutDefault, GpioIntLevel | GpioIntSci, GpioHostDeepReset, GpioTermNone}, //I2C1_SCL
+ {GPIO_SKL_LP_GPP_C20, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutLow, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //UART2_RXD
+ {GPIO_SKL_LP_GPP_C21, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //UART2_TXD
+ {GPIO_SKL_LP_GPP_C22, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //UART2_RTSB
+ {GPIO_SKL_LP_GPP_C23, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //UART2_CTSB
+ {GPIO_SKL_LP_GPP_E0, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, GpioOutDefault, GpioIntEdge | GpioIntApic, GpioHostDeepReset, GpioTermWpd20K}}, //SATAXPCIE_0_SATAGP_0
+ {GPIO_SKL_LP_GPP_E1, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SATAXPCIE_1_SATAGP_1
+ {GPIO_SKL_LP_GPP_E2, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, GpioOutLow, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SATAXPCIE_2_SATAGP_2
+ {GPIO_SKL_LP_GPP_E3, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirInOut, GpioOutLow, GpioIntLevel | GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //CPU_GP_0
+ {GPIO_SKL_LP_GPP_E4, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone, GpioOutDefault, GpioIntDis, GpioResumeReset, GpioTermNone}}, //SATA_DEVSLP_0
+ {GPIO_SKL_LP_GPP_E5, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone, GpioOutDefault, GpioIntDis, GpioResumeReset, GpioTermNone}}, //SATA_DEVSLP_1
+ {GPIO_SKL_LP_GPP_E6, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SATA_DEVSLP_2
+ {GPIO_SKL_LP_GPP_E7, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirIn, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //CPU_GP_1
+ {GPIO_SKL_LP_GPP_E8, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //SATA_LEDB
+ {GPIO_SKL_LP_GPP_E9, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //USB2_OCB_0_GP_BSSB_CLk
+ {GPIO_SKL_LP_GPP_E10, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //USB2_OCB_1_GP_BSSB_DI
+ {GPIO_SKL_LP_GPP_E11, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //USB2_OCB_2
+ {GPIO_SKL_LP_GPP_E12, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //USB2_OCB_3
+ {GPIO_SKL_LP_GPP_E13, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //DDSP_HPD_0_DISP_MISC_0
+ {GPIO_SKL_LP_GPP_E14, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //DDSP_HPD_1_DISP_MISC_1
+ {GPIO_SKL_LP_GPP_E15, {GpioPadModeGpio, GpioHostOwnAcpi, GpioDirInInv, GpioOutDefault, GpioIntEdge | GpioIntSmi, GpioHostDeepReset, GpioTermNone}}, //DDSP_HPD_2_DISP_MISC_2
+ {GPIO_SKL_LP_GPP_E16, {GpioPadModeGpio, GpioHostOwnAcpi, GpioDirInInv, GpioOutDefault, GpioIntLevel | GpioIntSci, GpioPlatformReset, GpioTermNone}}, //DDSP_HPD_3_DISP_MISC_3
+ {GPIO_SKL_LP_GPP_E17, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //EDP_HPD_DISP_MISC_4
+ {GPIO_SKL_LP_GPP_E18, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //DDPB_CTRLCLK
+ {GPIO_SKL_LP_GPP_E19, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //DDPB_CTRLDATA
+ {GPIO_SKL_LP_GPP_E20, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //DDPC_CTRLCLK
+ {GPIO_SKL_LP_GPP_E21, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //DDPC_CTRLDATA
+ {GPIO_SKL_LP_GPP_E22, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirInOut, GpioOutDefault, GpioIntLevel | GpioIntApic, GpioHostDeepReset, GpioTermNone}}, //DDPD_CTRLCLK
+ {GPIO_SKL_LP_GPP_E23, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirOut, GpioOutHigh, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //DDPD_CTRLDATA
+ {END_OF_GPIO_TABLE, {GpioPadModeGpio, GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioDswReset, GpioTermNone}},//Marking End of Table
};
UINT16 mGpioTableN1xxWUSize = sizeof (mGpioTableN1xxWU) / sizeof (GPIO_INIT_CONFIG) - 1;
--
2.19.1.windows.1
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