From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.136, mailfrom: nathaniel.l.desimone@intel.com) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by groups.io with SMTP; Mon, 23 Sep 2019 01:10:25 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 23 Sep 2019 01:10:25 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,539,1559545200"; d="scan'208";a="389400493" Received: from orsmsx104.amr.corp.intel.com ([10.22.225.131]) by fmsmga006.fm.intel.com with ESMTP; 23 Sep 2019 01:10:24 -0700 Received: from orsmsx159.amr.corp.intel.com (10.22.240.24) by ORSMSX104.amr.corp.intel.com (10.22.225.131) with Microsoft SMTP Server (TLS) id 14.3.439.0; Mon, 23 Sep 2019 01:10:24 -0700 Received: from orsmsx114.amr.corp.intel.com ([169.254.8.55]) by ORSMSX159.amr.corp.intel.com ([169.254.11.209]) with mapi id 14.03.0439.000; Mon, 23 Sep 2019 01:10:23 -0700 From: "Nate DeSimone" To: "Kubacki, Michael A" , "devel@edk2.groups.io" CC: "Chiu, Chasel" , "Sinha, Ankit" , Jeremy Soller Subject: Re: [edk2-platforms][PATCH V1 07/12] KabylakeOpenBoardPkg: Add PeiSerialPortLibSpiFlash Thread-Topic: [edk2-platforms][PATCH V1 07/12] KabylakeOpenBoardPkg: Add PeiSerialPortLibSpiFlash Thread-Index: AQHVb+L9v1Kt56t2rUWzIUIBy5U93ac47Lsw Date: Mon, 23 Sep 2019 08:10:23 +0000 Message-ID: <02A34F284D1DA44BB705E61F7180EF0AAEF0A699@ORSMSX114.amr.corp.intel.com> References: <20190920184030.6148-1-michael.a.kubacki@intel.com> <20190920184030.6148-8-michael.a.kubacki@intel.com> In-Reply-To: <20190920184030.6148-8-michael.a.kubacki@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiODc3MzUxNjQtMzdjZC00YWI0LWFiZTgtMTQ1MzgzZjMyNDI0IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoidmlUUndYN3ZCQmxwcjJUZkFUUGQ5OFhNWUNmeHdZYUt3dTUxRjZpa2xOQ0tmeGwzNlBvSkptVFdqMFwvYUx4aG8ifQ== x-ctpclassification: CTP_NT x-originating-ip: [10.22.254.140] MIME-Version: 1.0 Return-Path: nathaniel.l.desimone@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Nate DeSimone -----Original Message----- From: Kubacki, Michael A =20 Sent: Friday, September 20, 2019 11:40 AM To: devel@edk2.groups.io Cc: Chiu, Chasel ; Desimone, Nathaniel L ; Sinha, Ankit ; Jeremy Soller = Subject: [edk2-platforms][PATCH V1 07/12] KabylakeOpenBoardPkg: Add PeiSeri= alPortLibSpiFlash REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D2207 PeiSerialPortLibSpiFlash is currently used for early boot closed chassis de= bug on production systems such as the System 76 Galago Pro laptop. This cha= nge moves the library to KabylakeOpenBoardPkg from ClevoOpenBoardPkg since = the Clevo package is being removes for code consolidation. Cc: Chasel Chiu Cc: Nate DeSimone Cc: Ankit Sinha Cc: Jeremy Soller Signed-off-by: Michael Kubacki --- Platform/Intel/KabylakeOpenBoardPkg/OpenBoardPkg.dec = | 6 + Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSe= rialPortLibSpiFlash.inf | 50 +++ Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFlash/PeiSe= rialPortLibSpiFlash.c | 320 ++++++++++++++++++++ 3 files changed, 376 insertions(+) diff --git a/Platform/Intel/KabylakeOpenBoardPkg/OpenBoardPkg.dec b/Platfor= m/Intel/KabylakeOpenBoardPkg/OpenBoardPkg.dec index 68977d081e..383c34537d 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/OpenBoardPkg.dec +++ b/Platform/Intel/KabylakeOpenBoardPkg/OpenBoardPkg.dec @@ -29,6 +29,8 @@ gBoardModuleTokenSpaceGuid =3D {0x72d1fff7, 0= xa42a, 0x4219, {0xb9, 0x9 =20 gTianoLogoGuid =3D {0x7BB28B99, 0x61BB, 0x11D5, {0= x9A, 0x5D, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D}} =20 +gSpiFlashDebugHobGuid =3D {0xcaaaf418, 0x38a5, 0x4d49, {0= xbe, 0x74, 0xe6, 0x06, 0xe4, 0x02, 0x6d, 0x25}} + gTbtInfoHobGuid =3D {0x74a81eaa, 0x033c, 0x4783, {0= xbe, 0x2b, 0x84, 0x85, 0x74, 0xa6, 0x97, 0xb7}} =20 gPlatformModuleTokenSpaceGuid =3D {0x69d13bf0, 0xaf91, 0x4d96, {0= xaa, 0x9f, 0x21, 0x84, 0xc5, 0xce, 0x3b, 0xc0}} @@ -65,6 +67,10 @@ gBoardModuleTokenSpaceGuid.PcdSwSmiDTbtEnumerate|0xF7|UI= NT8|0x000000110 =20 gBoardModuleTokenSpaceGuid.PcdSmcExtSmiBitPosition|0x01|UINT8|0x90000015 =20 +gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageBase|0x00000000|UINT32 +|0x90000030 +gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageSize|0x00000000|UINT32 +|0x90000031 +gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageOffset|0x00000000|UINT +32|0x90000032 + [PcdsDynamic] =20 # Board GPIO Table diff --git a/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSp= iFlash/PeiSerialPortLibSpiFlash.inf b/Platform/Intel/KabylakeOpenBoardPkg/L= ibrary/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.inf new file mode 100644 index 0000000000..ed93d0785f --- /dev/null +++ b/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFla +++ sh/PeiSerialPortLibSpiFlash.inf @@ -0,0 +1,50 @@ +### @file +# Component description file for Serial I/O Port library to write to SPI f= lash. +# +# Copyright (c) 2019, Intel Corporation. All rights reserved.
# #=20 +SPDX-License-Identifier: BSD-2-Clause-Patent # ## + +[Defines] + INF_VERSION =3D 0x00010005 + BASE_NAME =3D PeiSerialPortLibFlash + FILE_GUID =3D 35A3BA89-04BE-409C-A3CA-DEF6B510F80F + VERSION_STRING =3D 1.1 + MODULE_TYPE =3D PEIM + LIBRARY_CLASS =3D SerialPortLib|PEIM PEI_CORE +# +# The following information is for reference only and not required by the = build tools. +# +# VALID_ARCHITECTURES =3D IA32 X64 IPF +# + +[LibraryClasses] + BaseLib + BaseMemoryLib + HobLib + PcdLib + PeiServicesLib + SpiLib + +[Packages] + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + MinPlatformPkg/MinPlatformPkg.dec + KabylakeSiliconPkg/SiPkg.dec + KabylakeOpenBoardPkg/OpenBoardPkg.dec + +[Sources] + PeiSerialPortLibSpiFlash.c + +[Ppis] + gPchSpiPpiGuid + +[Guids] + gSpiFlashDebugHobGuid + +[Pcd] + gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress ## CONSU= MES + gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageBase ## CONSU= MES + gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageSize ## CONSU= MES diff --git a/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSp= iFlash/PeiSerialPortLibSpiFlash.c b/Platform/Intel/KabylakeOpenBoardPkg/Lib= rary/PeiSerialPortLibSpiFlash/PeiSerialPortLibSpiFlash.c new file mode 100644 index 0000000000..0230149a38 --- /dev/null +++ b/Platform/Intel/KabylakeOpenBoardPkg/Library/PeiSerialPortLibSpiFla +++ sh/PeiSerialPortLibSpiFlash.c @@ -0,0 +1,320 @@ +/** @file + Serial I/O Port library implementation for output to SPI flash + +Copyright (c) 2019, Intel Corporation. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +typedef struct { + PCH_SPI_PPI *PchSpiPpi; + UINT32 CurrentWriteOffset; +} SPI_FLASH_DEBUG_CONTEXT; + +/** + Update reference to the most recent PCH SPI PPI installed + + @param PeiServices An indirect pointer to the EFI_PEI_SERVICES tab= le published by the PEI Foundation + @param NotifyDescriptor Address of the notification descriptor data str= ucture. + @param Ppi Address of the PPI that was installed. + + @retval EFI_SUCCESS Successfully update the PCH SPI PPI reference + @retval EFI_NOT_FOUND An error occurred locating a required interface + @retval EFI_NOT_SUPPORTED + +**/ +EFI_STATUS +EFIAPI +SpiPpiNotifyCallback ( + IN EFI_PEI_SERVICES **PeiServices, + IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor, + IN VOID *Ppi + ) +{ + EFI_STATUS Status; + EFI_HOB_GUID_TYPE *GuidHob; + PCH_SPI_PPI *PchSpiPpi; + SPI_FLASH_DEBUG_CONTEXT *Context; + + GuidHob =3D GetFirstGuidHob (&gSpiFlashDebugHobGuid); if (GuidHob =3D= =3D=20 + NULL) { + return EFI_NOT_FOUND; + } + Context =3D GET_GUID_HOB_DATA (GuidHob); + + Status =3D PeiServicesLocatePpi ( + &gPchSpiPpiGuid, + 0, + NULL, + (VOID **) &PchSpiPpi + ); + if (EFI_ERROR (Status)) { + return EFI_NOT_FOUND; + } + + Context->PchSpiPpi =3D PchSpiPpi; + + return EFI_SUCCESS; +} + +EFI_PEI_NOTIFY_DESCRIPTOR mSpiPpiNotifyList[] =3D { + { + (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMI= NATE_LIST), + &gPchSpiPpiGuid, + SpiPpiNotifyCallback + } +}; + +/** + Common function to write trace data to a chosen debug interface like + UART Serial device, USB Serial device or Trace Hub device + + @param Buffer Point of data buffer which need to be writed. + @param NumberOfBytes Number of output bytes which are cached in Buff= er. + +**/ +UINTN +EFIAPI +SerialPortWrite ( + IN UINT8 *Buffer, + IN UINTN NumberOfBytes + ) +{ + EFI_STATUS Status; + EFI_HOB_GUID_TYPE *GuidHob; + SPI_FLASH_DEBUG_CONTEXT *Context; + UINT32 BytesWritten; + UINT32 SourceBufferOffset; + UINT32 NvMessageAreaSize; + UINT32 LinearOffset; + + BytesWritten =3D NumberOfBytes; + SourceBufferOffset =3D 0; + + NvMessageAreaSize =3D (UINT32) FixedPcdGet32=20 + (PcdFlashNvDebugMessageSize); + + if (NumberOfBytes =3D=3D 0 || NvMessageAreaSize =3D=3D 0) { + return 0; + } + GuidHob =3D GetFirstGuidHob (&gSpiFlashDebugHobGuid); if (GuidHob =3D= =3D=20 + NULL) { + return 0; + } + Context =3D GET_GUID_HOB_DATA (GuidHob); if (Context =3D=3D NULL ||=20 + Context->PchSpiPpi =3D=3D NULL || Context->CurrentWriteOffset >=3D NvMess= ageAreaSize) { + return 0; + } + + if ((Context->CurrentWriteOffset + NumberOfBytes) / NvMessageAreaSize > = 0) { + LinearOffset =3D (UINT32) (FixedPcdGet32 (PcdFlashNvDebugMessageBase) = - FixedPcdGet32 (PcdFlashAreaBaseAddress)); + Status =3D Context->PchSpiPpi->FlashErase ( + Context->PchSpiPpi, + FlashRegionBios, + LinearOffset, + NvMessageAreaSize + ); + if (!EFI_ERROR (Status)) { + Context->CurrentWriteOffset =3D 0; + } else { + return 0; + } + } + + if (NumberOfBytes > NvMessageAreaSize) { + BytesWritten =3D NvMessageAreaSize; + SourceBufferOffset =3D NumberOfBytes - NvMessageAreaSize; } + + LinearOffset =3D (FixedPcdGet32 (PcdFlashNvDebugMessageBase) +=20 + Context->CurrentWriteOffset) - FixedPcdGet32=20 + (PcdFlashAreaBaseAddress); + + Status =3D Context->PchSpiPpi->FlashWrite ( + Context->PchSpiPpi, + FlashRegionBios, + LinearOffset, + BytesWritten, + (UINT8 *) &Buffer[SourceBufferOffset] + ); + if (!EFI_ERROR (Status)) { + Context->CurrentWriteOffset +=3D BytesWritten; + return BytesWritten; + } + + return 0; +} + +/** + Common function to Read data from UART serial device, USB serial device = and save the datas in buffer. + + @param Buffer Point of data buffer which need to be writed. + @param NumberOfBytes Number of output bytes which are cached in Buff= er. + + @retval 0 Read data failed, no data is to be read. + @retval >0 Actual number of bytes read from debug device. + +**/ +UINTN +EFIAPI +SerialPortRead ( + OUT UINT8 *Buffer, + IN UINTN NumberOfBytes +) +{ + return 0; +} + +/** + Polls a serial device to see if there is any data waiting to be read. + + Polls a serial device to see if there is any data waiting to be read. + If there is data waiting to be read from the serial device, then TRUE is= returned. + If there is no data waiting to be read from the serial device, then FALS= E is returned. + + @retval TRUE Data is waiting to be read from the serial devi= ce. + @retval FALSE There is no data waiting to be read from the se= rial device. + +**/ +BOOLEAN +EFIAPI +SerialPortPoll ( + VOID + ) +{ + return FALSE; +} + +/** + Sets the control bits on a serial device. + + @param Control Sets the bits of Control that are settable= . + + @retval RETURN_SUCCESS The new control bits were set on the seria= l device. + @retval RETURN_UNSUPPORTED The serial device does not support this op= eration. + @retval RETURN_DEVICE_ERROR The serial device is not functioning corre= ctly. + +**/ +RETURN_STATUS +EFIAPI +SerialPortSetControl ( + IN UINT32 Control + ) +{ + return EFI_UNSUPPORTED; +} + +/** + Retrieve the status of the control bits on a serial device. + + @param Control A pointer to return the current control si= gnals from the serial device. + + @retval RETURN_SUCCESS The control bits were read from the serial= device. + @retval RETURN_UNSUPPORTED The serial device does not support this op= eration. + @retval RETURN_DEVICE_ERROR The serial device is not functioning corre= ctly. + +**/ +RETURN_STATUS +EFIAPI +SerialPortGetControl ( + OUT UINT32 *Control + ) +{ + return EFI_UNSUPPORTED; +} + +/** + Sets the baud rate, receive FIFO depth, transmit/receice time out,=20 +parity, + data bits, and stop bits on a serial device. + + @param BaudRate The requested baud rate. A BaudRate value of 0= will use the + device's default interface speed. + On output, the value actually set. + @param ReveiveFifoDepth The requested depth of the FIFO on the receive= side of the + serial interface. A ReceiveFifoDepth value of = 0 will use + the device's default FIFO depth. + On output, the value actually set. + @param Timeout The requested time out for a single character = in microseconds. + This timeout applies to both the transmit and = receive side of the + interface. A Timeout value of 0 will use the d= evice's default time + out value. + On output, the value actually set. + @param Parity The type of parity to use on this serial devic= e. A Parity value of + DefaultParity will use the device's default pa= rity value. + On output, the value actually set. + @param DataBits The number of data bits to use on the serial d= evice. A DataBits + vaule of 0 will use the device's default data = bit setting. + On output, the value actually set. + @param StopBits The number of stop bits to use on this serial = device. A StopBits + value of DefaultStopBits will use the device's= default number of + stop bits. + On output, the value actually set. + + @retval RETURN_SUCCESS The new attributes were set on the ser= ial device. + @retval RETURN_UNSUPPORTED The serial device does not support thi= s operation. + @retval RETURN_INVALID_PARAMETER One or more of the attributes has an u= nsupported value. + @retval RETURN_DEVICE_ERROR The serial device is not functioning c= orrectly. + +**/ +RETURN_STATUS +EFIAPI +SerialPortSetAttributes ( + IN OUT UINT64 *BaudRate, + IN OUT UINT32 *ReceiveFifoDepth, + IN OUT UINT32 *Timeout, + IN OUT EFI_PARITY_TYPE *Parity, + IN OUT UINT8 *DataBits, + IN OUT EFI_STOP_BITS_TYPE *StopBits + ) +{ + return EFI_UNSUPPORTED; +} + +/** + Initialize the serial device hardware. + + If no initialization is required, then return RETURN_SUCCESS. + If the serial device was successfully initialized, then return RETURN_SU= CCESS. + If the serial device could not be initialized, then return RETURN_DEVICE= _ERROR. + + @retval RETURN_SUCCESS The serial device was initialized. + @retval RETURN_DEVICE_ERROR The serial device could not be initialized= . + +**/ +RETURN_STATUS +EFIAPI +SerialPortInitialize ( + VOID + ) +{ + EFI_STATUS Status; + SPI_FLASH_DEBUG_CONTEXT *Context; + + Context =3D (SPI_FLASH_DEBUG_CONTEXT *) BuildGuidHob=20 + (&gSpiFlashDebugHobGuid, sizeof (SPI_FLASH_DEBUG_CONTEXT)); if (Context = =3D=3D NULL) { + return EFI_DEVICE_ERROR; + } + ZeroMem ((VOID *) Context, sizeof (SPI_FLASH_DEBUG_CONTEXT)); + + Status =3D PeiServicesNotifyPpi (&mSpiPpiNotifyList[0]); if (EFI_ERROR= =20 + (Status)) { + return EFI_DEVICE_ERROR; + } + + // + // Perform silicon specific initialization required to enable write to S= PI flash. + // + Status =3D SpiServiceInit (); + if (EFI_ERROR (Status)) { + Status =3D EFI_DEVICE_ERROR; + } + + return Status; +} -- 2.16.2.windows.1