From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by mx.groups.io with SMTP id smtpd.web12.6094.1570768320857340927 for ; Thu, 10 Oct 2019 21:32:00 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.136, mailfrom: nathaniel.l.desimone@intel.com) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 10 Oct 2019 21:32:00 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.67,282,1566889200"; d="scan'208";a="206327306" Received: from orsmsx103.amr.corp.intel.com ([10.22.225.130]) by orsmga002.jf.intel.com with ESMTP; 10 Oct 2019 21:32:00 -0700 Received: from orsmsx153.amr.corp.intel.com (10.22.226.247) by ORSMSX103.amr.corp.intel.com (10.22.225.130) with Microsoft SMTP Server (TLS) id 14.3.439.0; Thu, 10 Oct 2019 21:31:59 -0700 Received: from orsmsx114.amr.corp.intel.com ([169.254.8.55]) by ORSMSX153.amr.corp.intel.com ([169.254.12.244]) with mapi id 14.03.0439.000; Thu, 10 Oct 2019 21:31:59 -0700 From: "Nate DeSimone" To: "Kubacki, Michael A" , "devel@edk2.groups.io" CC: "Chiu, Chasel" , Jeremy Soller Subject: Re: [edk2-platforms][PATCH V1 06/17] KabylakeOpenBoardPkg/GalagoPro3: DSC cleanup Thread-Topic: [edk2-platforms][PATCH V1 06/17] KabylakeOpenBoardPkg/GalagoPro3: DSC cleanup Thread-Index: AQHVfZeo1hY+Q/Ylu0ind8m0taATFKdU3m/A Date: Fri, 11 Oct 2019 04:31:59 +0000 Message-ID: <02A34F284D1DA44BB705E61F7180EF0AAEF4CE39@ORSMSX114.amr.corp.intel.com> References: <20191008051645.22052-1-michael.a.kubacki@intel.com> <20191008051645.22052-7-michael.a.kubacki@intel.com> In-Reply-To: <20191008051645.22052-7-michael.a.kubacki@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiYjUxNjBlODEtMjRlZC00NzVmLWI5YjUtNmRlNjI4MzcwMTQwIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiV2hFRmtuRXFUYVA0d254VEJ1OE5ZS0xqcTBQYUZFYVwvNDFINGJRanJRYjRXc21ScHBFc0pNZ2tGeDZwdE93OTIifQ== x-ctpclassification: CTP_NT x-originating-ip: [10.22.254.139] MIME-Version: 1.0 Return-Path: nathaniel.l.desimone@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Nate DeSimone -----Original Message----- From: Kubacki, Michael A =20 Sent: Monday, October 7, 2019 10:17 PM To: devel@edk2.groups.io Cc: Chiu, Chasel ; Desimone, Nathaniel L ; Jeremy Soller Subject: [edk2-platforms][PATCH V1 06/17] KabylakeOpenBoardPkg/GalagoPro3: = DSC cleanup REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D2242 This change refactors OpenBoardPkg.dsc and OpenBoardPkgPcd.dsc to consolidate redundant sections and better group file content to improve maintainability and readability. The same pattern made in this change for GalagoPro3 is being applied to all existing board packages in Platform/Intel to improve overall consistency. Cc: Chasel Chiu Cc: Nate DeSimone Cc: Jeremy Soller Signed-off-by: Michael Kubacki --- Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc | 478 += ++++++++++--------- Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc | 476 += +++++++++--------- 2 files changed, 506 insertions(+), 448 deletions(-) diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.ds= c b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc index 75f774d26b..5f77c8db0a 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc +++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc @@ -1,5 +1,5 @@ ## @file -# System 76 GalagoPro3 board description file. +# The main build description file for the GalagoPro3 board. # # Copyright (c) 2019, Intel Corporation. All rights reserved.
# @@ -7,11 +7,6 @@ # ## [Defines] - # - # Set platform specific package/folder name, same as passed from PREBUIL= D script. - # PLATFORM_PACKAGE would be the same as PLATFORM_NAME as well as package= build folder - # DEFINE only takes effect at R9 DSC and FDF. - # DEFINE PLATFORM_PACKAGE =3D MinPlatformPkg DEFINE PLATFORM_SI_PACKAGE =3D KabylakeSiliconPkg DEFINE PLATFORM_SI_BIN_PACKAGE =3D KabylakeSiliconBinPkg @@ -21,7 +16,7 @@ DEFINE PROJECT =3D $(PLATFORM_BOARD_PACKAGE= )/$(BOARD) =20 # - # Platform On/Off features are defined here + # Include PCD configuration for this board. # !include OpenBoardPkgPcd.dsc =20 @@ -53,8 +48,7 @@ =20 ##########################################################################= ###### # -# SKU Identification section - list of all SKU IDs supported by this -# Platform. +# SKU Identification section - list of all SKU IDs supported by this board= . # ##########################################################################= ###### [SkuIds] @@ -63,220 +57,261 @@ =20 ##########################################################################= ###### # -# Library Class section - list of all Library Classes needed by this Platf= orm. +# Includes section - other DSC file contents included for this board build= . # ##########################################################################= ###### =20 +####################################### +# Library Includes +####################################### !include $(PLATFORM_PACKAGE)/Include/Dsc/CoreCommonLib.dsc !include $(PLATFORM_PACKAGE)/Include/Dsc/CorePeiLib.dsc !include $(PLATFORM_PACKAGE)/Include/Dsc/CoreDxeLib.dsc +!include $(PLATFORM_SI_PACKAGE)/SiPkgCommonLib.dsc +!include $(PLATFORM_SI_PACKAGE)/SiPkgPeiLib.dsc +!include $(PLATFORM_SI_PACKAGE)/SiPkgDxeLib.dsc + +####################################### +# Component Includes +####################################### +[Components.IA32] +!include $(PLATFORM_PACKAGE)/Include/Dsc/CorePeiInclude.dsc +!include $(PLATFORM_SI_PACKAGE)/SiPkgPei.dsc + +[Components.X64] +!include $(PLATFORM_PACKAGE)/Include/Dsc/CoreDxeInclude.dsc +!include $(PLATFORM_SI_PACKAGE)/SiPkgDxe.dsc + +####################################### +# Build Option Includes +####################################### +!include $(PLATFORM_SI_PACKAGE)/SiPkgBuildOption.dsc +!include OpenBoardPkgBuildOption.dsc + +##########################################################################= ###### +# +# Library Class section - list of all Library Classes needed by this board= . +# +##########################################################################= ###### =20 [LibraryClasses.common] - - PeiLib|$(PLATFORM_PACKAGE)/Library/PeiLib/PeiLib.inf - ReportFvLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/PeiReportFvLib/PeiR= eportFvLib.inf - - PciHostBridgeLib|$(PLATFORM_PACKAGE)/Pci/Library/PciHostBridgeLibSimple/= PciHostBridgeLibSimple.inf - PciSegmentInfoLib|$(PLATFORM_PACKAGE)/Pci/Library/PciSegmentInfoLibSimpl= e/PciSegmentInfoLibSimple.inf - PlatformBootManagerLib|$(PLATFORM_PACKAGE)/Bds/Library/DxePlatformBootMa= nagerLib/DxePlatformBootManagerLib.inf - I2cAccessLib|$(PLATFORM_BOARD_PACKAGE)/Library/PeiI2cAccessLib/PeiI2cAcc= essLib.inf - GpioExpanderLib|$(PLATFORM_BOARD_PACKAGE)/Library/BaseGpioExpanderLib/Ba= seGpioExpanderLib.inf - - PlatformHookLib|$(PROJECT)/Library/BasePlatformHookLib/BasePlatformHookL= ib.inf - - FspWrapperHobProcessLib|$(PLATFORM_PACKAGE)/FspWrapper/Library/PeiFspWra= pperHobProcessLib/PeiFspWrapperHobProcessLib.inf - PlatformSecLib|$(PLATFORM_BOARD_PACKAGE)/FspWrapper/Library/SecFspWrappe= rPlatformSecLib/SecFspWrapperPlatformSecLib.inf - + ####################################### + # Edk2 Packages + ####################################### FspWrapperApiLib|IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/BaseFs= pWrapperApiLib.inf FspWrapperApiTestLib|IntelFsp2WrapperPkg/Library/PeiFspWrapperApiTestLib= /PeiFspWrapperApiTestLib.inf =20 - FspWrapperPlatformLib|$(PLATFORM_PACKAGE)/FspWrapper/Library/PeiFspWrapp= erPlatformLib/PeiFspWrapperPlatformLib.inf - SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconPolicyInit= LibFsp/PeiSiliconPolicyInitLibFsp.inf - SiliconPolicyUpdateLib|$(PROJECT)/FspWrapper/Library/PeiSiliconPolicyUpd= ateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf - + ####################################### + # Silicon Initialization Package + ####################################### ConfigBlockLib|$(PLATFORM_SI_PACKAGE)/Library/BaseConfigBlockLib/BaseCon= figBlockLib.inf SiliconInitLib|$(PLATFORM_SI_PACKAGE)/Library/SiliconInitLib/SiliconInit= Lib.inf + SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconPolicyInit= LibFsp/PeiSiliconPolicyInitLibFsp.inf =20 + ##################################### + # Platform Package + ##################################### BoardInitLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/BoardInitLibNull/B= oardInitLibNull.inf + FspWrapperHobProcessLib|$(PLATFORM_PACKAGE)/FspWrapper/Library/PeiFspWra= pperHobProcessLib/PeiFspWrapperHobProcessLib.inf + FspWrapperPlatformLib|$(PLATFORM_PACKAGE)/FspWrapper/Library/PeiFspWrapp= erPlatformLib/PeiFspWrapperPlatformLib.inf + PciHostBridgeLib|$(PLATFORM_PACKAGE)/Pci/Library/PciHostBridgeLibSimple/= PciHostBridgeLibSimple.inf + PciSegmentInfoLib|$(PLATFORM_PACKAGE)/Pci/Library/PciSegmentInfoLibSimpl= e/PciSegmentInfoLibSimple.inf + PeiLib|$(PLATFORM_PACKAGE)/Library/PeiLib/PeiLib.inf + PlatformBootManagerLib|$(PLATFORM_PACKAGE)/Bds/Library/DxePlatformBootMa= nagerLib/DxePlatformBootManagerLib.inf + ReportFvLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/PeiReportFvLib/PeiR= eportFvLib.inf TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLibNull= /TestPointCheckLibNull.inf =20 -# Tbt + ####################################### + # Board Package + ####################################### + GpioExpanderLib|$(PLATFORM_BOARD_PACKAGE)/Library/BaseGpioExpanderLib/Ba= seGpioExpanderLib.inf + I2cAccessLib|$(PLATFORM_BOARD_PACKAGE)/Library/PeiI2cAccessLib/PeiI2cAcc= essLib.inf + PlatformSecLib|$(PLATFORM_BOARD_PACKAGE)/FspWrapper/Library/SecFspWrappe= rPlatformSecLib/SecFspWrapperPlatformSecLib.inf + + # Thunderbolt !if gBoardModuleTokenSpaceGuid.PcdTbtEnable =3D=3D TRUE - TbtCommonLib|$(PLATFORM_BOARD_PACKAGE)/Features/Tbt/Library/PeiDxeSmmTbt= CommonLib/TbtCommonLib.inf DxeTbtPolicyLib|$(PLATFORM_BOARD_PACKAGE)/Features/Tbt/Library/DxeTbtPol= icyLib/DxeTbtPolicyLib.inf + TbtCommonLib|$(PLATFORM_BOARD_PACKAGE)/Features/Tbt/Library/PeiDxeSmmTbt= CommonLib/TbtCommonLib.inf !endif -# -# Silicon Init Package -# -!include $(PLATFORM_SI_PACKAGE)/SiPkgCommonLib.dsc + + ####################################### + # Board-specific + ####################################### + PlatformHookLib|$(PROJECT)/Library/BasePlatformHookLib/BasePlatformHookL= ib.inf + SiliconPolicyUpdateLib|$(PROJECT)/FspWrapper/Library/PeiSiliconPolicyUpd= ateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf =20 [LibraryClasses.IA32.SEC] - SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull= .inf + ####################################### + # Edk2 Packages + ####################################### DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf - TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/Sec= TestPointCheckLib.inf + SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull= .inf + + ####################################### + # Platform Package + ####################################### SecBoardInitLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/SecBoardInitLib= Null/SecBoardInitLibNull.inf + TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/Sec= TestPointCheckLib.inf =20 -[LibraryClasses.IA32] - # - # PEI phase common - # - SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull= .inf +[LibraryClasses.common.PEIM] + ####################################### + # Edk2 Packages + ####################################### DebugLib|MdeModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebug= LibReportStatusCode.inf - FspWrapperPlatformLib|$(PLATFORM_PACKAGE)/FspWrapper/Library/PeiFspWrapp= erPlatformLib/PeiFspWrapperPlatformLib.inf -!if $(TARGET) =3D=3D DEBUG - TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/Pei= TestPointCheckLib.inf -!endif - TestPointLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointLib/PeiTestPointL= ib.inf - MultiBoardInitSupportLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/MultiB= oardInitSupportLib/PeiMultiBoardInitSupportLib.inf + SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull= .inf + + ####################################### + # Platform Package + ####################################### BoardInitLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/MultiBoardInitSupp= ortLib/PeiMultiBoardInitSupportLib.inf + FspWrapperPlatformLib|$(PLATFORM_PACKAGE)/FspWrapper/Library/PeiFspWrapp= erPlatformLib/PeiFspWrapperPlatformLib.inf + MultiBoardInitSupportLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/MultiB= oardInitSupportLib/PeiMultiBoardInitSupportLib.inf + TestPointLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointLib/PeiTestPointL= ib.inf +!if $(TARGET) =3D=3D DEBUG + TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/Pei= TestPointCheckLib.inf +!endif =20 -# Tbt + ####################################### + # Board Package + ####################################### + # Thunderbolt !if gBoardModuleTokenSpaceGuid.PcdTbtEnable =3D=3D TRUE - PeiTbtPolicyLib|$(PLATFORM_BOARD_PACKAGE)/Features/Tbt/Library/PeiTbtPol= icyLib/PeiTbtPolicyLib.inf PeiDTbtInitLib|$(PLATFORM_BOARD_PACKAGE)/Features/Tbt/Library/Private/Pe= iDTbtInitLib/PeiDTbtInitLib.inf + PeiTbtPolicyLib|$(PLATFORM_BOARD_PACKAGE)/Features/Tbt/Library/PeiTbtPol= icyLib/PeiTbtPolicyLib.inf !endif -# -# Silicon Init Package -# -!include $(PLATFORM_SI_PACKAGE)/SiPkgPeiLib.dsc =20 -[LibraryClasses.X64] - # - # DXE phase common - # - FspWrapperPlatformLib|$(PLATFORM_PACKAGE)/FspWrapper/Library/DxeFspWrapp= erPlatformLib/DxeFspWrapperPlatformLib.inf -!if $(TARGET) =3D=3D DEBUG - TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/Dxe= TestPointCheckLib.inf -!endif - TestPointLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointLib/DxeTestPointL= ib.inf - MultiBoardInitSupportLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/MultiB= oardInitSupportLib/DxeMultiBoardInitSupportLib.inf +[LibraryClasses.common.DXE_DRIVER] + ####################################### + # Silicon Initialization Package + ####################################### + SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/DxeSiliconPolicyInit= Lib/DxeSiliconPolicyInitLib.inf + + ####################################### + # Platform Package + ####################################### + BoardAcpiTableLib|$(PLATFORM_PACKAGE)/Acpi/Library/MultiBoardAcpiSupport= Lib/DxeMultiBoardAcpiSupportLib.inf BoardInitLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/MultiBoardInitSupp= ortLib/DxeMultiBoardInitSupportLib.inf + FspWrapperPlatformLib|$(PLATFORM_PACKAGE)/FspWrapper/Library/DxeFspWrapp= erPlatformLib/DxeFspWrapperPlatformLib.inf MultiBoardAcpiSupportLib|$(PLATFORM_PACKAGE)/Acpi/Library/MultiBoardAcpi= SupportLib/DxeMultiBoardAcpiSupportLib.inf - BoardAcpiTableLib|$(PLATFORM_PACKAGE)/Acpi/Library/MultiBoardAcpiSupport= Lib/DxeMultiBoardAcpiSupportLib.inf + MultiBoardInitSupportLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/MultiB= oardInitSupportLib/DxeMultiBoardInitSupportLib.inf + TestPointLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointLib/DxeTestPointL= ib.inf =20 - SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/DxeSiliconPolicyInit= Lib/DxeSiliconPolicyInitLib.inf +!if $(TARGET) =3D=3D DEBUG + TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/Dxe= TestPointCheckLib.inf +!endif + + ####################################### + # Board-specific + ####################################### SiliconPolicyUpdateLib|$(PROJECT)/Policy/Library/DxeSiliconPolicyUpdateL= ib/DxeSiliconPolicyUpdateLib.inf =20 -# -# Silicon Init Package -# -!include $(PLATFORM_SI_PACKAGE)/SiPkgDxeLib.dsc +[LibraryClasses.X64.DXE_RUNTIME_DRIVER] + ####################################### + # Silicon Initialization Package + ####################################### + ResetSystemLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/DxeRuntimeResetSystemL= ib/DxeRuntimeResetSystemLib.inf =20 [LibraryClasses.X64.DXE_SMM_DRIVER] + ####################################### + # Silicon Initialization Package + ####################################### SpiFlashCommonLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/SmmSpiFlashCommonLi= b/SmmSpiFlashCommonLib.inf -!if $(TARGET) =3D=3D DEBUG - TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/Smm= TestPointCheckLib.inf -!endif - TestPointLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointLib/SmmTestPointL= ib.inf - MultiBoardAcpiSupportLib|$(PLATFORM_PACKAGE)/Acpi/Library/MultiBoardAcpi= SupportLib/SmmMultiBoardAcpiSupportLib.inf + + ####################################### + # Platform Package + ####################################### BoardAcpiEnableLib|$(PLATFORM_PACKAGE)/Acpi/Library/MultiBoardAcpiSuppor= tLib/SmmMultiBoardAcpiSupportLib.inf - -[LibraryClasses.X64.DXE_RUNTIME_DRIVER] - ResetSystemLib|$(PLATFORM_SI_PACKAGE)/Pch/Library/DxeRuntimeResetSystemL= ib/DxeRuntimeResetSystemLib.inf + MultiBoardAcpiSupportLib|$(PLATFORM_PACKAGE)/Acpi/Library/MultiBoardAcpi= SupportLib/SmmMultiBoardAcpiSupportLib.inf + TestPointLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointLib/SmmTestPointL= ib.inf +!if $(TARGET) =3D=3D DEBUG + TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/Smm= TestPointCheckLib.inf +!endif =20 [Components.IA32] - -# -# Common -# -!include $(PLATFORM_PACKAGE)/Include/Dsc/CorePeiInclude.dsc - - # - # Core - # - MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf { - - DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf - } - - # - # FSP wrapper SEC Core - # + ####################################### + # Edk2 Packages + ####################################### UefiCpuPkg/SecCore/SecCore.inf { - #PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf } =20 -# -# Silicon -# -!include $(PLATFORM_SI_PACKAGE)/SiPkgPei.dsc - -# -# Platform -# - $(PLATFORM_PACKAGE)/PlatformInit/ReportFv/ReportFvPei.inf - $(PROJECT)/Override/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformI= nitPei/PlatformInitPreMem.inf { + MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf { -!if gBoardModuleTokenSpaceGuid.PcdMultiBoardSupport =3D=3D FALSE - BoardInitLib|$(PROJECT)/Library/BoardInitLib/PeiBoardInitPreMemLib.i= nf -!else - NULL|$(PROJECT)/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf -!endif + DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf } + IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf { SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconPolicy= InitLibDependency/PeiPreMemSiliconPolicyInitLibDependency.inf } - $(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyPei/SiliconPolicyPeiPreMem= .inf{ - - # # - # Hook a library constructor to update some policy fields when policy = installed. - # - NULL|$(PROJECT)/FspWrapper/Library/PeiSiliconPolicyNotifyLib/PeiPreMem= SiliconPolicyNotifyLib.inf - } - - $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitPei/PlatformInitPostMem.inf= { - -!if gBoardModuleTokenSpaceGuid.PcdMultiBoardSupport =3D=3D FALSE - BoardInitLib|$(PROJECT)/Library/BoardInitLib/PeiBoardInitPostMemLib.= inf -!else - NULL|$(PROJECT)/Library/BoardInitLib/PeiMultiBoardInitPostMemLib.inf -!endif - } - IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf { SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconPolicy= InitLibDependency/PeiPostMemSiliconPolicyInitLibDependency.inf } - $(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyPei/SiliconPolicyPeiPostMe= m.inf - -# -# Security -# - -!if gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable =3D=3D TRUE - $(PLATFORM_PACKAGE)/Tcg/Tcg2PlatformPei/Tcg2PlatformPei.inf -!endif =20 + ####################################### + # Silicon Initialization Package + ####################################### IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.inf IntelSiliconPkg/Feature/VTd/PlatformVTdInfoSamplePei/PlatformVTdInfoSamp= lePei.inf =20 -# Tbt + ####################################### + # Platform Package + ####################################### + $(PLATFORM_PACKAGE)/PlatformInit/ReportFv/ReportFvPei.inf + $(PROJECT)/Override/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformI= nitPei/PlatformInitPreMem.inf { + + !if gBoardModuleTokenSpaceGuid.PcdMultiBoardSupport =3D=3D FALSE + BoardInitLib|$(PROJECT)/Library/BoardInitLib/PeiBoardInitPreMemLib= .inf + !else + NULL|$(PROJECT)/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.in= f + !endif + } + + $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitPei/PlatformInitPostMem.inf= { + + !if gBoardModuleTokenSpaceGuid.PcdMultiBoardSupport =3D=3D FALSE + BoardInitLib|$(PROJECT)/Library/BoardInitLib/PeiBoardInitPostMemLi= b.inf + !else + NULL|$(PROJECT)/Library/BoardInitLib/PeiMultiBoardInitPostMemLib.i= nf + !endif + } + + $(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyPei/SiliconPolicyPeiPreMem= .inf { + + # + # Hook a library constructor to update some policy fields when policy = is installed. + # + NULL|$(PROJECT)/FspWrapper/Library/PeiSiliconPolicyNotifyLib/PeiPreMem= SiliconPolicyNotifyLib.inf + } + $(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyPei/SiliconPolicyPeiPostMe= m.inf + +!if gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable =3D=3D TRUE + $(PLATFORM_PACKAGE)/Tcg/Tcg2PlatformPei/Tcg2PlatformPei.inf +!endif + + ####################################### + # Board Package + ####################################### + # Thunderbolt !if gBoardModuleTokenSpaceGuid.PcdTbtEnable =3D=3D TRUE $(PLATFORM_BOARD_PACKAGE)/Features/Tbt/TbtInit/Pei/PeiTbtInit.inf !endif =20 [Components.X64] - -# -# Common -# -!include $(PLATFORM_PACKAGE)/Include/Dsc/CoreDxeInclude.dsc - - UefiCpuPkg/CpuDxe/CpuDxe.inf + ####################################### + # Edk2 Packages + ####################################### + IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf + MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf + MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf + MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf - MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf - MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf - MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf MdeModulePkg/Universal/Console/GraphicsOutputDxe/GraphicsOutputDxe.inf - MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf + UefiCpuPkg/CpuDxe/CpuDxe.inf =20 - # - # Shell - # ShellPkg/Application/Shell/Shell.inf { gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE @@ -296,88 +331,79 @@ ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf } =20 -# -# Silicon -# -!include $(PLATFORM_SI_PACKAGE)/SiPkgDxe.dsc - -# Tbt -!if gBoardModuleTokenSpaceGuid.PcdTbtEnable =3D=3D TRUE - $(PLATFORM_BOARD_PACKAGE)/Features/Tbt/TbtInit/Smm/TbtSmm.inf - $(PLATFORM_BOARD_PACKAGE)/Features/Tbt/TbtInit/Dxe/TbtDxe.inf - $(PLATFORM_BOARD_PACKAGE)/Features/PciHotPlug/PciHotPlug.inf -!endif - -# -# Platform -# - $(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyDxe/SiliconPolicyDxe.inf - $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitDxe/PlatformInitDxe.inf - IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf - - $(PLATFORM_PACKAGE)/FspWrapper/SaveMemoryConfig/SaveMemoryConfig.inf - - $(PLATFORM_PACKAGE)/Test/TestPointStubDxe/TestPointStubDxe.inf - $(PLATFORM_PACKAGE)/Test/TestPointDumpApp/TestPointDumpApp.inf - -# -# OS Boot -# !if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE - $(PLATFORM_PACKAGE)/Acpi/AcpiTables/AcpiPlatform.inf { - -!if gBoardModuleTokenSpaceGuid.PcdMultiBoardSupport =3D=3D FALSE - BoardAcpiTableLib|$(PROJECT)/Library/BoardAcpiLib/DxeBoardAcpiTableL= ib.inf -!else - NULL|$(PROJECT)/Library/BoardAcpiLib/DxeMultiBoardAcpiSupportLib.inf -!endif - } - $(PLATFORM_BOARD_PACKAGE)/Acpi/BoardAcpiDxe/BoardAcpiDxe.inf { - -!if gBoardModuleTokenSpaceGuid.PcdMultiBoardSupport =3D=3D FALSE - BoardAcpiTableLib|$(PROJECT)/Library/BoardAcpiLib/DxeBoardAcpiTableL= ib.inf -!else - NULL|$(PROJECT)/Library/BoardAcpiLib/DxeMultiBoardAcpiSupportLib.inf -!endif - } - $(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf { - -!if gBoardModuleTokenSpaceGuid.PcdMultiBoardSupport =3D=3D FALSE - BoardAcpiEnableLib|$(PROJECT)/Library/BoardAcpiLib/SmmBoardAcpiEnabl= eLib.inf -!else - NULL|$(PROJECT)/Library/BoardAcpiLib/SmmMultiBoardAcpiSupportLib.inf -!endif - } - - $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf - $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf - UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf { gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80080046 -!if $(TARGET) =3D=3D DEBUG - DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPor= t.inf -!endif + !if $(TARGET) =3D=3D DEBUG + DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialP= ort.inf + !endif } - -!endif - -# -# Security -# - $(PLATFORM_PACKAGE)/Hsti/HstiIbvPlatformDxe/HstiIbvPlatformDxe.inf - -!if gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable =3D=3D TRUE - $(PLATFORM_PACKAGE)/Tcg/Tcg2PlatformDxe/Tcg2PlatformDxe.inf !endif =20 + ####################################### + # Silicon Initialization Package + ####################################### IntelSiliconPkg/Feature/VTd/IntelVTdDxe/IntelVTdDxe.inf - -# -# Other -# $(PLATFORM_SI_BIN_PACKAGE)/Microcode/MicrocodeUpdates.inf =20 -!include $(PLATFORM_SI_PACKAGE)/SiPkgBuildOption.dsc -!include OpenBoardPkgBuildOption.dsc + ####################################### + # Platform Package + ####################################### + $(PLATFORM_PACKAGE)/FspWrapper/SaveMemoryConfig/SaveMemoryConfig.inf + $(PLATFORM_PACKAGE)/Hsti/HstiIbvPlatformDxe/HstiIbvPlatformDxe.inf + $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitDxe/PlatformInitDxe.inf + $(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyDxe/SiliconPolicyDxe.inf + $(PLATFORM_PACKAGE)/Test/TestPointDumpApp/TestPointDumpApp.inf + $(PLATFORM_PACKAGE)/Test/TestPointStubDxe/TestPointStubDxe.inf + +!if gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable =3D=3D TRUE + $(PLATFORM_PACKAGE)/Tcg/Tcg2PlatformDxe/Tcg2PlatformDxe.inf +!endif + +!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE + + $(PLATFORM_PACKAGE)/Flash/SpiFvbService/SpiFvbServiceSmm.inf + $(PLATFORM_PACKAGE)/PlatformInit/PlatformInitSmm/PlatformInitSmm.inf + + $(PLATFORM_PACKAGE)/Acpi/AcpiSmm/AcpiSmm.inf { + + !if gBoardModuleTokenSpaceGuid.PcdMultiBoardSupport =3D=3D FALSE + BoardAcpiEnableLib|$(PROJECT)/Library/BoardAcpiLib/SmmBoardAcpiEna= bleLib.inf + !else + NULL|$(PROJECT)/Library/BoardAcpiLib/SmmMultiBoardAcpiSupportLib.i= nf + !endif + } + + $(PLATFORM_PACKAGE)/Acpi/AcpiTables/AcpiPlatform.inf { + + !if gBoardModuleTokenSpaceGuid.PcdMultiBoardSupport =3D=3D FALSE + BoardAcpiTableLib|$(PROJECT)/Library/BoardAcpiLib/DxeBoardAcpiTabl= eLib.inf + !else + NULL|$(PROJECT)/Library/BoardAcpiLib/DxeMultiBoardAcpiSupportLib.i= nf + !endif + } + +!endif + + ####################################### + # Board Package + ####################################### + # Thunderbolt +!if gBoardModuleTokenSpaceGuid.PcdTbtEnable =3D=3D TRUE + $(PLATFORM_BOARD_PACKAGE)/Features/Tbt/TbtInit/Smm/TbtSmm.inf + $(PLATFORM_BOARD_PACKAGE)/Features/Tbt/TbtInit/Dxe/TbtDxe.inf + $(PLATFORM_BOARD_PACKAGE)/Features/PciHotPlug/PciHotPlug.inf +!endif + +!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE + $(PLATFORM_BOARD_PACKAGE)/Acpi/BoardAcpiDxe/BoardAcpiDxe.inf { + + !if gBoardModuleTokenSpaceGuid.PcdMultiBoardSupport =3D=3D FALSE + BoardAcpiTableLib|$(PROJECT)/Library/BoardAcpiLib/DxeBoardAcpiTabl= eLib.inf + !else + NULL|$(PROJECT)/Library/BoardAcpiLib/DxeMultiBoardAcpiSupportLib.i= nf + !endif + } +!endif diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd= .dsc b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc index d564f0a9ee..d13761e077 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc +++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc @@ -1,5 +1,5 @@ ## @file -# System 76 GalagoPro3 board PCD configuration. +# PCD configuration build description file for the GalagoPro3 board. # # Copyright (c) 2019, Intel Corporation. All rights reserved.
# @@ -9,12 +9,16 @@ =20 ##########################################################################= ###### # -# Pcd Section - list of all EDK II PCD Entries defined by this Platform +# Pcd Section - list of all PCD Entries used by this board. # ##########################################################################= ###### -[PcdsFixedAtBuild] + +[PcdsFixedAtBuild.common] + ###################################### + # Key Boot Stage and FSP configuration + ###################################### # - # Please select BootStage here. + # Please select the Boot Stage here. # Stage 1 - enable debug (system deadloop after debug init) # Stage 2 - mem init (system deadloop after mem init) # Stage 3 - boot to shell only @@ -23,57 +27,69 @@ # gMinPlatformPkgTokenSpaceGuid.PcdBootStage|4 =20 + # + # 0: FSP Wrapper is running in Dispatch mode. + # 1: FSP Wrapper is running in API mode. + # + gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection|1 + + # + # FALSE: The board is not a FSP wrapper (FSP binary not used) + # TRUE: The board is a FSP wrapper (FSP binary is used) + # + gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode|TRUE + + # + # FSP Base address PCD will be updated in FDF basing on flash map. + # + gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0 + gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0 + + gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase|0xFEF00000 + gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize|0x00040000 + gSiPkgTokenSpaceGuid.PcdTemporaryRamBase|0xFEF80000 + gSiPkgTokenSpaceGuid.PcdTemporaryRamSize|0x00040000 + gSiPkgTokenSpaceGuid.PcdTsegSize|0x1000000 + + # + # FSP API mode does not share stack with the boot loader, + # so FSP needs more temporary memory for FSP heap + stack size. + # + gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize|0x26000 + + # + # FSP API mode does not need to enlarge the boot loader stack size + # since the stacks are separate. + # + gSiPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0x20000 + [PcdsFeatureFlag.common] - gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|FALSE - gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|FALSE - gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|FALSE - gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable|FALSE - gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable|FALSE - -!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >=3D 1 - gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|TRUE -!endif - -!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >=3D 2 - gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|FALSE - gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|TRUE -!endif - -!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >=3D 3 - gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|FALSE - gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|TRUE -!endif - -!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >=3D 4 - gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|FALSE -!endif - -!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >=3D 5 - gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable|TRUE - gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable|TRUE + ###################################### + # Edk2 Configuration + ###################################### + gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreImageLoaderSearchTeSectionFirst= |FALSE + gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseMemory|FALSE +!if $(TARGET) =3D=3D RELEASE + gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|FALSE +!else + gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|TRUE !endif - - gBoardModuleTokenSpaceGuid.PcdTbtEnable|FALSE - # - # More fine granularity control below: - # - gBoardModuleTokenSpaceGuid.PcdMultiBoardSupport|TRUE - -# -# TRUE is ENABLE. FALSE is DISABLE. -# - -# -# BIOS build switches configuration -# + gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmEnableBspElection|FALSE + gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileEnable|FALSE + gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE + + ###################################### + # Silicon Configuration + ###################################### + # Build switches gSiPkgTokenSpaceGuid.PcdOptimizeCompilerEnable|TRUE =20 -# CPU - gSiPkgTokenSpaceGuid.PcdSourceDebugEnable|FALSE - gSiPkgTokenSpaceGuid.PcdTxtEnable|TRUE #Set to FALSE for GCC Build @tod= o Convert TXT ASM to NASM + # CPU gSiPkgTokenSpaceGuid.PcdBiosGuardEnable|TRUE + gSiPkgTokenSpaceGuid.PcdSourceDebugEnable|FALSE + gSiPkgTokenSpaceGuid.PcdTxtEnable|FALSE =20 -# SA + # SA gSiPkgTokenSpaceGuid.PcdIgdEnable|TRUE gSiPkgTokenSpaceGuid.PcdPegEnable|TRUE gSiPkgTokenSpaceGuid.PcdSgEnable|TRUE @@ -84,171 +100,139 @@ gSiPkgTokenSpaceGuid.PcdVtdEnable|TRUE gSiPkgTokenSpaceGuid.PcdPeiDisplayEnable|TRUE =20 -# ME + # ME gSiPkgTokenSpaceGuid.PcdAmtEnable|TRUE gSiPkgTokenSpaceGuid.PcdAtaEnable|TRUE - gSiPkgTokenSpaceGuid.PcdPttEnable|TRUE + gSiPkgTokenSpaceGuid.PcdPttEnable|FALSE gSiPkgTokenSpaceGuid.PcdJhiEnable|TRUE =20 + # Others gSiPkgTokenSpaceGuid.PcdAcpiEnable|TRUE gSiPkgTokenSpaceGuid.PcdBdatEnable|TRUE gSiPkgTokenSpaceGuid.PcdBootGuardEnable|TRUE - gSiPkgTokenSpaceGuid.PcdIntegratedTouchEnable|TRUE gSiPkgTokenSpaceGuid.PcdCpuPowerOnConfigEnable|TRUE - gSiPkgTokenSpaceGuid.PcdSiCsmEnable|FALSE gSiPkgTokenSpaceGuid.PcdEvLoaderEnable|FALSE - gSiPkgTokenSpaceGuid.PcdTraceHubEnable|TRUE + gSiPkgTokenSpaceGuid.PcdIntegratedTouchEnable|TRUE + gSiPkgTokenSpaceGuid.PcdOcWdtEnable|TRUE gSiPkgTokenSpaceGuid.PcdOverclockEnable|TRUE gSiPkgTokenSpaceGuid.PcdPpmEnable|TRUE gSiPkgTokenSpaceGuid.PcdS3Enable|TRUE gSiPkgTokenSpaceGuid.PcdSerialGpioEnable|TRUE + gSiPkgTokenSpaceGuid.PcdSiCatalogDebugEnable|FALSE + gSiPkgTokenSpaceGuid.PcdSiCsmEnable|FALSE gSiPkgTokenSpaceGuid.PcdSmbiosEnable|TRUE gSiPkgTokenSpaceGuid.PcdSmmVariableEnable|TRUE gSiPkgTokenSpaceGuid.PcdSoftwareGuardEnable|TRUE gSiPkgTokenSpaceGuid.PcdSsaFlagEnable|FALSE - gSiPkgTokenSpaceGuid.PcdOcWdtEnable|TRUE - gSiPkgTokenSpaceGuid.PcdSiCatalogDebugEnable|FALSE + gSiPkgTokenSpaceGuid.PcdTraceHubEnable|TRUE =20 -# -# Override some PCDs for specific build requirements. -# - # - # Disable USB debug message when Source Level Debug is enabled - # because they cannot be enabled at the same time. - # + ###################################### + # Platform Configuration + ###################################### + gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|FALSE + gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|FALSE + gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|FALSE + gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable|FALSE + gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable|FALSE + gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable|FALSE =20 - gSiPkgTokenSpaceGuid.PcdPttEnable|FALSE - gSiPkgTokenSpaceGuid.PcdTxtEnable|FALSE - gSiPkgTokenSpaceGuid.PcdTxtEnable|FALSE +!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >=3D 1 + gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|TRUE +!endif =20 - !if $(TARGET) =3D=3D DEBUG - gSiPkgTokenSpaceGuid.PcdOptimizeCompilerEnable|TRUE - !else - gSiPkgTokenSpaceGuid.PcdOptimizeCompilerEnable|TRUE - !endif +!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >=3D 2 + gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|FALSE + gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|TRUE +!endif =20 - !if $(TARGET) =3D=3D DEBUG - gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable|TRUE - !else - gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable|FALSE - !endif +!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >=3D 3 + gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|FALSE + gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|TRUE +!endif =20 - gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable|FALSE +!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >=3D 4 + gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|FALSE +!endif =20 - gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmEnableBspElection|FALSE - gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreImageLoaderSearchTeSectionFirst= |FALSE -!if $(TARGET) =3D=3D RELEASE - gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|FALSE +!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >=3D 5 + gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable|TRUE + gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable|TRUE +!endif + +!if $(TARGET) =3D=3D DEBUG + gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable|TRUE !else - gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|TRUE + gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable|FALSE !endif - gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseMemory|FALSE =20 - gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileEnable|FALSE - - gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE + ###################################### + # Board Configuration + ###################################### + gBoardModuleTokenSpaceGuid.PcdMultiBoardSupport|TRUE + gBoardModuleTokenSpaceGuid.PcdTbtEnable|FALSE =20 [PcdsFixedAtBuild.common] - gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode|TRUE - -!if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable =3D=3D TRUE - gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|0x1 - gEfiMdeModulePkgTokenSpaceGuid.PcdMaxPeiPerformanceLogEntries|140 -!endif - -!if gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable =3D=3D TRUE - gEfiMdeModulePkgTokenSpaceGuid.PcdSmiHandlerProfilePropertyMask|0x1 -!endif - - gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuThreadCount|2 - gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount|8 - gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount|1 - - gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000 - gSiPkgTokenSpaceGuid.PcdSiPciExpressRegionLength|0x10000000 - gSiPkgTokenSpaceGuid.PcdTemporaryRamBase|0xFEF80000 - gSiPkgTokenSpaceGuid.PcdTemporaryRamSize|0x00040000 - gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase|0xFEF00000 - gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize|0x00040000 - - gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize | 0x00026000 - - gSiPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0x20000 - gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x5000 - gEfiMdeModulePkgTokenSpaceGuid.PcdHwErrStorageSize|0x00000800 - gEfiMdeModulePkgTokenSpaceGuid.PcdMaxHardwareErrorVariableSize|0x400 - - gEfiMdeModulePkgTokenSpaceGuid.PcdSrIovSupport|FALSE - gEfiMdeModulePkgTokenSpaceGuid.PcdAriSupport|FALSE - gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|10000 + ###################################### + # Edk2 Configuration + ###################################### !if $(TARGET) =3D=3D RELEASE gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x0 gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x3 !else gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2F - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl|FALSE gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07 !endif - gEfiMdeModulePkgTokenSpaceGuid.PcdLoadModuleAtFixAddressEnable|$(TOP_MEM= ORY_ADDRESS) - gEfiMdeModulePkgTokenSpaceGuid.PcdBrowserSubtitleTextColor|0x0 + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000 +!if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable =3D=3D TRUE + gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|0x1 +!endif + + gEfiMdeModulePkgTokenSpaceGuid.PcdAriSupport|FALSE gEfiMdeModulePkgTokenSpaceGuid.PcdBrowserFieldTextColor|0x01 - gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackSize|0x20000 - + gEfiMdeModulePkgTokenSpaceGuid.PcdBrowserSubtitleTextColor|0x0 + gEfiMdeModulePkgTokenSpaceGuid.PcdHwErrStorageSize|0x00000800 + gEfiMdeModulePkgTokenSpaceGuid.PcdLoadModuleAtFixAddressEnable|$(TOP_MEM= ORY_ADDRESS) + gEfiMdeModulePkgTokenSpaceGuid.PcdMaxHardwareErrorVariableSize|0x400 +!if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable =3D=3D TRUE + gEfiMdeModulePkgTokenSpaceGuid.PcdMaxPeiPerformanceLogEntries|140 +!endif + gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x5000 gEfiMdeModulePkgTokenSpaceGuid.PcdReclaimVariableSpaceAtEndOfDxe|TRUE +!if gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable =3D=3D TRUE + gEfiMdeModulePkgTokenSpaceGuid.PcdSmiHandlerProfilePropertyMask|0x1 +!endif + gEfiMdeModulePkgTokenSpaceGuid.PcdSrIovSupport|FALSE +!if $(TARGET) =3D=3D DEBUG + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl|FALSE +!endif =20 - # - # 8MB Default - # - gSiPkgTokenSpaceGuid.PcdTsegSize|0x800000 - - # - # 16MB TSEG in Debug build only. - # - !if $(TARGET) =3D=3D DEBUG - gSiPkgTokenSpaceGuid.PcdTsegSize|0x1000000 - !endif - + gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoBarEnableMask|0x80 + gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBarRegisterOffset|0x40 gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBusNumber|0x0 gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciDeviceNumber|0x1F - gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciFunctionNumber|0x2 gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciEnableRegisterOffset|0x44 - gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoBarEnableMask|0x80 - gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBarRegisterOffset|0x40 + gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciFunctionNumber|0x2 gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddress|0x1800 - gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiPm1TmrOffset|0x08 gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddressMask|0xFFFC + gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiPm1TmrOffset|0x08 =20 - !if $(TARGET) =3D=3D RELEASE - gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x402 - !else - gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x188B - !endif - - gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtDataMemorySize|0x4b - !if $(TARGET) =3D=3D RELEASE - gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0x70 - !else - gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0xE0 - !endif + # Specifies timeout value in microseconds for the BSP to detect all APs = for the first time. + gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|1000 + gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|10000 + gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackSize|0x20000 =20 # - # FSP Base address PCD will be updated in FDF basing on flash map. + # In non-FSP build (EDK2 build) or FSP API mode below PCD are FixedAtBui= ld + # (They will be DynamicEx in FSP Dispatch mode) # - gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0 - gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0 - ## Specifies max supported number of Logical Processors. - # @Prompt Configure max supported number of Logical Processorss + # @Prompt Configure max supported number of Logical Processors gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|12 =20 ## Specifies the size of the microcode Region. # @Prompt Microcode Region size. gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0 =20 - ## Specifies timeout value in microseconds for the BSP to detect all APs= for the first time. - # @Prompt Timeout for the BSP to detect all APs for the first time. - gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|1000 - ## Specifies the AP wait loop state during POST phase. # The value is defined as below. # 1: Place AP in the Hlt-Loop state. @@ -257,6 +241,25 @@ # @Prompt The AP wait loop state. gUefiCpuPkgTokenSpaceGuid.PcdCpuApLoopMode|2 =20 + ###################################### + # Silicon Configuration + ###################################### + + # Refer to HstiFeatureBit.h for bit definitions + gSiPkgTokenSpaceGuid.PcdHstiIhvFeature1|0xF2 + gSiPkgTokenSpaceGuid.PcdHstiIhvFeature2|0x07 + + gSiPkgTokenSpaceGuid.PcdSiPciExpressBaseAddress|gEfiMdePkgTokenSpaceGuid= .PcdPciExpressBaseAddress + gSiPkgTokenSpaceGuid.PcdSiPciExpressRegionLength|gMinPlatformPkgTokenSpa= ceGuid.PcdPciExpressRegionLength + + ###################################### + # Platform Configuration + ###################################### + gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount|1 + gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount|8 + gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuThreadCount|2 + gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000 + # # The PCDs are used to control the Windows SMM Security Mitigations Tabl= e - Protection Flags # @@ -268,11 +271,18 @@ # gMinPlatformPkgTokenSpaceGuid.PcdWsmtProtectionFlags|0x07 =20 - # - # See HstiFeatureBit.h for the definition - # - gSiPkgTokenSpaceGuid.PcdHstiIhvFeature1|0xF2 - gSiPkgTokenSpaceGuid.PcdHstiIhvFeature2|0x07 +!if $(TARGET) =3D=3D RELEASE + gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x402 +!else + gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x188B +!endif + + gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtDataMemorySize|0x4b +!if $(TARGET) =3D=3D RELEASE + gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0x70 +!else + gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0xE0 +!endif =20 !if gMinPlatformPkgTokenSpaceGuid.PcdBootStage =3D=3D 1 gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x00= , 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0= x00, 0x00} @@ -299,89 +309,111 @@ !endif =20 [PcdsFixedAtBuild.IA32] + ###################################### + # Edk2 Configuration + ###################################### gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress|0x0 gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress|0xFED00148 - gMinPlatformPkgTokenSpaceGuid.PcdPeiPhaseStackTop|0xA0000 gIntelFsp2WrapperTokenSpaceGuid.PcdPeiMinMemSize|0x3800000 =20 + ###################################### + # Platform Configuration + ###################################### + gMinPlatformPkgTokenSpaceGuid.PcdPeiPhaseStackTop|0xA0000 + [PcdsFixedAtBuild.X64] + ###################################### + # Edk2 Configuration + ###################################### + # Default platform supported RFC 4646 languages: (American) English gEfiMdePkgTokenSpaceGuid.PcdUefiVariableDefaultPlatformLangCodes|"en-US" =20 [PcdsPatchableInModule.common] + ###################################### + # Edk2 Configuration + ###################################### gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosVersion|0x0208 - gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000046 =20 + ###################################### + # Silicon Configuration + ###################################### !if $(TARGET) =3D=3D DEBUG gSiPkgTokenSpaceGuid.PcdSerialIoUartDebugEnable|1 !endif =20 -[PcdsDynamicHii.X64.DEFAULT] - gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVar= iableGuid|0x0|5 # Variable: L"Timeout" - gEfiMdePkgTokenSpaceGuid.PcdHardwareErrorRecordLevel|L"HwErrRecSupport"|= gEfiGlobalVariableGuid|0x0|1 # Variable: L"HwErrRecSupport" - -!if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable =3D=3D TRUE - gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVar= iableGuid|0x0|1 # Variable: L"Timeout" -!endif - [PcdsDynamicDefault] - # - # FSP Base address PCD will be updated in FDF basing on flash map. - # - gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0 - # Platform will pre-allocate UPD buffer and pass it to FspWrapper - # Those dummy address will be patched before FspWrapper executing - gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress|0xFFFFFFFF - gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress|0xFFFFFFFF - -[PcdsDynamicDefault.common.DEFAULT] - gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn|0x0 - gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow|0x0 + ###################################### + # Edk2 Configuration + ###################################### gEfiMdeModulePkgTokenSpaceGuid.PcdAtaSmartEnable|TRUE gEfiMdeModulePkgTokenSpaceGuid.PcdConInConnectOnDemand|FALSE + gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn|0x0 + gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow|0x0 + gEfiMdeModulePkgTokenSpaceGuid.PcdS3BootScriptTablePrivateDataPtr|0x0 + # # Set video to native resolution as Windows 8 WHCK requirement. # gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|0x0 gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|0x0 =20 - gEfiMdeModulePkgTokenSpaceGuid.PcdS3BootScriptTablePrivateDataPtr|0x0 - -[PcdsDynamicDefault.common.DEFAULT] - # gEfiTpmDeviceInstanceTpm20DtpmGuid - gEfiSecurityPkgTokenSpaceGuid.PcdTpmInstanceGuid|{0x5a, 0xf2, 0x6b, 0x28= , 0xc3, 0xc2, 0x8c, 0x40, 0xb3, 0xb4, 0x25, 0xe6, 0x75, 0x8b, 0x73, 0x17} gEfiSecurityPkgTokenSpaceGuid.PcdTcg2HashAlgorithmBitmap|0 gEfiSecurityPkgTokenSpaceGuid.PcdTpm2HashMask|0x0000001F gEfiSecurityPkgTokenSpaceGuid.PcdTpmInitializationPolicy|1 + gEfiSecurityPkgTokenSpaceGuid.PcdTpmInstanceGuid|{0x5a, 0xf2, 0x6b, 0x28= , 0xc3, 0xc2, 0x8c, 0x40, 0xb3, 0xb4, 0x25, 0xe6, 0x75, 0x8b, 0x73, 0x17} =20 - # Tbt - gBoardModuleTokenSpaceGuid.PcdDTbtControllerEn | 0x1 - gBoardModuleTokenSpaceGuid.PcdDTbtControllerType | 0x1 - gBoardModuleTokenSpaceGuid.PcdDTbtPcieRpNumber | 0x1 - gBoardModuleTokenSpaceGuid.PcdDTbtGpioAccessType | 0x2 - gBoardModuleTokenSpaceGuid.PcdExpander | 0x0 - gBoardModuleTokenSpaceGuid.PcdDTbtGpioLevel | 0x1 - gBoardModuleTokenSpaceGuid.PcdDTbtForcepowerGpioPad | 13 - gBoardModuleTokenSpaceGuid.PcdDTbtCioPlugEventGpioPad | 0x02010011 - gBoardModuleTokenSpaceGuid.PcdDTbtAcpiGpeSignature | 0 - gBoardModuleTokenSpaceGuid.PcdDTbtAcpiGpeSignaturePorting | 0 - gBoardModuleTokenSpaceGuid.PcdDTbtSecurityMode | 0x1 - #gBoardModuleTokenSpaceGuid.PcdDTbtGpio5Filter | 0x0 - gBoardModuleTokenSpaceGuid.PcdDTbtWakeupSupport | 0x0 - gBoardModuleTokenSpaceGuid.PcdDTbtHotSMI | 0x1 - gBoardModuleTokenSpaceGuid.PcdDTbtHotNotify | 0x1 - gBoardModuleTokenSpaceGuid.PcdDTbtSetClkReq| 0x1 - gBoardModuleTokenSpaceGuid.PcdDTbtAspm | 0x0 - gBoardModuleTokenSpaceGuid.PcdDTbtAcDcSwitch | 0x0 - gBoardModuleTokenSpaceGuid.PcdRtd3Tbt | 0x1 - gBoardModuleTokenSpaceGuid.PcdRtd3TbtClkReq | 0x1 - gBoardModuleTokenSpaceGuid.PcdDTbtWin10Support | 0x0 - gBoardModuleTokenSpaceGuid.PcdRtd3TbtClkReqDelay | 0x0 - gBoardModuleTokenSpaceGuid.PcdRtd3TbtOffDelay | 5000 - gBoardModuleTokenSpaceGuid.PcdDTbtPcieExtraBusRsvd | 56 - gBoardModuleTokenSpaceGuid.PcdDTbtPcieMemRsvd | 100 - gBoardModuleTokenSpaceGuid.PcdDTbtPcieMemAddrRngMax | 26 - gBoardModuleTokenSpaceGuid.PcdDTbtPciePMemRsvd | 100 - gBoardModuleTokenSpaceGuid.PcdDTbtPciePMemAddrRngMax | 28 - gBoardModuleTokenSpaceGuid.PcdPchPcieRootPortHpe| 0x00000001 + # + # FSP Base address PCD will be updated in FDF basing on flash map. + # + gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0 + # Platform will pre-allocate UPD buffer and pass it to FspWrapper + # Those dummy address will be patched before FspWrapper executing + gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress|0xFFFFFFFF + gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress|0xFFFFFFFF + + ###################################### + # Board Configuration + ###################################### + + # Thunderbolt Configuration + gBoardModuleTokenSpaceGuid.PcdDTbtAcDcSwitch|0x0 + gBoardModuleTokenSpaceGuid.PcdDTbtAcpiGpeSignature|0 + gBoardModuleTokenSpaceGuid.PcdDTbtAcpiGpeSignaturePorting|0 + gBoardModuleTokenSpaceGuid.PcdDTbtAspm|0x0 + gBoardModuleTokenSpaceGuid.PcdDTbtCioPlugEventGpioPad|0x02010011 + gBoardModuleTokenSpaceGuid.PcdDTbtControllerEn|0x1 + gBoardModuleTokenSpaceGuid.PcdDTbtControllerType|0x1 + gBoardModuleTokenSpaceGuid.PcdDTbtForcepowerGpioPad|13 + gBoardModuleTokenSpaceGuid.PcdDTbtGpioAccessType|0x2 + gBoardModuleTokenSpaceGuid.PcdDTbtGpioLevel|0x1 + gBoardModuleTokenSpaceGuid.PcdDTbtHotNotify|0x1 + gBoardModuleTokenSpaceGuid.PcdDTbtHotSMI|0x1 + gBoardModuleTokenSpaceGuid.PcdDTbtPcieExtraBusRsvd|56 + gBoardModuleTokenSpaceGuid.PcdDTbtPcieMemAddrRngMax|26 + gBoardModuleTokenSpaceGuid.PcdDTbtPcieMemRsvd|100 + gBoardModuleTokenSpaceGuid.PcdDTbtPciePMemAddrRngMax|28 + gBoardModuleTokenSpaceGuid.PcdDTbtPciePMemRsvd|100 + gBoardModuleTokenSpaceGuid.PcdDTbtPcieRpNumber|0x1 + gBoardModuleTokenSpaceGuid.PcdDTbtSecurityMode|0x1 + gBoardModuleTokenSpaceGuid.PcdDTbtSetClkReq|0x1 + gBoardModuleTokenSpaceGuid.PcdDTbtWakeupSupport|0x0 + gBoardModuleTokenSpaceGuid.PcdDTbtWin10Support|0x0 + gBoardModuleTokenSpaceGuid.PcdExpander|0x0 + gBoardModuleTokenSpaceGuid.PcdPchPcieRootPortHpe|0x00000001 + gBoardModuleTokenSpaceGuid.PcdRtd3Tbt|0x1 + gBoardModuleTokenSpaceGuid.PcdRtd3TbtClkReq|0x1 + gBoardModuleTokenSpaceGuid.PcdRtd3TbtClkReqDelay|0x0 + gBoardModuleTokenSpaceGuid.PcdRtd3TbtOffDelay|5000 + +[PcdsDynamicHii.X64.DEFAULT] + ###################################### + # Edk2 Configuration + ###################################### + gEfiMdePkgTokenSpaceGuid.PcdHardwareErrorRecordLevel|L"HwErrRecSupport"|= gEfiGlobalVariableGuid|0x0|1 # Variable: L"HwErrRecSupport" +!if gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable =3D=3D TRUE + gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVar= iableGuid|0x0|1 # Variable: L"Timeout" +!else + gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVar= iableGuid|0x0|5 # Variable: L"Timeout" +!endif --=20 2.16.2.windows.1