From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by mx.groups.io with SMTP id smtpd.web10.5993.1570768382635053767 for ; Thu, 10 Oct 2019 21:33:02 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.120, mailfrom: nathaniel.l.desimone@intel.com) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 10 Oct 2019 21:32:53 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.67,282,1566889200"; d="scan'208";a="197469021" Received: from orsmsx102.amr.corp.intel.com ([10.22.225.129]) by orsmga003.jf.intel.com with ESMTP; 10 Oct 2019 21:32:52 -0700 Received: from orsmsx124.amr.corp.intel.com (10.22.240.120) by ORSMSX102.amr.corp.intel.com (10.22.225.129) with Microsoft SMTP Server (TLS) id 14.3.439.0; Thu, 10 Oct 2019 21:32:52 -0700 Received: from orsmsx114.amr.corp.intel.com ([169.254.8.55]) by ORSMSX124.amr.corp.intel.com ([169.254.2.164]) with mapi id 14.03.0439.000; Thu, 10 Oct 2019 21:32:52 -0700 From: "Nate DeSimone" To: "devel@edk2.groups.io" , "Kubacki, Michael A" CC: "Chiu, Chasel" Subject: Re: [edk2-devel] [edk2-platforms][PATCH V1 11/17] WhiskeylakeOpenBoardPkg/WhiskeylakeURvp: Update FSP base PCDs Thread-Topic: [edk2-devel] [edk2-platforms][PATCH V1 11/17] WhiskeylakeOpenBoardPkg/WhiskeylakeURvp: Update FSP base PCDs Thread-Index: AQHVfZesml2GIoFWdE2Lk8gh62rK+adU3q8w Date: Fri, 11 Oct 2019 04:32:51 +0000 Message-ID: <02A34F284D1DA44BB705E61F7180EF0AAEF4CED1@ORSMSX114.amr.corp.intel.com> References: <20191008051645.22052-1-michael.a.kubacki@intel.com> <20191008051645.22052-12-michael.a.kubacki@intel.com> In-Reply-To: <20191008051645.22052-12-michael.a.kubacki@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiZGJiNDZlYjUtMWI1Ni00NWJjLTk1ODEtYTFhNmY5Y2E1MThhIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiQ2tHbFJ4bUtjdkRnamtvQ1wvcW5GM1wva2hHMU9zMmpneXg4andTQWV3XC9pQnpiT0ZDRjNCTXRGc3FLU1wvR3lDMCsifQ== x-ctpclassification: CTP_NT x-originating-ip: [10.22.254.139] MIME-Version: 1.0 Return-Path: nathaniel.l.desimone@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Nate DeSimone -----Original Message----- From: devel@edk2.groups.io On Behalf Of Kubacki, Mi= chael A Sent: Monday, October 7, 2019 10:17 PM To: devel@edk2.groups.io Cc: Chiu, Chasel ; Desimone, Nathaniel L Subject: [edk2-devel] [edk2-platforms][PATCH V1 11/17] WhiskeylakeOpenBoar= dPkg/WhiskeylakeURvp: Update FSP base PCDs Sets the FSP-T, FSP-M, and FSP-S base address PCDs based on the flash map. Previously these were hardcoded in the DSC file. Cc: Chasel Chiu Cc: Nate DeSimone Signed-off-by: Michael Kubacki --- Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.fdf |= 3 +++ 1 file changed, 3 insertions(+) diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBo= ardPkg.fdf b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoa= rdPkg.fdf index 611078e4b4..30ce0b9b79 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.= fdf +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.= fdf @@ -55,6 +55,9 @@ SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSiz= e =3D gSiPkgTokenSpaceG SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset =3D gSiPkgTo= kenSpaceGuid.PcdFlashMicrocodeFvOffset SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress =3D gSiPkgTo= kenSpaceGuid.PcdBiosAreaBaseAddress SET gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize =3D gSiPkgTo= kenSpaceGuid.PcdBiosSize +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress =3D $(gSiPkg= TokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.Pc= dFlashFvFspTOffset) +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress =3D $(gSiPkg= TokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.Pc= dFlashFvFspMOffset) +SET gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress =3D $(gSiPkg= TokenSpaceGuid.PcdBiosAreaBaseAddress) + $(gMinPlatformPkgTokenSpaceGuid.Pc= dFlashFvFspSOffset) SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress =3D gSiPkgTo= kenSpaceGuid.PcdBiosAreaBaseAddress SET gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize =3D gSiPkgTo= kenSpaceGuid.PcdBiosSize #########################################################################= ####### --=20 2.16.2.windows.1