From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mx.groups.io with SMTP id smtpd.web12.2985.1571295049257262732 for ; Wed, 16 Oct 2019 23:50:49 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 134.134.136.20, mailfrom: nathaniel.l.desimone@intel.com) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 16 Oct 2019 23:50:48 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.67,306,1566889200"; d="scan'208";a="186397038" Received: from orsmsx104.amr.corp.intel.com ([10.22.225.131]) by orsmga007.jf.intel.com with ESMTP; 16 Oct 2019 23:50:48 -0700 Received: from orsmsx114.amr.corp.intel.com ([169.254.8.228]) by ORSMSX104.amr.corp.intel.com ([169.254.4.167]) with mapi id 14.03.0439.000; Wed, 16 Oct 2019 23:50:47 -0700 From: "Nate DeSimone" To: "devel@edk2.groups.io" , "Agyeman, Prince" CC: "Sinha, Ankit" , "Kubacki, Michael A" Subject: Re: [edk2-devel] [edk2-platforms] [PATCH v2 4/4] Platform/Intel: Add FIT generation tool Thread-Topic: [edk2-devel] [edk2-platforms] [PATCH v2 4/4] Platform/Intel: Add FIT generation tool Thread-Index: AQHVg6sQeJGhQTMLXkWcIB1uDN7cg6deZgoQ Date: Thu, 17 Oct 2019 06:50:47 +0000 Message-ID: <02A34F284D1DA44BB705E61F7180EF0AAEF71DC3@ORSMSX114.amr.corp.intel.com> References: <20191015225109.18992-1-prince.agyeman@intel.com> <20191015225109.18992-5-prince.agyeman@intel.com> In-Reply-To: <20191015225109.18992-5-prince.agyeman@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiZWUzOGIyZWQtMTJlYy00MDQ1LWJmMDctMWMwYzY0Y2E5NDI1IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiVnQ5XC95Y0Uzd1VmYkp2bVJNcEl5TUVUSVVDSE9HYUpXRU5LQXl2SmlRRFwvTmdxeWJ6SFhsZWJvZDM4am5xbm9VIn0= x-ctpclassification: CTP_NT x-originating-ip: [10.22.254.140] MIME-Version: 1.0 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Nate DeSimone -----Original Message----- From: devel@edk2.groups.io On Behalf Of Agyeman, Pr= ince Sent: Tuesday, October 15, 2019 3:51 PM To: devel@edk2.groups.io Cc: Sinha, Ankit ; Desimone, Nathaniel L ; Kubacki, Michael A Subject: [edk2-devel] [edk2-platforms] [PATCH v2 4/4] Platform/Intel: Add = FIT generation tool Added FitGen tool build and FIT generation to the BIOS build process. What was done: - Build the FIT generation tool - Added default/empty BIOS_INFO_GUID to the build.cfg - Added BIOS_INFO_GUID to GalagoPro3,KabylakeRvp3 and WhiskeylakeURvp's bu= ild_config.cfg This allows a board to specify the GUID associated with the = BIOS Info PEIM to be used in the board's FIT generation. BIOS_INFO_GUID is passed as an argument to FitGen tool which allow the too= l to locate the BIOS Info module to be used in FIT generation. Cc: Ankit Sinha Cc: Nate DeSimone Cc: Michael Kubacki Signed-off-by: Prince Agyeman --- .../GalagoPro3/build_config.cfg | 1 + .../KabylakeRvp3/build_config.cfg | 1 + .../WhiskeylakeURvp/build_config.cfg | 1 + Platform/Intel/build.cfg | 1 + Platform/Intel/build_bios.py | 57 +++++++++++++++++++ 5 files changed, 61 insertions(+) diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/build_config.c= fg b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/build_config.cfg index 8c6c51abb4..458fe3d35d 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/build_config.cfg +++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/build_config.cfg @@ -31,3 +31,4 @@ FSP_PKG_NAME =3D KabylakeFspPkg FSP_BINARY_BUILD =3D FA= LSE FSP_TEST_RELEASE =3D FALSE SECURE_BOOT_ENABLE =3D FALSE +BIOS_INFO_GUID =3D C83BCE0E-6F16-4D3C-8D9F-4D6F5A032929 diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/build_config= .cfg b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/build_config.cfg index 78f808bfaf..f6ae4b342a 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/build_config.cfg +++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/build_config.cfg @@ -33,3 +33,4 @@ FSP_PKG_NAME =3D AmberLakeFspPkg FSP_BINARY_BUILD =3D F= ALSE FSP_TEST_RELEASE =3D FALSE SECURE_BOOT_ENABLE =3D FALSE +BIOS_INFO_GUID =3D C83BCE0E-6F16-4D3C-8D9F-4D6F5A032929 diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/build_= config.cfg b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/build_c= onfig.cfg index 1b0619bc1c..1dfe5ffd10 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/build_config.= cfg +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/build_confi +++ g.cfg @@ -31,3 +31,4 @@ FSP_PKG_NAME =3D CoffeelakeSiliconPkg FSP_BINARY_BUILD = = =3D FALSE FSP_TEST_RELEASE =3D FALSE SECURE_BOOT_ENABLE =3D FALSE +BIOS_INFO_GUID =3D A842B2D2-5C88-44E9-A9E2-4830F26662B7 diff --git a/Platform/Intel/build.cfg b/Platform/Intel/build.cfg index 204= 0774d1b..6aee96694c 100644 --- a/Platform/Intel/build.cfg +++ b/Platform/Intel/build.cfg @@ -48,6 +48,7 @@ SECURE_BOOT_ENABLE =3D FALSE REBUILD_MODE =3D BUILD_RO= M_ONLY =3D NUMBER_OF_PROCESSORS =3D 0 +BIOS_INFO_GUID =3D =20 =20 [PLATFORMS] diff --git a/Platform/Intel/build_bios.py b/Platform/Intel/build_bios.py i= ndex 46285df19a..ea098de705 100644 --- a/Platform/Intel/build_bios.py +++ b/Platform/Intel/build_bios.py @@ -196,6 +196,31 @@ def pre_build(build_config, build_type=3D"DEBUG", sil= ent=3DFalse, toolchain=3DNone): if return_code !=3D 0: build_failed(config) =20 + # + # build platform silicon tools + # + # save the current workspace + saved_work_directory =3D config["WORKSPACE"] + # change the workspace to silicon tools directory + config["WORKSPACE"] =3D os.path.join(config["WORKSPACE_SILICON"],=20 + "Tools") + + command =3D ["nmake"] + if os.name =3D=3D "posix": # linux + command =3D ["make"] + # add path to generated FitGen binary to + # environment path variable + config["PATH"] +=3D os.pathsep + \ + os.path.join(config["BASE_TOOLS_PATH"], + "Source", "C", "bin") + + # build the silicon tools + _, _, result, return_code =3D execute_script(command, config, shell= =3Dshell) + if return_code !=3D 0: + build_failed(config) + + # restore WORKSPACE environment variable + config["WORKSPACE"] =3D saved_work_directory + config["SILENT_MODE"] =3D 'TRUE' if silent else 'FALSE' =20 print("=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D") @@ -404,6 +429,35 @@ def post_build(config): :returns: nothing """ print("Running post_build to complete the build process.") + board_fd =3D config["BOARD"].upper() + final_fd =3D os.path.join(config["BUILD_DIR_PATH"], "FV", + "{}.fd".format(board_fd)) + + if config["BIOS_INFO_GUID"]: + # Generate the fit table + print("Generating FIT ...") + if os.path.isfile(final_fd): + temp_fd =3D os.path.join(config["BUILD_DIR_PATH"], "FV", + "{}_.fd".format(board_fd)) + shell =3D True + command =3D ["FitGen", "-D", + final_fd, temp_fd, "-NA", + "-I", config["BIOS_INFO_GUID"]] + + if os.name =3D=3D "posix": # linux + shell =3D False + + _, _, result, return_code =3D execute_script(command, config,= shell=3Dshell) + if return_code !=3D 0: + print("Error while generating fit") + else: + # copy output to final binary + shutil.copyfile(temp_fd, final_fd) + # remove temp file + os.remove(temp_fd) + else: + print("{} does not exist".format(final_fd)) + # remove temp file =20 # Additional build scripts for this platform result =3D post_build_ex(config) @@ -426,6 +480,9 @@ def post_build(config): except OSError: pass =20 + print("Done") + if os.path.isfile(final_fd): + print("Fd file can be found at {}".format(final_fd)) =20 def build_failed(config): """Displays results when build fails -- 2.19.1.windows.1