From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by mx.groups.io with SMTP id smtpd.web10.75.1573079968795542837 for ; Wed, 06 Nov 2019 14:39:28 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 134.134.136.100, mailfrom: nathaniel.l.desimone@intel.com) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 06 Nov 2019 14:39:17 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,275,1569308400"; d="scan'208";a="227634256" Received: from orsmsx110.amr.corp.intel.com ([10.22.240.8]) by fmsmga004.fm.intel.com with ESMTP; 06 Nov 2019 14:39:17 -0800 Received: from orsmsx114.amr.corp.intel.com (10.22.240.10) by ORSMSX110.amr.corp.intel.com (10.22.240.8) with Microsoft SMTP Server (TLS) id 14.3.439.0; Wed, 6 Nov 2019 14:39:16 -0800 Received: from orsmsx113.amr.corp.intel.com ([169.254.9.28]) by ORSMSX114.amr.corp.intel.com ([169.254.8.19]) with mapi id 14.03.0439.000; Wed, 6 Nov 2019 14:39:16 -0800 From: "Nate DeSimone" To: "Agyeman, Prince" , "devel@edk2.groups.io" CC: "Kubacki, Michael A" , "Chiu, Chasel" Subject: Re: [edk2-platforms] [Patch v2 5/9] BoardModulePkg: Added Pcds to Super I/O driver Thread-Topic: [edk2-platforms] [Patch v2 5/9] BoardModulePkg: Added Pcds to Super I/O driver Thread-Index: AQHVlEEpLvilZ57ho0StlZFY9esvuad+vTKQ Date: Wed, 6 Nov 2019 22:39:16 +0000 Message-ID: <02A34F284D1DA44BB705E61F7180EF0AB5BA4726@ORSMSX113.amr.corp.intel.com> References: <20191106012603.4724-1-prince.agyeman@intel.com> <20191106012603.4724-6-prince.agyeman@intel.com> In-Reply-To: <20191106012603.4724-6-prince.agyeman@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiODJjYzcxNjQtYzJkZC00MmQ2LWJkNjItZjg2YTYwMThkNDhkIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoid3VNY3pIRklBTk9vc3VTaHIxKzhUakdOc3pnN1hMakx2Y0NIWDdDeUFmZXErYngxNW00MFwvTUMwUU85Q2VRVTQifQ== x-ctpclassification: CTP_NT x-originating-ip: [10.22.254.139] MIME-Version: 1.0 Return-Path: nathaniel.l.desimone@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Nate DeSimone -----Original Message----- From: Agyeman, Prince =20 Sent: Tuesday, November 5, 2019 5:26 PM To: devel@edk2.groups.io Cc: Kubacki, Michael A ; Chiu, Chasel ; Desimone, Nathaniel L Subject: [edk2-platforms] [Patch v2 5/9] BoardModulePkg: Added Pcds to Supe= r I/O driver Included PCDs to the Super I/O DXE driver, to allow the enable/disable of P= s2 keyboard/mouse, UART1 and UART2 ports. Cc: Michael Kubacki Cc: Chasel Chiu Cc: Nate DeSimone Signed-off-by: Prince Agyeman --- .../LegacySioDxe/LegacySioDxe.inf | 12 ++++ .../BoardModulePkg/LegacySioDxe/SioChip.c | 68 +++++++++++++++++-- .../BoardModulePkg/LegacySioDxe/SioChip.h | 8 +++ .../BoardModulePkg/LegacySioDxe/SioDriver.c | 40 +++++++++++ 4 files changed, 122 insertions(+), 6 deletions(-) diff --git a/Platform/Intel/BoardModulePkg/LegacySioDxe/LegacySioDxe.inf b/= Platform/Intel/BoardModulePkg/LegacySioDxe/LegacySioDxe.inf index f01f63e69e..ccddc97e91 100644 --- a/Platform/Intel/BoardModulePkg/LegacySioDxe/LegacySioDxe.inf +++ b/Platform/Intel/BoardModulePkg/LegacySioDxe/LegacySioDxe.inf @@ -34,6 +34,7 @@ [Packages] MdePkg/MdePkg.dec MdeModulePkg/MdeModulePkg.dec + BoardModulePkg/BoardModulePkg.dec =20 [Sources] SioChip.c @@ -44,6 +45,17 @@ SioDriver.h ComponentName.c =20 +[Pcd] + gBoardModulePkgTokenSpaceGuid.PcdPs2KbMsEnable + gBoardModulePkgTokenSpaceGuid.PcdUart1Enable + gBoardModulePkgTokenSpaceGuid.PcdUart1IrqMask + gBoardModulePkgTokenSpaceGuid.PcdUart1IoPort + gBoardModulePkgTokenSpaceGuid.PcdUart1Length + gBoardModulePkgTokenSpaceGuid.PcdUart2Enable + gBoardModulePkgTokenSpaceGuid.PcdUart2IrqMask + gBoardModulePkgTokenSpaceGuid.PcdUart2IoPort + gBoardModulePkgTokenSpaceGuid.PcdUart2Length + gBoardModulePkgTokenSpaceGuid.PcdSuperIoPciIsaBridgeDevice [Protocols] gEfiPciIoProtocolGuid ## CONSUMES gEfiDevicePathProtocolGuid ## PRODUCES diff --git a/Platform/Intel/BoardModulePkg/LegacySioDxe/SioChip.c b/Platfor= m/Intel/BoardModulePkg/LegacySioDxe/SioChip.c index 81efe3c38b..e63977be60 100644 --- a/Platform/Intel/BoardModulePkg/LegacySioDxe/SioChip.c +++ b/Platform/Intel/BoardModulePkg/LegacySioDxe/SioChip.c @@ -19,12 +19,31 @@ ACPI_SIO_RESOURCES_IO_IRQ mCom1Resources =3D { { { ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR }, - 0x3f8, - 8 + FixedPcdGet16 (PcdUart1IoPort), + FixedPcdGet8 (PcdUart1Length) + }, + { + { ACPI_IRQ_NOFLAG_DESCRIPTOR }, + FixedPcdGet16 (PcdUart1IrqMask) + }, + { + ACPI_END_TAG_DESCRIPTOR, + 0 + } +}; + +// +// COM 2 UART Controller +// +ACPI_SIO_RESOURCES_IO_IRQ mCom2Resources =3D { + { + { ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR }, + FixedPcdGet16 (PcdUart2IoPort), + FixedPcdGet8 (PcdUart2Length) }, { { ACPI_IRQ_NOFLAG_DESCRIPTOR }, - BIT4 // IRQ4 + FixedPcdGet16 (PcdUart2IrqMask), }, { ACPI_END_TAG_DESCRIPTOR, @@ -74,6 +93,7 @@ ACPI_SIO_RESOURCES_IO_IRQ mMouseResources =3D { // Table of SIO Controllers // DEVICE_INFO mDeviceInfo[] =3D { +#if FixedPcdGet8 (PcdUart1Enable) =3D=3D DEVICE_ENABLED { { EISA_PNP_ID(0x501), @@ -84,6 +104,20 @@ DEVICE_INFO mDeviceInfo[] =3D { { (ACPI_SMALL_RESOURCE_HEADER *) &mCom1Resources }, { (ACPI_SMALL_RESOURCE_HEADER *) &mCom1Resources } }, // COM 1 UART Controller +#endif +#if FixedPcdGet8 (PcdUart2Enable) =3D=3D DEVICE_ENABLED + { + { + EISA_PNP_ID(0x501), + 0 + }, + 0, + RESOURCE_IO | RESOURCE_IRQ, + { (ACPI_SMALL_RESOURCE_HEADER *) &mCom2Resources }, + { (ACPI_SMALL_RESOURCE_HEADER *) &mCom2Resources } + }, // COM 2 UART Controller +#endif +#if FixedPcdGet8 (PcdPs2KbMsEnable) =3D=3D DEVICE_ENABLED { { EISA_PNP_ID(0x303), @@ -103,10 +137,30 @@ DEVICE_INFO mDeviceInfo[] =3D { 0, // Cannot change resource { (ACPI_SMALL_RESOURCE_HEADER *) &mMouseResources }, { (ACPI_SMALL_RESOURCE_HEADER *) &mMouseResources } - } // PS/2 Mouse Controller + }, // PS/2 Mouse Controller +#endif + DEVICE_INFO_END }; =20 =20 + +/** + Gets the number of devices in Table of SIO Controllers mDeviceInfo + + @retval Number of enabled devices in Table of SIO Controllers. +**/ +UINTN +EFIAPI +GetDeviceCount ( + VOID +){ + UINTN Count; + // Get mDeviceInfo item count + // -1 to account for for the end device info + Count =3D ARRAY_SIZE (mDeviceInfo) - 1; + return Count; +} + /** Return the supported devices. =20 @@ -128,7 +182,7 @@ DeviceGetList ( // // Allocate enough memory for simplicity // - DeviceCount =3D sizeof (mDeviceInfo) / sizeof (mDeviceInfo[0]); + DeviceCount =3D GetDeviceCount (); LocalDevices =3D AllocatePool (sizeof (EFI_SIO_ACPI_DEVICE_ID) * DeviceC= ount); ASSERT (LocalDevices !=3D NULL); if (LocalDevices =3D=3D NULL) { @@ -175,8 +229,10 @@ DeviceSearch ( ) { UINTN Index; + UINTN DeviceCount; =20 - for (Index =3D 0; Index < sizeof (mDeviceInfo) / sizeof (mDeviceInfo[0])= ; Index++) { + DeviceCount =3D GetDeviceCount (); + for (Index =3D 0; Index < DeviceCount; Index++) { if (CompareMem (Device, &mDeviceInfo[Index].Device, sizeof (*Device)) = =3D=3D 0) { return &mDeviceInfo[Index]; } diff --git a/Platform/Intel/BoardModulePkg/LegacySioDxe/SioChip.h b/Platfor= m/Intel/BoardModulePkg/LegacySioDxe/SioChip.h index 9322365923..afff6fe7b5 100644 --- a/Platform/Intel/BoardModulePkg/LegacySioDxe/SioChip.h +++ b/Platform/Intel/BoardModulePkg/LegacySioDxe/SioChip.h @@ -24,6 +24,8 @@ UINT8 #define RESOURCE_DMA BIT2 #define RESOURCE_MEM BIT3 =20 +#define DEVICE_ENABLED 0x01 +#define DEVICE_INFO_END { { 0xFFFFFFFF, 0xFFFFFFFF } } #pragma pack(1) =20 typedef struct { @@ -45,6 +47,12 @@ typedef struct { ACPI_RESOURCE_HEADER_PTR Resources; ACPI_RESOURCE_HEADER_PTR PossibleResources; } DEVICE_INFO; +typedef struct { + UINT8 Segment; + UINT8 Bus; + UINT8 Device; + UINT8 Funtion; +} SIO_PCI_ISA_BRIDGE_DEVICE_INFO; =20 /** Return the supported devices. diff --git a/Platform/Intel/BoardModulePkg/LegacySioDxe/SioDriver.c b/Platf= orm/Intel/BoardModulePkg/LegacySioDxe/SioDriver.c index 408c6ff301..5bfdc94681 100644 --- a/Platform/Intel/BoardModulePkg/LegacySioDxe/SioDriver.c +++ b/Platform/Intel/BoardModulePkg/LegacySioDxe/SioDriver.c @@ -106,6 +106,27 @@ SioDriverEntryPoint ( } =20 =20 +/** + Compares a PCI to ISA bridge device segment, bus, device and function=20 +to the + PcdSuperIoPciIsaBridgeDevice values. + + @param[in] CurrentDevice The device to be compared with the PcdSu= perIoPciIsaBridgeDevice information + @retval TRUE This device matches PcdSuperIoPciIsaBrid= geDevice values + @retval FALSE This device does not match the PcdSuperI= oPciIsaBridgeDevice values +**/ +BOOLEAN +EFIAPI +SioDeviceEnabled ( + IN SIO_PCI_ISA_BRIDGE_DEVICE_INFO *CurrentDevice ){ + SIO_PCI_ISA_BRIDGE_DEVICE_INFO *Device =3D \ + (SIO_PCI_ISA_BRIDGE_DEVICE_INFO *) FixedPcdGetPtr (PcdSuperIoPciIsaB= ridgeDevice); + if(CompareMem (Device, CurrentDevice, sizeof (SIO_PCI_ISA_BRIDGE_DEVIC= E_INFO)) =3D=3D 0) { + return TRUE; + } + return FALSE; +} + /** Test to see if this driver supports Controller Handle. =20 @@ -138,6 +159,7 @@ SioDriverSupported ( UINTN BusNumber; UINTN DeviceNumber; UINTN FunctionNumber; + SIO_PCI_ISA_BRIDGE_DEVICE_INFO SioDevice; =20 // // If RemainingDevicePath is not NULL, it should verify that the first d= evice @@ -250,6 +272,24 @@ SioDriverSupported ( Status =3D EFI_UNSUPPORTED; } } + if(!EFI_ERROR (Status)) { + Status =3D PciIo->GetLocation ( + PciIo, + &SegmentNumber, + &BusNumber, + &DeviceNumber, + &FunctionNumber + ); + if(!EFI_ERROR (Status)) { + SioDevice.Segment =3D (UINT8) SegmentNumber; + SioDevice.Bus =3D (UINT8) BusNumber; + SioDevice.Device =3D (UINT8) DeviceNumber; + SioDevice.Funtion =3D (UINT8) FunctionNumber; + if(!SioDeviceEnabled (&SioDevice)) { + Status =3D EFI_UNSUPPORTED; + } + } + } } } =20 -- 2.19.1.windows.1