From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by mx.groups.io with SMTP id smtpd.web10.839.1576114501282961901 for ; Wed, 11 Dec 2019 17:35:01 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 134.134.136.65, mailfrom: nathaniel.l.desimone@intel.com) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 11 Dec 2019 17:35:00 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,303,1571727600"; d="scan'208";a="296444295" Received: from orsmsx103.amr.corp.intel.com ([10.22.225.130]) by orsmga001.jf.intel.com with ESMTP; 11 Dec 2019 17:35:00 -0800 Received: from orsmsx113.amr.corp.intel.com (10.22.240.9) by ORSMSX103.amr.corp.intel.com (10.22.225.130) with Microsoft SMTP Server (TLS) id 14.3.439.0; Wed, 11 Dec 2019 17:35:00 -0800 Received: from orsmsx114.amr.corp.intel.com ([169.254.8.106]) by ORSMSX113.amr.corp.intel.com ([169.254.9.100]) with mapi id 14.03.0439.000; Wed, 11 Dec 2019 17:35:00 -0800 From: "Nate DeSimone" To: "Agyeman, Prince" , "devel@edk2.groups.io" CC: "Kubacki, Michael A" Subject: Re: [PATCH] SimicsOpenBoardPkg: Replace CMOS Hardcoded Addresses Thread-Topic: [PATCH] SimicsOpenBoardPkg: Replace CMOS Hardcoded Addresses Thread-Index: AQHVrFsHqiM388gqJk2ufo11RUZY1qe1v/Jg Date: Thu, 12 Dec 2019 01:34:59 +0000 Message-ID: <02A34F284D1DA44BB705E61F7180EF0AB5C44BFA@ORSMSX114.amr.corp.intel.com> References: <20191206173135.9112-1-prince.agyeman@intel.com> In-Reply-To: <20191206173135.9112-1-prince.agyeman@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiMzExOTE5NzAtYzdmNy00NzQ5LWJjZTItMzQwNTcwNjdiNjdkIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiTmtzUGNtcm9VVTJnUDhVUEliekliTnNBR2hMXC9IQ0pmWVRlZmJzU2dVVFZITU5kYkFpc0VsXC9IVzdsUmllODl4In0= x-ctpclassification: CTP_NT x-originating-ip: [10.22.254.140] MIME-Version: 1.0 Return-Path: nathaniel.l.desimone@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Nate DeSimone -----Original Message----- From: Agyeman, Prince =20 Sent: Friday, December 6, 2019 9:32 AM To: devel@edk2.groups.io Cc: Desimone, Nathaniel L ; Kubacki, Michae= l A Subject: [PATCH] SimicsOpenBoardPkg: Replace CMOS Hardcoded Addresses REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D2330 Changes: * Added CmosMap.h that defines CMOS addresses used in SimicsOpenBoardPkg as macros * Replaced hardcoded CMOS addresses with the macros defined in CmosMap.h Cc: Nate DeSimone Cc: Michael Kubacki Signed-off-by: Prince Agyeman --- .../SimicsOpenBoardPkg/Include/CmosMap.h | 35 +++++++++++++++++++ .../SimicsOpenBoardPkg/SimicsPei/MemDetect.c | 23 ++++++++---- .../SmbiosPlatformDxe/SmbiosPlatformDxe.c | 24 ++++++++----- .../SmbiosPlatformDxe/SmbiosPlatformDxe.h | 1 + 4 files changed, 68 insertions(+), 15 deletions(-) create mode 100644 Pla= tform/Intel/SimicsOpenBoardPkg/Include/CmosMap.h diff --git a/Platform/Intel/SimicsOpenBoardPkg/Include/CmosMap.h b/Platform= /Intel/SimicsOpenBoardPkg/Include/CmosMap.h new file mode 100644 index 0000000000..3221ce9a5b --- /dev/null +++ b/Platform/Intel/SimicsOpenBoardPkg/Include/CmosMap.h @@ -0,0 +1,35 @@ +/** @file +Cmos address definition macros header file. + +Copyright (c) 2019, Intel Corporation. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef _CMOS_MAP_H_ +#define _CMOS_MAP_H_ + +// +// CMOS 0x34/0x35 specifies the system memory above 16 MB. +// * CMOS(0x35) is the high byte +// * CMOS(0x34) is the low byte +// * The size is specified in 64kb chunks // * Since this is memory=20 +above 16MB, the 16MB must be added +// into the calculation to get the total memory size. +// +#define CMOS_SYSTEM_MEM_ABOVE_16MB_LOW_BYTE 0x34 +#define CMOS_SYSTEM_MEM_ABOVE_16MB_HIGH_BYTE 0x35 + +// +// CMOS 0x5b-0x5d specifies the system memory above 4GB MB. +// * CMOS(0x5d) is the most significant size byte // * CMOS(0x5c) is=20 +the middle size byte // * CMOS(0x5b) is the least significant size byte=20 +// * The size is specified in 64kb chunks // +#define CMOS_SYSTEM_MEM_ABOVE_4GB_LOW_BYTE 0x5b +#define CMOS_SYSTEM_MEM_ABOVE_4GB_MIDDLE_BYTE 0x5c +#define CMOS_SYSTEM_MEM_ABOVE_4GB_HIGH_BYTE 0x5d + + +#endif // _CMOS_MAP_H_ diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c b/Plat= form/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c index e547de0045..60aa54be9e 100644 --- a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c +++ b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c @@ -26,6 +26,8 @@ #include #include =20 +#include + #include "Platform.h" =20 UINT8 mPhysMemAddressWidth; @@ -74,24 +76,33 @@ X58TsegMbytesInitialization( return; } =20 +/** + Get the system memory size below 4GB =20 + @return The size of system memory below 4GB **/ UINT32 GetSystemMemorySizeBelow4gb ( VOID ) { + UINT32 Size; // // CMOS 0x34/0x35 specifies the system memory above 16 MB. - // * CMOS(0x35) is the high byte - // * CMOS(0x34) is the low byte // * The size is specified in 64kb chunks // * Since this is memory above 16MB, the 16MB must be added // into the calculation to get the total memory size. // - return (UINT32) (((UINTN)CmosRead16 (0x34) << 16) + SIZE_16MB); + Size =3D (UINT32) ((CmosRead16 (CMOS_SYSTEM_MEM_ABOVE_16MB_LOW_BYTE) << = 16) + + SIZE_16MB); + return Size; } =20 +/** + Get the system memory size above 4GB =20 + @return The size of system memory above 4GB **/ STATIC UINT64 GetSystemMemorySizeAbove4gb ( @@ -100,12 +111,10 @@ GetSystemMemorySizeAbove4gb ( UINT32 Size; // // CMOS 0x5b-0x5d specifies the system memory above 4GB MB. - // * CMOS(0x5d) is the most significant size byte - // * CMOS(0x5c) is the middle size byte - // * CMOS(0x5b) is the least significant size byte // * The size is specified in 64kb chunks // - Size =3D (CmosRead16 (0x5c) << 8) + CmosRead8 (0x5b); + Size =3D (CmosRead16 (CMOS_SYSTEM_MEM_ABOVE_4GB_MIDDLE_BYTE) << 8) + + CmosRead8 (CMOS_SYSTEM_MEM_ABOVE_4GB_LOW_BYTE); =20 return LShiftU64 (Size, 16); } diff --git a/Platform/Intel/SimicsOpenBoardPkg/SmbiosPlatformDxe/SmbiosPlat= formDxe.c b/Platform/Intel/SimicsOpenBoardPkg/SmbiosPlatformDxe/SmbiosPlatf= ormDxe.c index 37c659e275..23b284d2fa 100644 --- a/Platform/Intel/SimicsOpenBoardPkg/SmbiosPlatformDxe/SmbiosPlatformDxe= .c +++ b/Platform/Intel/SimicsOpenBoardPkg/SmbiosPlatformDxe/SmbiosPlatform +++ Dxe.c @@ -9,23 +9,33 @@ =20 #include "SmbiosPlatformDxe.h" =20 +/** + Get the system memory size below 4GB =20 + @return The size of system memory below 4GB **/ UINT32 GetSystemMemorySizeBelow4gb( VOID ) { + UINT32 Size; // // CMOS 0x34/0x35 specifies the system memory above 16 MB. - // * CMOS(0x35) is the high byte - // * CMOS(0x34) is the low byte // * The size is specified in 64kb chunks // * Since this is memory above 16MB, the 16MB must be added // into the calculation to get the total memory size. // - return (UINT32) (((UINTN) CmosRead16 (0x34) << 16) + SIZE_16MB); + Size =3D (UINT32) ((CmosRead16 (CMOS_SYSTEM_MEM_ABOVE_16MB_LOW_BYTE) << = 16) + + SIZE_16MB); + return Size; } =20 +/** + Get the system memory size above 4GB + + @return The size of system memory above 4GB **/ STATIC UINT64 GetSystemMemorySizeAbove4gb( @@ -35,14 +45,12 @@ GetSystemMemorySizeAbove4gb( UINT32 Size; // // CMOS 0x5b-0x5d specifies the system memory above 4GB MB. - // * CMOS(0x5d) is the most significant size byte - // * CMOS(0x5c) is the middle size byte - // * CMOS(0x5b) is the least significant size byte // * The size is specified in 64kb chunks // - Size =3D (CmosRead16 (0x5c) << 8) + CmosRead8 (0x5b); + Size =3D (CmosRead16 (CMOS_SYSTEM_MEM_ABOVE_4GB_MIDDLE_BYTE) << 8) + + CmosRead8 (CMOS_SYSTEM_MEM_ABOVE_4GB_LOW_BYTE); =20 - return LShiftU64(Size, 16); + return LShiftU64 (Size, 16); } =20 /** diff --git a/Platform/Intel/SimicsOpenBoardPkg/SmbiosPlatformDxe/SmbiosPlat= formDxe.h b/Platform/Intel/SimicsOpenBoardPkg/SmbiosPlatformDxe/SmbiosPlatf= ormDxe.h index 0dc174421c..ccd35e2924 100644 --- a/Platform/Intel/SimicsOpenBoardPkg/SmbiosPlatformDxe/SmbiosPlatformDxe= .h +++ b/Platform/Intel/SimicsOpenBoardPkg/SmbiosPlatformDxe/SmbiosPlatform +++ Dxe.h @@ -21,6 +21,7 @@ #include #include #inc= lude +#include =20 /** Validates the SMBIOS entry point structure -- 2.19.1.windows.1