From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by mx.groups.io with SMTP id smtpd.web11.669.1582788375109641786 for ; Wed, 26 Feb 2020 23:26:15 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 134.134.136.126, mailfrom: nathaniel.l.desimone@intel.com) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Feb 2020 23:26:14 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,491,1574150400"; d="scan'208";a="231728652" Received: from orsmsx103.amr.corp.intel.com ([10.22.225.130]) by orsmga008.jf.intel.com with ESMTP; 26 Feb 2020 23:26:14 -0800 Received: from orsmsx153.amr.corp.intel.com (10.22.226.247) by ORSMSX103.amr.corp.intel.com (10.22.225.130) with Microsoft SMTP Server (TLS) id 14.3.439.0; Wed, 26 Feb 2020 23:26:13 -0800 Received: from orsmsx114.amr.corp.intel.com ([169.254.8.140]) by ORSMSX153.amr.corp.intel.com ([169.254.12.187]) with mapi id 14.03.0439.000; Wed, 26 Feb 2020 23:26:14 -0800 From: "Nate DeSimone" To: "devel@edk2.groups.io" , "Agyeman, Prince" CC: "Chiu, Chasel" Subject: Re: [edk2-devel] [edk2-platforms] [PATCH v4 0/4] Add Initial Support for UP Xtreme Thread-Topic: [edk2-devel] [edk2-platforms] [PATCH v4 0/4] Add Initial Support for UP Xtreme Thread-Index: AQHV7DuwSQn9v5BWN0yNDkuxbDA0UqgupVAQ Date: Thu, 27 Feb 2020 07:26:13 +0000 Message-ID: <02A34F284D1DA44BB705E61F7180EF0AB5D9325F@ORSMSX114.amr.corp.intel.com> References: In-Reply-To: Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiODUzYmEzYTMtNDA5Ny00MmMwLTk2MGItMDIwOTNmMTY1MDkxIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoieCt2VWVpbVlTc2RTbnVuaVhJK0NMYllYSWFjREVVeW1FS0dJS1VwR0l2NjNVVU9NWnpsUEM4QXl5UXhnK3N1dSJ9 x-ctpclassification: CTP_NT x-originating-ip: [10.22.254.140] MIME-Version: 1.0 Return-Path: nathaniel.l.desimone@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable The series has been pushed as 9227724a..c6ed9b2d -----Original Message----- From: devel@edk2.groups.io On Behalf Of Agyeman, Pr= ince Sent: Tuesday, February 25, 2020 4:28 PM To: devel@edk2.groups.io Cc: Chiu, Chasel ; Desimone, Nathaniel L Subject: [edk2-devel] [edk2-platforms] [PATCH v4 0/4] Add Initial Support = for UP Xtreme REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D2191 This patch series add the initial Up Xtreme board support to the Whiskeyla= keOpenBoardPkg V4 Changes: - Removed MTRR configuration function - Rearranged FVs to improve boot time V3 Changes: - Updated copyright year - Added function to increase cache code size - Uncommmented the GPIO group tier configuration - Updated SPD table - Updated Readme.md reflect the Current Status V2 Changes: - Updated Readme.md to reflect the Current Status Current Status: 1. Basic boot to windows 10 (Home) and Ubuntu 18.04 from NVMe * UpXtreme: - Intel(R) Core(TM) i3-8145UE CPU @ 2.20GHz - Intel(R) Core(TM) i7-8565U CPU @ 1.80GHz - Intel(R) Celeron(R) CPU 4305UE 2. USB mass storage devices not detected in UEFI shell 3. Current builds on VS2015 Cc: Chasel Chiu Cc: Nate DeSimone Prince Agyeman (4): WhiskeylakeOpenBoardPkg/WhiskeylakeURvp: Remove BoardFuncInit WhiskeylakeOpenBoardPkg: Add UpXtreme board ID WhiskeylakeOpenBoardPkg/UpXtreme: Add Includes and Libraries WhiskeylakeOpenBoardPkg/UpXtreme: Add DSC and build files Platform/Intel/Readme.md | 19 +- .../Include/PlatformBoardId.h | 6 +- .../PeiFspMiscUpdUpdateLib.c | 110 + .../PeiFspPolicyUpdateLib.c | 126 + .../PeiMiscPolicyUpdate.h | 25 + .../PeiPchPolicyUpdate.c | 300 ++ .../PeiPchPolicyUpdate.h | 28 + .../PeiPchPolicyUpdatePreMem.c | 39 + .../PeiSaPolicyUpdate.c | 158 + .../PeiSaPolicyUpdate.h | 45 + .../PeiSaPolicyUpdatePreMem.c | 124 + .../PeiSiliconPolicyUpdateLibFsp.inf | 144 + .../FspWrapperPlatformSecLib.c | 186 + .../SecFspWrapperPlatformSecLib/FsptCoreUpd.h | 40 + .../SecFspWrapperPlatformSecLib/Ia32/Fsp.h | 42 + .../Ia32/PeiCoreEntry.nasm | 130 + .../Ia32/SecEntry.nasm | 361 ++ .../Ia32/Stack.nasm | 72 + .../PlatformInit.c | 47 + .../SecFspWrapperPlatformSecLib.inf | 105 + .../SecGetPerformance.c | 89 + .../SecPlatformInformation.c | 78 + .../SecRamInitData.c | 55 + .../SecTempRamDone.c | 93 + .../UpXtreme/Include/Fdf/FlashMapInclude.fdf | 50 + .../Include/Library/PeiPlatformHookLib.h | 131 + .../UpXtreme/Include/Library/PeiPlatformLib.h | 38 + .../UpXtreme/Include/PlatformBoardConfig.h | 103 + .../UpXtreme/Include/PlatformInfo.h | 42 + .../Library/BaseFuncLib/BaseFuncLib.inf | 33 + .../UpXtreme/Library/BaseFuncLib/Gop.c | 38 + .../BaseGpioCheckConflictLib.c | 137 + .../BaseGpioCheckConflictLib.inf | 35 + .../BaseGpioCheckConflictLibNull.c | 37 + .../BaseGpioCheckConflictLibNull.inf | 32 + .../BasePlatformHookLib/BasePlatformHookLib.c | 143 + .../BasePlatformHookLib.inf | 45 + .../BoardAcpiLib/SmmBoardAcpiEnableLib.c | 63 + .../BoardAcpiLib/SmmBoardAcpiEnableLib.inf | 50 + .../SmmMultiBoardAcpiSupportLib.c | 82 + .../SmmMultiBoardAcpiSupportLib.inf | 50 + .../BoardAcpiLib/SmmSiliconAcpiEnableLib.c | 170 + .../BoardAcpiLib/SmmUpXtremeAcpiEnableLib.c | 40 + .../BoardInitLib/BoardFuncInitPreMem.c | 25 + .../Library/BoardInitLib/BoardInitLib.h | 20 + .../BoardInitLib/BoardPchInitPreMemLib.c | 375 ++ .../BoardInitLib/BoardSaConfigPreMem.h | 79 + .../BoardInitLib/BoardSaInitPreMemLib.c | 298 ++ .../Library/BoardInitLib/GpioTableDefault.c | 213 ++ .../Library/BoardInitLib/GpioTableUpXtreme.c | 217 ++ .../Library/BoardInitLib/PchHdaVerbTables.h | 3014 +++++++++++++++++ .../BoardInitLib/PeiBoardInitPostMemLib.c | 40 + .../BoardInitLib/PeiBoardInitPostMemLib.inf | 57 + .../BoardInitLib/PeiBoardInitPreMemLib.c | 106 + .../BoardInitLib/PeiBoardInitPreMemLib.inf | 124 + .../PeiMultiBoardInitPostMemLib.c | 41 + .../PeiMultiBoardInitPostMemLib.inf | 202 ++ .../BoardInitLib/PeiMultiBoardInitPreMemLib.c | 83 + .../PeiMultiBoardInitPreMemLib.inf | 308 ++ .../Library/BoardInitLib/PeiUpXtremeDetect.c | 192 ++ .../BoardInitLib= /PeiUpXtremeInitPostMemLib.c | 416 +++ .../BoardInitLib/PeiUpXtremeInitPreMemLib.c | 625 ++++ .../BoardInitLib/UpXtremeHsioPtssTables.c | 32 + .../Library/BoardInitLib/UpXtremeInit.h | 44 + .../Library/BoardInitLib/UpXtremeSpdTable.c | 86 + .../DxePolicyBoardConfig.h | 19 + .../DxePolicyBoardConfigLib.inf | 45 + .../DxeSaPolicyBoardConfig.c | 36 + .../PeiPlatformHookLib/PeiPlatformHookLib.c | 298 ++ .../PeiPlatformHookLib/PeiPlatformHookLib.inf | 95 + .../PeiCpuPolicyBoardConfig.c | 49 + .../PeiCpuPolicyBoardConfigPreMem.c | 29 + .../PeiMePolicyBoardConfig.c | 36 + .../PeiMePolicyBoardConfigPreMem.c | 37 + .../PeiPchPolicyBoardConfig.c | 36 + .../PeiPchPolicyBoardConfigPreMem.c | 37 + .../PeiPolicyBoardConfig.h | 22 + .../PeiPolicyBoardConfigLib.inf | 71 + .../PeiSaPolicyBoardConfig.c | 36 + .../PeiSaPolicyBoardConfigPreMem.c | 30 + .../PeiSiPolicyBoardConfig.c | 27 + .../UpXtreme/OpenBoardPkg.dsc | 448 +++ .../UpXtreme/OpenBoardPkg.fdf | 708 ++++ .../UpXtreme/OpenBoardPkgBuildOption.dsc | 156 + .../UpXtreme/OpenBoardPkgPcd.dsc | 409 +++ .../UpXtreme/build_config.cfg | 35 + .../Library/BoardInitLib/BoardFunc.c | 19 - .../Library/BoardInitLib/BoardFunc.h | 20 - .../Library/BoardInitLib/BoardFuncInit.c | 26 - .../BoardInitLib/BoardFuncInitPreMem.c | 29 +- .../BoardInitLib/BoardPchInitPreMemLib.c | 3 +- .../PeiMultiBoardInitPostMemLib.inf | 4 - .../PeiWhiskeylakeURvpInitPostMemLib.c | 8 - .../PeiWhiskeylakeURvpInitPreMemLib.c | 10 +- Platform/Intel/build.cfg | 3 +- 95 files changed, 13004 insertions(+), 115 deletions(-) create mode 1006= 44 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWrapper/Library/PeiSi= liconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWra= pper/Library/PeiSiliconPolicyUpdateLibFsp/PeiFspPolicyUpdateLib.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWra= pper/Library/PeiSiliconPolicyUpdateLibFsp/PeiMiscPolicyUpdate.h create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWra= pper/Library/PeiSiliconPolicyUpdateLibFsp/PeiPchPolicyUpdate.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWra= pper/Library/PeiSiliconPolicyUpdateLibFsp/PeiPchPolicyUpdate.h create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWra= pper/Library/PeiSiliconPolicyUpdateLibFsp/PeiPchPolicyUpdatePreMem.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWra= pper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWra= pper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.h create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWra= pper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdatePreMem.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWra= pper/Library/PeiSiliconPolicyUpdateLibFsp/PeiSiliconPolicyUpdateLibFsp.inf create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWra= pper/Library/SecFspWrapperPlatformSecLib/FspWrapperPlatformSecLib.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWra= pper/Library/SecFspWrapperPlatformSecLib/FsptCoreUpd.h create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWra= pper/Library/SecFspWrapperPlatformSecLib/Ia32/Fsp.h create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWra= pper/Library/SecFspWrapperPlatformSecLib/Ia32/PeiCoreEntry.nasm create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWra= pper/Library/SecFspWrapperPlatformSecLib/Ia32/SecEntry.nasm create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWra= pper/Library/SecFspWrapperPlatformSecLib/Ia32/Stack.nasm create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWra= pper/Library/SecFspWrapperPlatformSecLib/PlatformInit.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWra= pper/Library/SecFspWrapperPlatformSecLib/SecFspWrapperPlatformSecLib.inf create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWra= pper/Library/SecFspWrapperPlatformSecLib/SecGetPerformance.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWra= pper/Library/SecFspWrapperPlatformSecLib/SecPlatformInformation.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWra= pper/Library/SecFspWrapperPlatformSecLib/SecRamInitData.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/FspWra= pper/Library/SecFspWrapperPlatformSecLib/SecTempRamDone.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Includ= e/Fdf/FlashMapInclude.fdf create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Includ= e/Library/PeiPlatformHookLib.h create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Includ= e/Library/PeiPlatformLib.h create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Includ= e/PlatformBoardConfig.h create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Includ= e/PlatformInfo.h create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/BaseFuncLib/BaseFuncLib.inf create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/BaseFuncLib/Gop.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/BaseGpioCheckConflictLib/BaseGpioCheckConflictLib.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/BaseGpioCheckConflictLib/BaseGpioCheckConflictLib.inf create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/BaseGpioCheckConflictLibNull/BaseGpioCheckConflictLibNull.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/BaseGpioCheckConflictLibNull/BaseGpioCheckConflictLibNull.inf create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/BasePlatformHookLib/BasePlatformHookLib.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/BasePlatformHookLib/BasePlatformHookLib.inf create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/BoardAcpiLib/SmmBoardAcpiEnableLib.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/BoardAcpiLib/SmmBoardAcpiEnableLib.inf create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/BoardAcpiLib/SmmMultiBoardAcpiSupportLib.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/BoardAcpiLib/SmmMultiBoardAcpiSupportLib.inf create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/BoardAcpiLib/SmmSiliconAcpiEnableLib.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/BoardAcpiLib/SmmUpXtremeAcpiEnableLib.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/BoardInitLib/BoardFuncInitPreMem.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/BoardInitLib/BoardInitLib.h create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/BoardInitLib/BoardPchInitPreMemLib.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/BoardInitLib/BoardSaConfigPreMem.h create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/BoardInitLib/BoardSaInitPreMemLib.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/BoardInitLib/GpioTableDefault.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/BoardInitLib/GpioTableUpXtreme.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/BoardInitLib/PchHdaVerbTables.h create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/BoardInitLib/PeiBoardInitPostMemLib.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/BoardInitLib/PeiBoardInitPostMemLib.inf create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/BoardInitLib/PeiBoardInitPreMemLib.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/BoardInitLib/PeiBoardInitPreMemLib.inf create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/BoardInitLib/PeiMultiBoardInitPostMemLib.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/BoardInitLib/PeiMultiBoardInitPostMemLib.inf create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/BoardInitLib/PeiMultiBoardInitPreMemLib.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/BoardInitLib/PeiMultiBoardInitPreMemLib.inf create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/BoardInitLib/PeiUpXtremeDetect.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/BoardInitLib/PeiUpXtremeInitPostMemLib.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/BoardInitLib/PeiUpXtremeInitPreMemLib.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/BoardInitLib/UpXtremeHsioPtssTables.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/BoardInitLib/UpXtremeInit.h create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/BoardInitLib/UpXtremeSpdTable.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/DxePolicyBoardConfigLib/DxePolicyBoardConfig.h create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/DxePolicyBoardConfigLib/DxePolicyBoardConfigLib.inf create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/DxePolicyBoardConfigLib/DxeSaPolicyBoardConfig.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/PeiPlatformHookLib/PeiPlatformHookLib.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/PeiPlatformHookLib/PeiPlatformHookLib.inf create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/PeiPolicyBoardConfigLib/PeiCpuPolicyBoardConfig.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/PeiPolicyBoardConfigLib/PeiCpuPolicyBoardConfigPreMem.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/PeiPolicyBoardConfigLib/PeiMePolicyBoardConfig.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/PeiPolicyBoardConfigLib/PeiMePolicyBoardConfigPreMem.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/PeiPolicyBoardConfigLib/PeiPchPolicyBoardConfig.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/PeiPolicyBoardConfigLib/PeiPchPolicyBoardConfigPreMem.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/PeiPolicyBoardConfigLib/PeiPolicyBoardConfig.h create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/PeiPolicyBoardConfigLib/PeiPolicyBoardConfigLib.inf create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/PeiPolicyBoardConfigLib/PeiSaPolicyBoardConfig.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/PeiPolicyBoardConfigLib/PeiSaPolicyBoardConfigPreMem.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/Librar= y/PeiPolicyBoardConfigLib/PeiSiPolicyBoardConfig.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBo= ardPkg.dsc create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBo= ardPkg.fdf create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBo= ardPkgBuildOption.dsc create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBo= ardPkgPcd.dsc create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/build_= config.cfg delete mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp= /Library/BoardInitLib/BoardFunc.c delete mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp= /Library/BoardInitLib/BoardFunc.h delete mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp= /Library/BoardInitLib/BoardFuncInit.c -- 2.19.1.windows.1