From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from walk.intel-email.com (walk.intel-email.com [101.227.64.242]) by mx.groups.io with SMTP id smtpd.web09.3869.1659678519084234512 for ; Thu, 04 Aug 2022 22:48:40 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@byosoft.com.cn header.s=cloud-union header.b=TkRD8uZj; spf=pass (domain: byosoft.com.cn, ip: 101.227.64.242, mailfrom: gaoliming@byosoft.com.cn) Received: from walk.intel-email.com (localhost [127.0.0.1]) by walk.intel-email.com (Postfix) with ESMTP id 6A300CD1F72C for ; Fri, 5 Aug 2022 13:48:33 +0800 (CST) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=byosoft.com.cn; s=cloud-union; t=1659678513; bh=ntT6ENl0x2IOM/JyqQCnb4W/ttomj7WhrQKLbNZ6C+E=; h=From:To:Cc:References:In-Reply-To:Subject:Date; b=TkRD8uZjFNGx0x/C+gBhmfhLo5fQy30/pn9hkiB6xG/so4ANx23ODlmtkfLEmaaqs 8yR1U7PFzw9MKTgvII80V+XKsQmQC6opHK0BH5OKZMzKjJZiGtTHoy93+weHBO8Qj9 LR5c//ePWpM0Flj/h7V1YBeTd7+vecdKIY5eDxmw= Received: from localhost (localhost [127.0.0.1]) by walk.intel-email.com (Postfix) with ESMTP id 66369CD1F768 for ; Fri, 5 Aug 2022 13:48:33 +0800 (CST) X-Virus-Scanned: by SpamTitan at intel-email.com Received: from walk.intel-email.com (localhost [127.0.0.1]) by walk.intel-email.com (Postfix) with ESMTP id 2D558CD1F747 for ; Fri, 5 Aug 2022 13:48:33 +0800 (CST) Authentication-Results: walk.intel-email.com; none Received: from mail.byosoft.com.cn (mail.byosoft.com.cn [58.240.74.242]) by walk.intel-email.com (Postfix) with SMTP id C15FFCD1F72C for ; Fri, 5 Aug 2022 13:48:29 +0800 (CST) Received: from DESKTOPS6D0PVI ([58.246.60.130]) (envelope-sender ) by 192.168.6.13 with ESMTP for ; Fri, 05 Aug 2022 13:48:19 +0800 X-WM-Sender: gaoliming@byosoft.com.cn X-Originating-IP: 58.246.60.130 X-WM-AuthFlag: YES X-WM-AuthUser: gaoliming@byosoft.com.cn From: "gaoliming" To: , , Cc: "'Sundaresan S'" , "'Vasudevan Sambandan'" , "'nd'" References: <20220803045122.1934-1-sainadhn@ami.com> In-Reply-To: Subject: =?UTF-8?B?5Zue5aSNOiBbZWRrMi1kZXZlbF0gW1BBVENIXSBBZGQgc3VwcG9ydCBmb3IgU01CSU9TIFNwZWMgMy42LjAgdG8gU21CaW9zLmg=?= Date: Fri, 5 Aug 2022 13:48:22 +0800 Message-ID: <02fa01d8a88e$f938eef0$ebaaccd0$@byosoft.com.cn> MIME-Version: 1.0 X-Mailer: Microsoft Outlook 16.0 Thread-Index: AQGOvRACp1hjnxLPdVJzuHs5IeGWOAFl1XMurih1GbA= Sender: "gaoliming" Content-Type: text/plain; charset="gb2312" Content-Transfer-Encoding: quoted-printable Content-Language: zh-cn Reviewed-by: Liming Gao > -----=D3=CA=BC=FE=D4=AD=BC=FE----- > =B7=A2=BC=FE=C8=CB: devel@edk2.groups.io =B4=FA=B1= =ED Samer > El-Haj-Mahmoud > =B7=A2=CB=CD=CA=B1=BC=E4: 2022=C4=EA8=D4=C23=C8=D5 21:11 > =CA=D5=BC=FE=C8=CB: devel@edk2.groups.io; sainadhn@ami.com > =B3=AD=CB=CD: Sundaresan S ; Vasudevan Sambandan > ; gaoliming@byosoft.com.cn; Samer > El-Haj-Mahmoud ; nd > =D6=F7=CC=E2: Re: [edk2-devel] [PATCH] Add support for SMBIOS Spec 3.6.0 = to > SmBios.h >=20 > A quick compare against the SMBIOS 3.6.0. Looks good! Thanks for adding > this. >=20 > Reviewed-By: Samer El-Haj-Mahmoud >=20 >=20 > > -----Original Message----- > > From: devel@edk2.groups.io On Behalf Of Sainadh > > Nagolu via groups.io > > Sent: Wednesday, August 3, 2022 12:52 AM > > To: devel@edk2.groups.io; Sainadh Nagolu > > Cc: Sundaresan S ; Vasudevan Sambandan > > ; gaoliming@byosoft.com.cn > > Subject: [edk2-devel] [PATCH] Add support for SMBIOS Spec 3.6.0 to > SmBios.h > > > > Updated SmBios.h with new fields added as part of SMBIOS 3.6.0 spec > update. > > > > Signed-off-by: Sainadh Nagolu > > > > CC: Vasudevan Sambandan > > CC: Sundaresan S > > > > --- > > MdePkg/Include/IndustryStandard/SmBios.h | 88 > ++++++++++++++++-------- > > 1 file changed, 61 insertions(+), 27 deletions(-) > > > > diff --git a/MdePkg/Include/IndustryStandard/SmBios.h > > b/MdePkg/Include/IndustryStandard/SmBios.h > > index c7a4971f14..3b296ab308 100644 > > --- a/MdePkg/Include/IndustryStandard/SmBios.h > > +++ b/MdePkg/Include/IndustryStandard/SmBios.h > > @@ -1,5 +1,5 @@ > > /** @file > > > > - Industry Standard Definitions of SMBIOS Table Specification v3.5.0. > > > > + Industry Standard Definitions of SMBIOS Table Specification v3.6.0. > > > > > > > > Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.
> > > > (C) Copyright 2015-2017 Hewlett Packard Enterprise Development > LP
> > > > @@ -722,21 +722,39 @@ typedef enum { > > /// Processor Information2 - Processor Family2. > > > > /// > > > > typedef enum { > > > > - ProcessorFamilyARMv7 =3D 0x0100, > > > > - ProcessorFamilyARMv8 =3D 0x0101, > > > > - ProcessorFamilySH3 =3D 0x0104, > > > > - ProcessorFamilySH4 =3D 0x0105, > > > > - ProcessorFamilyARM =3D 0x0118, > > > > - ProcessorFamilyStrongARM =3D 0x0119, > > > > - ProcessorFamily6x86 =3D 0x012C, > > > > - ProcessorFamilyMediaGX =3D 0x012D, > > > > - ProcessorFamilyMII =3D 0x012E, > > > > - ProcessorFamilyWinChip =3D 0x0140, > > > > - ProcessorFamilyDSP =3D 0x015E, > > > > - ProcessorFamilyVideoProcessor =3D 0x01F4, > > > > - ProcessorFamilyRiscvRV32 =3D 0x0200, > > > > - ProcessorFamilyRiscVRV64 =3D 0x0201, > > > > - ProcessorFamilyRiscVRV128 =3D 0x0202 > > > > + ProcessorFamilyARMv7 =3D 0x0100, > > > > + ProcessorFamilyARMv8 =3D 0x0101, > > > > + ProcessorFamilyARMv9 =3D 0x0102, > > > > + ProcessorFamilySH3 =3D 0x0104, > > > > + ProcessorFamilySH4 =3D 0x0105, > > > > + ProcessorFamilyARM =3D 0x0118, > > > > + ProcessorFamilyStrongARM =3D 0x0119, > > > > + ProcessorFamily6x86 =3D 0x012C, > > > > + ProcessorFamilyMediaGX =3D 0x012D, > > > > + ProcessorFamilyMII =3D 0x012E, > > > > + ProcessorFamilyWinChip =3D 0x0140, > > > > + ProcessorFamilyDSP =3D 0x015E, > > > > + ProcessorFamilyVideoProcessor =3D 0x01F4, > > > > + ProcessorFamilyRiscvRV32 =3D 0x0200, > > > > + ProcessorFamilyRiscVRV64 =3D 0x0201, > > > > + ProcessorFamilyRiscVRV128 =3D 0x0202, > > > > + ProcessorFamilyLoongArch =3D 0x0258, > > > > + ProcessorFamilyLoongson1 =3D 0x0259, > > > > + ProcessorFamilyLoongson2 =3D 0x025A, > > > > + ProcessorFamilyLoongson3 =3D 0x025B, > > > > + ProcessorFamilyLoongson2K =3D 0x025C, > > > > + ProcessorFamilyLoongson3A =3D 0x025D, > > > > + ProcessorFamilyLoongson3B =3D 0x025E, > > > > + ProcessorFamilyLoongson3C =3D 0x025F, > > > > + ProcessorFamilyLoongson3D =3D 0x0260, > > > > + ProcessorFamilyLoongson3E =3D 0x0261, > > > > + ProcessorFamilyDualCoreLoongson2K =3D 0x0262, > > > > + ProcessorFamilyQuadCoreLoongson3A =3D 0x026C, > > > > + ProcessorFamilyMultiCoreLoongson3A =3D 0x026D, > > > > + ProcessorFamilyQuadCoreLoongson3B =3D 0x026E, > > > > + ProcessorFamilyMultiCoreLoongson3B =3D 0x026F, > > > > + ProcessorFamilyMultiCoreLoongson3C =3D 0x0270, > > > > + ProcessorFamilyMultiCoreLoongson3D =3D 0x0271 > > > > } PROCESSOR_FAMILY2_DATA; > > > > > > > > /// > > > > @@ -817,7 +835,16 @@ typedef enum { > > ProcessorUpgradeSocketBGA1528 =3D 0x3C, > > > > ProcessorUpgradeSocketLGA4189 =3D 0x3D, > > > > ProcessorUpgradeSocketLGA1200 =3D 0x3E, > > > > - ProcessorUpgradeSocketLGA4677 =3D 0x3F > > > > + ProcessorUpgradeSocketLGA4677 =3D 0x3F, > > > > + ProcessorUpgradeSocketLGA1700 =3D 0x40, > > > > + ProcessorUpgradeSocketBGA1744 =3D 0x41, > > > > + ProcessorUpgradeSocketBGA1781 =3D 0x42, > > > > + ProcessorUpgradeSocketBGA1211 =3D 0x43, > > > > + ProcessorUpgradeSocketBGA2422 =3D 0x44, > > > > + ProcessorUpgradeSocketLGA1211 =3D 0x45, > > > > + ProcessorUpgradeSocketLGA2422 =3D 0x46, > > > > + ProcessorUpgradeSocketLGA5773 =3D 0x47, > > > > + ProcessorUpgradeSocketBGA5773 =3D 0x48 > > > > } PROCESSOR_UPGRADE; > > > > > > > > /// > > > > @@ -946,6 +973,10 @@ typedef struct { > > UINT16 CoreCount2; > > > > UINT16 EnabledCoreCount2; > > > > UINT16 ThreadCount2; > > > > + // > > > > + // Add for smbios 3.6 > > > > + // > > > > + UINT16 ThreadEnabled; > > > > } SMBIOS_TABLE_TYPE4; > > > > > > > > /// > > > > @@ -1811,7 +1842,8 @@ typedef enum { > > MemoryTypeHBM =3D 0x20, > > > > MemoryTypeHBM2 =3D 0x21, > > > > MemoryTypeDdr5 =3D 0x22, > > > > - MemoryTypeLpddr5 =3D 0x23 > > > > + MemoryTypeLpddr5 =3D 0x23, > > > > + MemoryTypeHBM3 =3D 0x24 > > > > } MEMORY_DEVICE_TYPE; > > > > > > > > /// > > > > @@ -2660,15 +2692,17 @@ typedef struct { > > /// Processor Specific Block - Processor Architecture Type > > > > /// > > > > typedef enum { > > > > - ProcessorSpecificBlockArchTypeReserved =3D 0x00, > > > > - ProcessorSpecificBlockArchTypeIa32 =3D 0x01, > > > > - ProcessorSpecificBlockArchTypeX64 =3D 0x02, > > > > - ProcessorSpecificBlockArchTypeItanium =3D 0x03, > > > > - ProcessorSpecificBlockArchTypeAarch32 =3D 0x04, > > > > - ProcessorSpecificBlockArchTypeAarch64 =3D 0x05, > > > > - ProcessorSpecificBlockArchTypeRiscVRV32 =3D 0x06, > > > > - ProcessorSpecificBlockArchTypeRiscVRV64 =3D 0x07, > > > > - ProcessorSpecificBlockArchTypeRiscVRV128 =3D 0x08 > > > > + ProcessorSpecificBlockArchTypeReserved =3D 0x00, > > > > + ProcessorSpecificBlockArchTypeIa32 =3D 0x01, > > > > + ProcessorSpecificBlockArchTypeX64 =3D 0x02, > > > > + ProcessorSpecificBlockArchTypeItanium =3D 0x03, > > > > + ProcessorSpecificBlockArchTypeAarch32 =3D 0x04, > > > > + ProcessorSpecificBlockArchTypeAarch64 =3D 0x05, > > > > + ProcessorSpecificBlockArchTypeRiscVRV32 =3D 0x06, > > > > + ProcessorSpecificBlockArchTypeRiscVRV64 =3D 0x07, > > > > + ProcessorSpecificBlockArchTypeRiscVRV128 =3D 0x08, > > > > + ProcessorSpecificBlockArchTypeLoongArch32 =3D 0x09, > > > > + ProcessorSpecificBlockArchTypeLoongArch64 =3D 0x0A > > > > } PROCESSOR_SPECIFIC_BLOCK_ARCH_TYPE; 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