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From: "Lendacky, Thomas via groups.io" <thomas.lendacky=amd.com@groups.io>
To: Alexey Kardashevskiy <aik@amd.com>, devel@edk2.groups.io
Cc: Liming Gao <gaoliming@byosoft.com.cn>,
	Michael D Kinney <michael.d.kinney@intel.com>,
	Zhiguang Liu <zhiguang.liu@intel.com>,
	Ard Biesheuvel <ardb+tianocore@kernel.org>,
	Erdem Aktas <erdemaktas@google.com>,
	Gerd Hoffmann <kraxel@redhat.com>,
	Jiewen Yao <jiewen.yao@intel.com>,
	Michael Roth <michael.roth@amd.com>, Min Xu <min.m.xu@intel.com>
Subject: Re: [edk2-devel] [PATCH ovmf v3 1/5] MdePkg/Register/Amd: Define all bits from MSR_SEV_STATUS_REGISTER
Date: Mon, 20 May 2024 12:19:22 -0500	[thread overview]
Message-ID: <043edee3-be1d-2fed-7dd4-547a3b5212dd@amd.com> (raw)
In-Reply-To: <20240502143445.526098-2-aik@amd.com>

On 5/2/24 09:34, Alexey Kardashevskiy wrote:
> For now we need DebugSwap but others are likely to be needed too.
> 
> Cc: Tom Lendacky <thomas.lendacky@amd.com>
> Cc: Liming Gao <gaoliming@byosoft.com.cn>
> Cc: Michael D Kinney <michael.d.kinney@intel.com>
> Cc: Zhiguang Liu <zhiguang.liu@intel.com>
> Signed-off-by: Alexey Kardashevskiy <aik@amd.com>

A recent APM has defined a few more and has slightly different naming 
(see below). If you have to submit another version it might be good to 
update them. Otherwise:

Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com>

> ---
>   MdePkg/Include/Register/Amd/Fam17Msr.h | 63 ++++++++++++++++++--
>   1 file changed, 59 insertions(+), 4 deletions(-)
> 
> diff --git a/MdePkg/Include/Register/Amd/Fam17Msr.h b/MdePkg/Include/Register/Amd/Fam17Msr.h
> index f2d5ccb39dc7..bce51a66517f 100644
> --- a/MdePkg/Include/Register/Amd/Fam17Msr.h
> +++ b/MdePkg/Include/Register/Amd/Fam17Msr.h
> @@ -126,19 +126,74 @@ typedef union {
>       ///
>       /// [Bit 0] Secure Encrypted Virtualization (Sev) is enabled
>       ///
> -    UINT32    SevBit    : 1;
> +    UINT32    SevBit              : 1;
>   
>       ///
>       /// [Bit 1] Secure Encrypted Virtualization Encrypted State (SevEs) is enabled
>       ///
> -    UINT32    SevEsBit  : 1;
> +    UINT32    SevEsBit            : 1;
>   
>       ///
>       /// [Bit 2] Secure Nested Paging (SevSnp) is enabled
>       ///
> -    UINT32    SevSnpBit : 1;
> +    UINT32    SevSnpBit           : 1;
>   
> -    UINT32    Reserved2 : 29;
> +    ///
> +    /// [Bit 3] The guest was run with the Virtual TOM feature enabled in SEV_FEATURES[1]
> +    ///
> +    UINT32    vTOM_Enabled        : 1;

The APM has this as vTOM and the PPR as VirtualTOM, so can probably 
remove the _Enabled.

> +
> +    ///
> +    /// [Bit 4] The guest was run with the ReflectVC feature enabled in SEV_FEATURES[2]
> +    ///
> +    UINT32    ReflectVC           : 1;
> +
> +    ///
> +    /// [Bit 5] The guest was run with the Restricted Injection feature enabled in SEV_FEATURES[3]
> +    ///
> +    UINT32    RestrictedInjection : 1;
> +
> +    ///
> +    /// [Bit 6] The guest was run with the Alternate Injection feature enabled in SEV_FEATURES[4]
> +    ///
> +    UINT32    AlternateInjection  : 1;
> +
> +    ///
> +    /// [Bit 7] This guest was run with debug register swapping enabled in SEV_FEATURES[5]
> +    ///
> +    UINT32    DebugSwap           : 1;

The APM has this as DebugVirtualization and the PPR as DebugSwapSupport.

> +
> +    ///
> +    /// [Bit 8]  This guest was run with the PreventHostIBS feature enabled in SEV_FEATURES[6]
> +    ///
> +    UINT32    PreventHostIBS      : 1;
> +
> +    ///
> +    /// [Bit 9] The guest was run with the BTB isolation feature enabled in SEV_FEATURES[7]
> +    ///
> +    UINT32    SNPBTBIsolation     : 1;

The APM has this as BTBIsolation, while the PPR has it as you do.

> +
> +    ///
> +    /// [Bit 10]
> +    ///
> +    UINT32    Reserved0           : 1;
> +
> +    ///
> +    /// [Bit 11] The guest was run with the Secure TSC feature enabled in SEV_FEATURES[9]
> +    ///
> +    UINT32    SecureTsc           : 1;
> +
> +    ///
> +    /// [Bits 12 13 14 15]
> +    ///
> +    UINT32    Reserved1           : 4;
> +
> +    ///
> +    /// [Bit 16] The guest was run with the VMSA Register Protection feature enabled in SEV_FEATURES[14]
> +    ///
> +    UINT32    VmsaRegProt_Enabled : 1;

The APM has this VmsaRegProt, so can probably drop the _Enabled.

> +
> +    UINT32    Reserved2           : 15;
>     } Bits;
>     ///
>     /// All bit fields as a 32-bit value


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  reply	other threads:[~2024-05-20 17:19 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-02 14:34 [edk2-devel] [PATCH ovmf v3 0/5] Enable AMD SEV-ES DebugSwap Alexey Kardashevskiy via groups.io
2024-05-02 14:34 ` [edk2-devel] [PATCH ovmf v3 1/5] MdePkg/Register/Amd: Define all bits from MSR_SEV_STATUS_REGISTER Alexey Kardashevskiy via groups.io
2024-05-20 17:19   ` Lendacky, Thomas via groups.io [this message]
2024-05-02 14:34 ` [edk2-devel] [PATCH ovmf v3 2/5] MdePkg: Add AMD SEV features to PcdConfidentialComputingGuestAttr Alexey Kardashevskiy via groups.io
2024-05-20 17:34   ` Lendacky, Thomas via groups.io
2024-05-02 14:34 ` [edk2-devel] [PATCH ovmf v3 3/5] OvmfPkg: Add AMD SEV-ES DebugSwap feature support Alexey Kardashevskiy via groups.io
2024-05-20 17:46   ` Lendacky, Thomas via groups.io
2024-05-02 14:34 ` [edk2-devel] [PATCH ovmf v3 4/5] UefiCpuPkg: Add AMD SEV-ES features support Alexey Kardashevskiy via groups.io
2024-05-20 17:47   ` Lendacky, Thomas via groups.io
2024-05-02 14:34 ` [edk2-devel] [PATCH ovmf v3 5/5] OvmfPkf: Enable AMD SEV-ES DebugSwap for DXE Alexey Kardashevskiy via groups.io
2024-05-20  1:22 ` [edk2-devel] [PATCH ovmf v3 0/5] Enable AMD SEV-ES DebugSwap Alexey Kardashevskiy via groups.io

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