From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: redhat.com, ip: 209.85.221.66, mailfrom: philmd@redhat.com) Received: from mail-wr1-f66.google.com (mail-wr1-f66.google.com [209.85.221.66]) by groups.io with SMTP; Wed, 29 May 2019 08:25:25 -0700 Received: by mail-wr1-f66.google.com with SMTP id d18so2095147wrs.5 for ; Wed, 29 May 2019 08:25:24 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:to:cc:references:from:openpgp:message-id :date:user-agent:mime-version:in-reply-to:content-language :content-transfer-encoding; bh=4tRFL/O0yl9Q/WzW7C0qBi+ZS5qSdrZgalbMlYLuV2c=; b=X7GmAQShQYoC34FPL6q4rTqkvYjSybR5MMPjGaAJFZ33HMFEVPvxYO4oSHwq455mfw oNWvMpIHL/w2vVDNH/EtiklchvsTdZ0Bxg/GYqnGmBMADXm3Iu0pDPTV3K5+A58bigZw lj0dMGi553N9hoompJm+HftQaX/iQGf0Mpw4qcDQxsNMYJWuwok9l+Lwm1dZqRwbbNVL jwvgt8DpcNCgstvyut4Lo7zWUxqB01Q7ll6SkSeaMLW6Pe1nFSDcSTcKHg8USFnfmkDy 2hXNvBOgAAvejgpeis2+hajDPCfAunILfqJlRQS8oenpnVLRhP7aVuZm7Q7FSr8B7qXs kUfQ== X-Gm-Message-State: APjAAAVzxJXQjVgWFgfyIg1HzHbeI/htwGQ1ULC56uMlYv7NAFqc0J2l RsMlna577XG9Olp+izwDL17T4Q== X-Google-Smtp-Source: APXvYqzfteK6iqIUZF0KLQp6ptXSEIiLngS8FCy4t1jhZRNvYBwm4SN940tBlNudd3/rkmOkxjCoGw== X-Received: by 2002:adf:dd52:: with SMTP id u18mr5897226wrm.193.1559143523557; Wed, 29 May 2019 08:25:23 -0700 (PDT) Return-Path: Received: from [10.201.33.53] ([195.166.127.210]) by smtp.gmail.com with ESMTPSA id a139sm9475247wmd.18.2019.05.29.08.25.22 (version=TLS1_3 cipher=AEAD-AES128-GCM-SHA256 bits=128/128); Wed, 29 May 2019 08:25:23 -0700 (PDT) Subject: Re: [edk2-devel] [PATCH for-edk2-stable201905 3/6] Revert "OvmfPkg/PlatformPei: hoist PciBase assignment above the i440fx/q35 branching" To: devel@edk2.groups.io, lersek@redhat.com Cc: Ard Biesheuvel , Gerd Hoffmann , Jordan Justen References: <20190529151209.17503-1-lersek@redhat.com> <20190529151209.17503-4-lersek@redhat.com> From: =?UTF-8?B?UGhpbGlwcGUgTWF0aGlldS1EYXVkw6k=?= Openpgp: id=89C1E78F601EE86C867495CBA2A3FD6EDEADC0DE; url=http://pgp.mit.edu/pks/lookup?op=get&search=0xA2A3FD6EDEADC0DE Message-ID: <04cdc2ae-48f9-300a-6b50-bb7c9b7dbc25@redhat.com> Date: Wed, 29 May 2019 17:25:21 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.6.1 MIME-Version: 1.0 In-Reply-To: <20190529151209.17503-4-lersek@redhat.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit On 5/29/19 5:12 PM, Laszlo Ersek wrote: > This reverts commit 9a2e8d7c65ef7f39c6754d27e52954b616bc6628. > > The original fix for > triggered a bug / incorrect assumption in QEMU. > > QEMU assumes that the PCIEXBAR is below the 32-bit PCI window, not above > it. When the firmware doesn't satisfy this assumption, QEMU generates an > \_SB.PCI0._CRS object in the ACPI DSDT that does not reflect the > firmware's 32-bit MMIO BAR assignments. This causes OSes to re-assign > 32-bit MMIO BARs. > > Working around the problem in the firmware looks less problematic than > fixing QEMU. Revert the original changes first, before implementing an > alternative fix. > > Cc: Ard Biesheuvel > Cc: Gerd Hoffmann > Cc: Jordan Justen > Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1859 > Signed-off-by: Laszlo Ersek Reviewed-by: Philippe Mathieu-Daude > --- > OvmfPkg/PlatformPei/Platform.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c > index 9c013613a1a0..5e0a15484230 100644 > --- a/OvmfPkg/PlatformPei/Platform.c > +++ b/OvmfPkg/PlatformPei/Platform.c > @@ -181,7 +181,6 @@ MemMapInitialization ( > > TopOfLowRam = GetSystemMemorySizeBelow4gb (); > PciExBarBase = 0; > - PciBase = (TopOfLowRam < BASE_2GB) ? BASE_2GB : TopOfLowRam; > if (mHostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID) { > // > // The MMCONFIG area is expected to fall between the top of low RAM and > @@ -193,6 +192,7 @@ MemMapInitialization ( > PciBase = (UINT32)(PciExBarBase + SIZE_256MB); > PciSize = 0xFC000000 - PciBase; > } else { > + PciBase = (TopOfLowRam < BASE_2GB) ? BASE_2GB : TopOfLowRam; > PciSize = 0xFC000000 - PciBase; > } > >