From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from us-smtp-delivery-1.mimecast.com (us-smtp-delivery-1.mimecast.com [205.139.110.61]) by mx.groups.io with SMTP id smtpd.web12.3689.1591867453741902008 for ; Thu, 11 Jun 2020 02:24:13 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@redhat.com header.s=mimecast20190719 header.b=Hcquy5sF; spf=pass (domain: redhat.com, ip: 205.139.110.61, mailfrom: lersek@redhat.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1591867452; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=A44pf0dRSZY81RrulnYgsQaB/NPqmKHcps/gyCVGT74=; b=Hcquy5sF943gg3aTrqFa1hUBDwVXNq7Ci+53Jw2FKEcorhNcuPeMOD+JBK5rKVjDovW/s8 IzuZFM8X0TLdlBdIZ3vd0GJXboyJ3NV/+UR5ht1/2udFiZ9KQYezKn6Prgju6+3hDpSh4X 01wtTy5aXSjv21n9WKlqiCHNXc8MeiM= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-196--LQsevj1Ne206OlihGcNDw-1; Thu, 11 Jun 2020 05:24:08 -0400 X-MC-Unique: -LQsevj1Ne206OlihGcNDw-1 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 0DA7C872FE0; Thu, 11 Jun 2020 09:24:07 +0000 (UTC) Received: from lacos-laptop-7.usersys.redhat.com (ovpn-114-21.ams2.redhat.com [10.36.114.21]) by smtp.corp.redhat.com (Postfix) with ESMTP id E7D9610013C1; Thu, 11 Jun 2020 09:24:04 +0000 (UTC) Subject: Re: [PATCH v9 26/46] OvmfPkg/VmgExitLib: Add support for DR7 Read/Write NAE events To: Tom Lendacky , devel@edk2.groups.io Cc: Brijesh Singh , Ard Biesheuvel , Eric Dong , Jordan Justen , Liming Gao , Michael D Kinney , Ray Ni References: From: "Laszlo Ersek" Message-ID: <053f773d-f006-07db-547c-aefc63c3a80e@redhat.com> Date: Thu, 11 Jun 2020 11:24:04 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Language: en-US Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit On 06/05/20 15:27, Tom Lendacky wrote: > BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198 > > Under SEV-ES, a DR7 read or write intercept generates a #VC exception. > The #VC handler must provide special support to the guest for this. On > a DR7 write, the #VC handler must cache the value and issue a VMGEXIT > to notify the hypervisor of the write. However, the #VC handler must > not actually set the value of the DR7 register. On a DR7 read, the #VC > handler must return the cached value of the DR7 register to the guest. > VMGEXIT is not invoked for a DR7 register read. > > The caching of the DR7 values will make use of the per-CPU data pages > that are allocated along with the GHCB pages. The per-CPU page for a > vCPU is the page that immediately follows the vCPU's GHCB page. Since > each GHCB page is unique for a vCPU, the page that follows becomes > unique for that vCPU. The SEC phase will reserves an area of memory for > a single GHCB and per-CPU page for use by the BSP. After transitioning > to the PEI phase, new GHCB and per-CPU pages are allocated for the BSP > and all APs. > > Cc: Jordan Justen > Cc: Laszlo Ersek > Cc: Ard Biesheuvel > Signed-off-by: Tom Lendacky > --- > OvmfPkg/Library/VmgExitLib/VmgExitVcHandler.c | 114 ++++++++++++++++++++ > 1 file changed, 114 insertions(+) The patch looks good to me: Acked-by: Laszlo Ersek Just one question: in the v8 review, I wrote: """ With your explanation above, about platform reset, I think I'm happy with the current handling of "Dr7Cached". So I'd like to leave the choice to you: please either add the clearing, or document in the commit message and/or the code that platform reset will not happen. Whichever you like more. """ So what have you chosen ultimately? I haven't found a comment to the effect of "An SEV-ES guest can't be rebooted/reset without restarting Qemu" in this patch, in the commit message or in the code. Did you implement the clearing, in the end? (Sorry if I should have noticed it already!) Thanks, Laszlo > diff --git a/OvmfPkg/Library/VmgExitLib/VmgExitVcHandler.c b/OvmfPkg/Library/VmgExitLib/VmgExitVcHandler.c > index 9d93e30a8ea4..e8f9d3fa01a8 100644 > --- a/OvmfPkg/Library/VmgExitLib/VmgExitVcHandler.c > +++ b/OvmfPkg/Library/VmgExitLib/VmgExitVcHandler.c > @@ -126,6 +126,14 @@ UINT64 > SEV_ES_INSTRUCTION_DATA *InstructionData > ); > > +// > +// Per-CPU data mapping structure > +// > +typedef struct { > + BOOLEAN Dr7Cached; > + UINT64 Dr7; > +} SEV_ES_PER_CPU_DATA; > + > > /** > Checks the GHCB to determine if the specified register has been marked valid. > @@ -1478,6 +1486,104 @@ RdtscExit ( > return 0; > } > > +/** > + Handle a DR7 register write event. > + > + Use the VMGEXIT instruction to handle a DR7 write event. > + > + @param[in, out] Ghcb Pointer to the Guest-Hypervisor Communication > + Block > + @param[in, out] Regs x64 processor context > + @param[in] InstructionData Instruction parsing context > + > + @return 0 Event handled successfully > + @return Others New exception value to propagate > + > +**/ > +STATIC > +UINT64 > +Dr7WriteExit ( > + IN OUT GHCB *Ghcb, > + IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, > + IN SEV_ES_INSTRUCTION_DATA *InstructionData > + ) > +{ > + SEV_ES_INSTRUCTION_OPCODE_EXT *Ext; > + SEV_ES_PER_CPU_DATA *SevEsData; > + UINT64 *Register; > + UINT64 Status; > + > + Ext = &InstructionData->Ext; > + SevEsData = (SEV_ES_PER_CPU_DATA *) (Ghcb + 1); > + > + DecodeModRm (Regs, InstructionData); > + > + // > + // MOV DRn always treats MOD == 3 no matter how encoded > + // > + Register = GetRegisterPointer (Regs, Ext->ModRm.Rm); > + > + // > + // Using a value of 0 for ExitInfo1 means RAX holds the value > + // > + Ghcb->SaveArea.Rax = *Register; > + GhcbSetRegValid (Ghcb, GhcbRax); > + > + Status = VmgExit (Ghcb, SVM_EXIT_DR7_WRITE, 0, 0); > + if (Status != 0) { > + return Status; > + } > + > + SevEsData->Dr7 = *Register; > + SevEsData->Dr7Cached = TRUE; > + > + return 0; > +} > + > +/** > + Handle a DR7 register read event. > + > + Use the VMGEXIT instruction to handle a DR7 read event. > + > + @param[in, out] Ghcb Pointer to the Guest-Hypervisor Communication > + Block > + @param[in, out] Regs x64 processor context > + @param[in] InstructionData Instruction parsing context > + > + @return 0 Event handled successfully > + > +**/ > +STATIC > +UINT64 > +Dr7ReadExit ( > + IN OUT GHCB *Ghcb, > + IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, > + IN SEV_ES_INSTRUCTION_DATA *InstructionData > + ) > +{ > + SEV_ES_INSTRUCTION_OPCODE_EXT *Ext; > + SEV_ES_PER_CPU_DATA *SevEsData; > + UINT64 *Register; > + > + Ext = &InstructionData->Ext; > + SevEsData = (SEV_ES_PER_CPU_DATA *) (Ghcb + 1); > + > + DecodeModRm (Regs, InstructionData); > + > + // > + // MOV DRn always treats MOD == 3 no matter how encoded > + // > + Register = GetRegisterPointer (Regs, Ext->ModRm.Rm); > + > + // > + // If there is a cached valued for DR7, return that. Otherwise return the > + // DR7 standard reset value of 0x400 (no debug breakpoints set). > + // > + *Register = (SevEsData->Dr7Cached) ? SevEsData->Dr7 : 0x400; > + > + return 0; > +} > + > /** > Handle a #VC exception. > > @@ -1522,6 +1628,14 @@ VmgExitHandleVc ( > > ExitCode = Regs->ExceptionData; > switch (ExitCode) { > + case SVM_EXIT_DR7_READ: > + NaeExit = Dr7ReadExit; > + break; > + > + case SVM_EXIT_DR7_WRITE: > + NaeExit = Dr7WriteExit; > + break; > + > case SVM_EXIT_RDTSC: > NaeExit = RdtscExit; > break; >