From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id D72D4D8080A for ; Thu, 16 Nov 2023 09:17:34 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=Kzw7yDjx2f3o7DT1UHAwedpCzNrZWn8e0MT74C48DW4=; c=relaxed/simple; d=groups.io; h=Message-ID:Date:MIME-Version:User-Agent:Subject:To:Cc:References:From:In-Reply-To:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Type; s=20140610; t=1700126253; v=1; b=c9SuMdnFdeilSSMELWN3XzIFEDTUjtGR8OCRXKCcqwDMRqtl4AFQ7pcXNO9joBH9inEyia2c LcDwScA4yBVRyFPlGN5z2yXlfRpYeizLvy/rL39YFDGr3Ug0mnKQtL3mTywSn1hPwz4jgkO6iV2 SX8H0QuZJe/CY/65E/+S8b0U= X-Received: by 127.0.0.2 with SMTP id eDBvYY7687511x7KhSumtpMS; Thu, 16 Nov 2023 01:17:33 -0800 X-Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by mx.groups.io with SMTP id smtpd.web11.3272.1700126251721043839 for ; Thu, 16 Nov 2023 01:17:32 -0800 X-Received: from loongson.cn (unknown [10.40.24.149]) by gateway (Coremail) with SMTP id _____8AxJugn3lVlp4E6AA--.56721S3; Thu, 16 Nov 2023 17:17:27 +0800 (CST) X-Received: from [10.40.24.149] (unknown [10.40.24.149]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Cx7y8i3lVlCfVDAA--.17750S3; Thu, 16 Nov 2023 17:17:22 +0800 (CST) Message-ID: <055c01c0-7fdb-4e7c-b3b8-391d5d8bf27f@loongson.cn> Date: Thu, 16 Nov 2023 17:17:22 +0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [edk2-devel] [PATCH v2 15/30] EmbeddedPkg: Add PcdPrePiCpuIoSize width for LOONGARCH64 To: devel@edk2.groups.io, pedro.falcato@gmail.com, quic_llindhol@quicinc.com Cc: Ard Biesheuvel , Abner Chang , Daniel Schaefer References: <20231106032521.2251143-1-lichao@loongson.cn> <20231106032901.2285407-1-lichao@loongson.cn> <94637080-fb4d-44a1-9399-2b67525e4f6f@quicinc.com> From: "Chao Li" In-Reply-To: X-CM-TRANSID: AQAAf8Cx7y8i3lVlCfVDAA--.17750S3 X-CM-SenderInfo: xolfxt3r6o00pqjv00gofq/1tbiAQARCGVVfCoFbQABsX X-Coremail-Antispam: 1Uk129KBj93XoWxJF1fCFyUtF1rJr1xJr4UKFX_yoW5Gry3pF 4I93Z3WrWUKr9rtws0ya4UG3yrAr1fA34UKFZrGry8Ca98G3WDur4j9FW0vrW5Z3sayw4x ArZI9w15Aa45Z3gCm3ZEXasCq-sJn29KB7ZKAUJUUUU8529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnRJUUUyCb4IE77IF4wAF F20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2IYs7xG6rWj6s0DM7CIcVAFz4kK6r 1Y6r17M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48ve4kI8wA2z4x0Y4vE2Ix0cI8IcVAF wI0_Jr0_JF4l84ACjcxK6xIIjxv20xvEc7CjxVAFwI0_Jr0_Gr1l84ACjcxK6I8E87Iv67 AKxVW8Jr0_Cr1UM28EF7xvwVC2z280aVCY1x0267AKxVW8Jr0_Cr1UM2AIxVAIcxkEcVAq 07x20xvEncxIr21l57IF6xkI12xvs2x26I8E6xACxx1lYx0E2Ix0cI8IcVAFwI0_JrI_Jr ylYx0Ex4A2jsIE14v26r1j6r4UMcvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvEwIxGrwCj r7xvwVCIw2I0I7xG6c02F41l42xK82IYc2Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr 1lx2IqxVAqx4xG67AKxVWUGVWUWwC20s026x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE 14v26r126r1DMIIYrxkI7VAKI48JMIIF0xvE2Ix0cI8IcVAFwI0_Jr0_JF4lIxAIcVC0I7 IYx2IY6xkF7I0E14v26r1j6r4UMIIF0xvE42xK8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E 87Iv67AKxVWUJVW8JwCI42IY6I8E87Iv6xkF7I0E14v26r1j6r4UYxBIdaVFxhVjvjDU0x ZFpf9x07UAWrXUUUUU= Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,lichao@loongson.cn List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: EEpiaz1CfM2OTNhw8FVisPDix7686176AA= Content-Type: multipart/alternative; boundary="------------227lflakzKgqQ5u6XXnth5BX" X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=c9SuMdnF; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io; dmarc=none --------------227lflakzKgqQ5u6XXnth5BX Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Hi Pedro, I think this size is the CPU IO or PCI IO space width, like you saied, LoongArch doesn't mapped the IO ports, but it has IO area. For example, it can map the LPC IO or PCI IO ports onto the physical addres space and register the CPU IO or PCI IO protocols to access them. The *Loongson.dsc* of edk2-platforms sets this value to 32. I think this value is too wide since most IO device only use 16-bit width, so I changed this value from 32 to 16 at this point. Thanks, Chao On 2023/11/16 16:15, Pedro Falcato wrote: > On Wed, Nov 15, 2023 at 6:55 PM Leif Lindholm wrote: >> On 2023-11-06 03:29, Chao Li wrote: >>> Added LoongArch64 architecture CPU IO width. >>> >>> https://bugzilla.tianocore.org/show_bug.cgi?id=4584 >>> >>> Cc: Leif Lindholm >>> Cc: Ard Biesheuvel >>> Cc: Abner Chang >>> Cc: Daniel Schaefer >>> Signed-off-by: Chao Li >> Reviewed-by: Leif Lindholm >> >> I note that as a result of this we are now definining this token >> individually for 5 different architectures, in order to provide two >> different default values. We should probably look at consolidating >> those, but that responsibility doesn't have to land on this set. >> >> / >> Leif >> >>> --- >>> EmbeddedPkg/EmbeddedPkg.dec | 3 +++ >>> 1 file changed, 3 insertions(+) >>> >>> diff --git a/EmbeddedPkg/EmbeddedPkg.dec b/EmbeddedPkg/EmbeddedPkg.dec >>> index 341ef5e6a6..241d4f3acc 100644 >>> --- a/EmbeddedPkg/EmbeddedPkg.dec >>> +++ b/EmbeddedPkg/EmbeddedPkg.dec >>> @@ -165,6 +165,9 @@ >>> [PcdsFixedAtBuild.X64] >>> gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|16|UINT8|0x00000011 >>> >>> +[PcdsFixedAtBuild.LOONGARCH64] >>> + gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|16|UINT8|0x00000011 >>> + > Leif, > > Can you clarify the meaning of PcdPrePiCpuIoSize? I was thinking it's > supposed to be the size of the port-mapped IO for the > architecture/platform (as hinted by in X64 = IA32 = 16, and ARM=0), > but from a quick git grep I can tell that > 1) most platforms define it to something else (ArmVirt defines it to > 16, real platforms have a plethora of other values) > 2) gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize has no internal consumer > in EmbeddedPkg, but only in ArmPlatformPkg and LoongArchQemuPkg (and > BeagleBoardPkg's PrePi) > 3) Platform/Loongson/LoongArchQemuPkg/Loongson.dec: > gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|0|UINT8|0x00010001 <-- ?? > > and FWIW, LoongArch does not seem to have port-mapped IO at all. > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#111306): https://edk2.groups.io/g/devel/message/111306 Mute This Topic: https://groups.io/mt/102413876/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=-=-=-=-=-=-=-=-=-=-=- --------------227lflakzKgqQ5u6XXnth5BX Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: 8bit Re: [edk2-devel] [PATCH v2 15/30] EmbeddedPkg: Add PcdPrePiCpuIoSize width for LOONGARCH64

Hi Pedro,

I think this size is the CPU IO or PCI IO space width, like you saied, LoongArch doesn't mapped the IO ports, but it has IO area.

For example, it can map the LPC IO or PCI IO ports onto the physical addres space and register the CPU IO or PCI IO protocols to access them.

The Loongson.dsc of edk2-platforms sets this value to 32. I think this value is too wide since most IO device only use 16-bit width, so I changed this value from 32 to 16 at this point.


Thanks,
Chao
On 2023/11/16 16:15, Pedro Falcato wrote:
On Wed, Nov 15, 2023 at 6:55 PM Leif Lindholm <quic_llindhol@quicinc.com> wrote:

On 2023-11-06 03:29, Chao Li wrote:

Added LoongArch64 architecture CPU IO width.

https://bugzilla.tianocore.org/show_bug.cgi?id=4584

Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Abner Chang <abner.chang@amd.com>
Cc: Daniel Schaefer <git@danielschaefer.me>
Signed-off-by: Chao Li <lichao@loongson.cn>

Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>

I note that as a result of this we are now definining this token
individually for 5 different architectures, in order to provide two
different default values. We should probably look at consolidating
those, but that responsibility doesn't have to land on this set.

/
     Leif


---
  EmbeddedPkg/EmbeddedPkg.dec | 3 +++
  1 file changed, 3 insertions(+)

diff --git a/EmbeddedPkg/EmbeddedPkg.dec b/EmbeddedPkg/EmbeddedPkg.dec
index 341ef5e6a6..241d4f3acc 100644
--- a/EmbeddedPkg/EmbeddedPkg.dec
+++ b/EmbeddedPkg/EmbeddedPkg.dec
@@ -165,6 +165,9 @@
  [PcdsFixedAtBuild.X64]
    gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|16|UINT8|0x00000011

+[PcdsFixedAtBuild.LOONGARCH64]
+  gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|16|UINT8|0x00000011
+

Leif,

Can you clarify the meaning of PcdPrePiCpuIoSize? I was thinking it's
supposed to be the size of the port-mapped IO for the
architecture/platform (as hinted by in X64 = IA32 = 16, and ARM=0),
but from a quick git grep I can tell that
1) most platforms define it to something else (ArmVirt defines it to
16, real platforms have a plethora of other values)
2) gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize has no internal consumer
in EmbeddedPkg, but only in ArmPlatformPkg and LoongArchQemuPkg (and
BeagleBoardPkg's PrePi)
3) Platform/Loongson/LoongArchQemuPkg/Loongson.dec:
gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|0|UINT8|0x00010001 <-- ??

and FWIW, LoongArch does not seem to have port-mapped IO at all.
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