From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id E9FAA82182 for ; Thu, 23 Feb 2017 08:19:11 -0800 (PST) Received: from int-mx13.intmail.prod.int.phx2.redhat.com (int-mx13.intmail.prod.int.phx2.redhat.com [10.5.11.26]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 7B27BC00169A; Thu, 23 Feb 2017 16:19:12 +0000 (UTC) Received: from lacos-laptop-7.usersys.redhat.com (ovpn-116-58.phx2.redhat.com [10.3.116.58]) by int-mx13.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id v1NGJAKO001962; Thu, 23 Feb 2017 11:19:11 -0500 To: Ard Biesheuvel , edk2-devel@ml01.01.org, leif.lindholm@linaro.org References: <1487864885-13485-1-git-send-email-ard.biesheuvel@linaro.org> Cc: ryan.harkin@linaro.org From: Laszlo Ersek Message-ID: <0589ce43-099a-af16-ae44-6060eb60293e@redhat.com> Date: Thu, 23 Feb 2017 17:19:09 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.7.1 MIME-Version: 1.0 In-Reply-To: <1487864885-13485-1-git-send-email-ard.biesheuvel@linaro.org> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.26 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.31]); Thu, 23 Feb 2017 16:19:12 +0000 (UTC) Subject: Re: [PATCH 1/2] ArmPkg: remove DebugUncachedMemoryAllocationLib X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 23 Feb 2017 16:19:12 -0000 Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit On 02/23/17 16:48, Ard Biesheuvel wrote: > The debug implementation of the UncachedMemoryAllocationLib library > class relies on the creation of an uncached alias of a memory range, > while keeping the original cached mapping, but with read-only attributes > to trap inadvertent write accesses. > > This is not a terribly good idea, given that the ARM architecture does > not allow mismatched attributes, and so creating them deliberately is > not something we should encourage by doing it in reference code. > > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Ard Biesheuvel > --- > ArmPkg/ArmPkg.dsc | 1 - > ArmPkg/Library/DebugUncachedMemoryAllocationLib/DebugUncachedMemoryAllocationLib.c | 656 -------------------- > ArmPkg/Library/DebugUncachedMemoryAllocationLib/DebugUncachedMemoryAllocationLib.inf | 47 -- > ArmVirtPkg/ArmVirt.dsc.inc | 2 - > BeagleBoardPkg/BeagleBoardPkg.dsc | 1 - > Omap35xxPkg/Omap35xxPkg.dsc | 3 +- > 6 files changed, 1 insertion(+), 709 deletions(-) Acked-by: Laszlo Ersek