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From: "gaoliming via groups.io" <gaoliming=byosoft.com.cn@groups.io>
To: <devel@edk2.groups.io>, <ian.chiu@intel.com>
Cc: "'Hao A Wu'" <hao.a.wu@intel.com>, "'Ray Ni'" <ray.ni@intel.com>,
	"'More Shih'" <more.shih@intel.com>
Subject: 回复: [edk2-devel] [PATCH] MdeModulePkg/XhciDxe: Increase 1ms extra delay for xHCI issue HCRST
Date: Thu, 28 Mar 2024 09:12:36 +0800	[thread overview]
Message-ID: <062801da80ad$05985da0$10c918e0$@byosoft.com.cn> (raw)
In-Reply-To: <20240314133945.3018-1-ian.chiu@intel.com>

Seemly, this change has no other impact. I agree this change. 

Thanks
Liming
> -----邮件原件-----
> 发件人: devel@edk2.groups.io <devel@edk2.groups.io> 代表 Chiu, Ian
> 发送时间: 2024年3月14日 21:40
> 收件人: devel@edk2.groups.io
> 抄送: Ian Chiu <ian.chiu@intel.com>; Hao A Wu <hao.a.wu@intel.com>; Ray
> Ni <ray.ni@intel.com>; More Shih <more.shih@intel.com>
> 主题: [edk2-devel] [PATCH] MdeModulePkg/XhciDxe: Increase 1ms extra
> delay for xHCI issue HCRST
> 
> From: Ian Chiu <ian.chiu@intel.com>
> 
> https://bugzilla.tianocore.org/show_bug.cgi?id=4727
> 
> More and more XHCI host controllers require to have extra 1ms
> delay before accessing any MMIO register during reset.
> 
> Since PHY transition from P3 to P0 can take around 1.3ms and
> the xHCI reset can take around 1.5ms.
> 
> Hence, need delay increase between issuing HCRST on xHCI
> controller till first MMIO read for reset completion check.
> 
> Cc: Hao A Wu     <hao.a.wu@intel.com>
> Cc: Ray Ni       <ray.ni@intel.com>
> Cc: More Shih    <more.shih@intel.com>
> Signed-off-by: Ian Chiu <ian.chiu@intel.com>
> ---
>  MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c
> b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c
> index 40f2f1f227..eafe4b0d11 100644
> --- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c
> +++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c
> @@ -861,10 +861,11 @@ XhcResetHC (
>      XhcSetOpRegBit (Xhc, XHC_USBCMD_OFFSET, XHC_USBCMD_RESET);
> 
>      //
> 
>      // Some XHCI host controllers require to have extra 1ms delay before
> accessing any MMIO register during reset.
> 
> +    // PHY transition from P3 to P0 can take around 1.3ms and the xHCI
> reset can take around 1.5ms.
> 
>      // Otherwise there may have the timeout case happened.
> 
> -    // The below is a workaround to solve such problem.
> 
> +    // Stall for 2ms workaround to solve such problem.
> 
>      //
> 
> -    gBS->Stall (XHC_1_MILLISECOND);
> 
> +    gBS->Stall (XHC_1_MILLISECOND*2);
> 
>      Status = XhcWaitOpRegBit (Xhc, XHC_USBCMD_OFFSET,
> XHC_USBCMD_RESET, FALSE, Timeout);
> 
> 
> 
>      if (!EFI_ERROR (Status)) {
> 
> --
> 2.38.1.windows.1
> 
> 
> 
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      reply	other threads:[~2024-03-28  1:12 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-14 13:39 [edk2-devel] [PATCH] MdeModulePkg/XhciDxe: Increase 1ms extra delay for xHCI issue HCRST Chiu, Ian
2024-03-28  1:12 ` gaoliming via groups.io [this message]

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