From: "Shi, Steven" <steven.shi@intel.com>
To: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: edk2-devel-01 <edk2-devel@lists.01.org>,
"Gao, Liming" <liming.gao@intel.com>,
"afish@apple.com" <afish@apple.com>,
"Justen, Jordan L" <jordan.l.justen@intel.com>,
"Kinney, Michael D" <michael.d.kinney@intel.com>
Subject: Re: [PATCH v2 2/7] BaseTools-GenFw:Add new x86_64 Elf relocation types for PIC/PIE code
Date: Sun, 31 Jul 2016 03:08:34 +0000 [thread overview]
Message-ID: <06C8AB66E78EE34A949939824ABE2B31033813C8@shsmsx102.ccr.corp.intel.com> (raw)
In-Reply-To: <CAKv+Gu9fM70W7yGsO4DoSe31Cyo=xLCh+W_FQ1rY5pWe5R=9LA@mail.gmail.com>
> OK. Could we do that in a separate patch?
[Steven]: Yes. We could separate it in a new patch.
> >> Is this necessary? I would expect the GOT entry itself to be already
> >> covered by a R_X86_64_64 relocation, so I don't think there is a need
> >> to emit a EFI_IMAGE_REL_BASED_DIR64 PE/COFF reloc here.
> > [Steven]: Do you ask whether it is still necessary to support the
> GOTPCREL/GOTPCRELX/REX_GOTPCRELX new relocation types? I think they
> are nice to have now, since new type support has no impact to old ones, we
> could just leave the code there for reference.
>
> No. The question is whether it is necessary to emit the
> EFI_IMAGE_REL_BASED_DIR64 fixup reloc here. The relocation place is
> the instruction, not the GOT entry, and I would expect the GOT entry
> to be covered by a R_X86_64_64 relocation already
[Steven]: Yes, it is necessary. Even the R_X86_64_64 relocation need to emit the EFI_IMAGE_REL_BASED_DIR64 fixup reloc like below in the original GenFw code. You can test it like this, remove the below CoffAddFixup() code and build the OVMF with GCC5, you will see the Ovmf boot failure with cpu exception.
case R_X86_64_64:
VerboseMsg ("EFI_IMAGE_REL_BASED_DIR64 Offset: 0x%08X",
mCoffSectionsOffset[RelShdr->sh_info] + (Rel->r_offset - SecShdr->sh_addr));
CoffAddFixup(
(UINT32) ((UINT64) mCoffSectionsOffset[RelShdr->sh_info]
+ (Rel->r_offset - SecShdr->sh_addr)),
EFI_IMAGE_REL_BASED_DIR64);
Steven Shi
Intel\SSG\STO\UEFI Firmware
Tel: +86 021-61166522
iNet: 821-6522
next prev parent reply other threads:[~2016-07-31 3:08 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1467967364-11556-1-git-send-email-steven.shi@intel.com>
[not found] ` <1467967364-11556-3-git-send-email-steven.shi@intel.com>
2016-07-30 9:25 ` [PATCH v2 2/7] BaseTools-GenFw:Add new x86_64 Elf relocation types for PIC/PIE code Ard Biesheuvel
2016-07-30 14:09 ` Shi, Steven
2016-07-30 14:11 ` Ard Biesheuvel
2016-07-31 3:08 ` Shi, Steven [this message]
2016-07-31 5:42 ` Ard Biesheuvel
2016-07-31 19:10 ` Ard Biesheuvel
2016-08-01 4:39 ` Shi, Steven
2016-08-01 5:58 ` Ard Biesheuvel
2016-08-01 6:13 ` Shi, Steven
2016-08-01 6:43 ` Ard Biesheuvel
2016-08-01 7:19 ` Shi, Steven
2016-08-01 7:25 ` Ard Biesheuvel
2016-08-01 7:54 ` Shi, Steven
2016-08-01 8:00 ` Ard Biesheuvel
2016-08-01 8:28 ` Shi, Steven
[not found] ` <06C8AB66E78EE34A949939824ABE2B31033825EE@shsmsx102.ccr.corp.intel.com>
[not found] ` <CAKv+Gu80u+CJLVtD5tTo5RrJb7LH0Qfnbj=7b7NUqrbf2aOPrA@mail.gmail.com>
[not found] ` <06C8AB66E78EE34A949939824ABE2B31033826FE@shsmsx102.ccr.corp.intel.com>
[not found] ` <CAKv+Gu9MSisR1T_jr=DNyCs24We5=2vUgQZJ9t_rZmCYC8qvHg@mail.gmail.com>
[not found] ` <06C8AB66E78EE34A949939824ABE2B310338275F@shsmsx102.ccr.corp.intel.com>
2016-08-01 10:46 ` Ard Biesheuvel
2016-08-02 11:40 ` Shi, Steven
2016-08-02 12:00 ` Ard Biesheuvel
2016-08-03 20:13 ` Jordan Justen
2016-08-03 20:47 ` Ard Biesheuvel
2016-08-03 20:53 ` Jordan Justen
2016-08-03 20:55 ` Ard Biesheuvel
2016-08-03 23:26 ` Shi, Steven
2016-08-03 20:55 ` Nicolas Owens
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