From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by ml01.01.org (Postfix) with ESMTP id A3DB41A1E00 for ; Thu, 4 Aug 2016 01:54:07 -0700 (PDT) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga103.jf.intel.com with ESMTP; 04 Aug 2016 01:54:07 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.28,469,1464678000"; d="scan'208";a="859530324" Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by orsmga003.jf.intel.com with ESMTP; 04 Aug 2016 01:54:07 -0700 Received: from fmsmsx112.amr.corp.intel.com (10.18.116.6) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.248.2; Thu, 4 Aug 2016 01:54:07 -0700 Received: from shsmsx103.ccr.corp.intel.com (10.239.4.69) by FMSMSX112.amr.corp.intel.com (10.18.116.6) with Microsoft SMTP Server (TLS) id 14.3.248.2; Thu, 4 Aug 2016 01:54:06 -0700 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.147]) by SHSMSX103.ccr.corp.intel.com ([169.254.4.181]) with mapi id 14.03.0248.002; Thu, 4 Aug 2016 16:54:04 +0800 From: "Shi, Steven" To: Ard Biesheuvel , "Zhu, Yonghong" , "Gao, Liming" , "Justen, Jordan L" , "edk2-devel@lists.01.org" Thread-Topic: [PATCH] BaseTools X64: fold PLT relocations into simple relative references Thread-Index: AQHR7iyl/qyvoM6ZhE+AFXtKIfx336A4fecw Date: Thu, 4 Aug 2016 08:54:04 +0000 Message-ID: <06C8AB66E78EE34A949939824ABE2B31033853AB@shsmsx102.ccr.corp.intel.com> References: <1470300343-17287-1-git-send-email-ard.biesheuvel@linaro.org> In-Reply-To: <1470300343-17287-1-git-send-email-ard.biesheuvel@linaro.org> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiYTM4YWZlZTgtYmQ1NC00YjhhLTk3YjYtODc4MTAyODA1NjFmIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE1LjkuNi42IiwiVHJ1c3RlZExhYmVsSGFzaCI6IjFoN3ZYM1dVN1d0bUZWSUhzdXFTdzczT0VjMzd2Myt3RTdtYTdnXC9SK1FnPSJ9 x-ctpclassification: CTP_IC x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH] BaseTools X64: fold PLT relocations into simple relative references X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 04 Aug 2016 08:54:07 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hi Ard, I don't see you add below code for case R_X86_64_PLT32. Is it right? *(UINT32 *)Targ =3D (UINT32) (*(UINT32 *)Targ + (mCoffSectionsOffset[Sym->st_shndx] - SymShdr->sh_addr) - (SecOffset - SecShdr->sh_addr)); Steven Shi Intel\SSG\STO\UEFI Firmware Tel: +86 021-61166522 iNet: 821-6522 > -----Original Message----- > From: Ard Biesheuvel [mailto:ard.biesheuvel@linaro.org] > Sent: Thursday, August 04, 2016 4:46 PM > To: Shi, Steven ; Zhu, Yonghong > ; Gao, Liming ; Justen, > Jordan L ; edk2-devel@lists.01.org > Cc: mischief@offblast.org; Ard Biesheuvel > Subject: [PATCH] BaseTools X64: fold PLT relocations into simple relative > references >=20 > For X64/GCC, we use position independent code with hidden visibility > to inform the compiler that symbols references are never resolved at > runtime, which removes the need for PLTs and GOTs. However, in some > cases GCC has been reported to still emit PLT based relocations, which > we need to handle in the ELF to PE/COFF perform by GenFw. >=20 > Unlike GOT based relocations, which are non-trivial to handle since the > indirections in the code can not be fixed up easily (although relocation > types exist for X64 that annotate relocation targets as suitable for > relaxation), PLT relocations simply point to jump targets, and we can > relax such relocations by resolving them using the symbol directly rather > than via a PLT entry that does nothing more than tail call the function > we already know it is going to call (since all symbol references are > resolved in the same module). >=20 > So handle R_X86_64_PLT32 as a R_X86_64_PC32 relocation. >=20 > Suggested-by: Steven Shi > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Ard Biesheuvel > --- > BaseTools/Source/C/GenFw/Elf64Convert.c | 11 +++++++++++ > 1 file changed, 11 insertions(+) >=20 > diff --git a/BaseTools/Source/C/GenFw/Elf64Convert.c > b/BaseTools/Source/C/GenFw/Elf64Convert.c > index 944c94b8f8b4..7cbff0df0996 100644 > --- a/BaseTools/Source/C/GenFw/Elf64Convert.c > +++ b/BaseTools/Source/C/GenFw/Elf64Convert.c > @@ -785,6 +785,17 @@ WriteSections64 ( > *(INT32 *)Targ =3D (INT32)((INT64)(*(INT32 *)Targ) - SymShdr= ->sh_addr > + mCoffSectionsOffset[Sym->st_shndx]); > VerboseMsg ("Relocation: 0x%08X", *(UINT32*)Targ); > break; > + > + case R_X86_64_PLT32: > + // > + // Treat R_X86_64_PLT32 relocations as R_X86_64_PC32: this i= s > + // possible since we know all code symbol references resolve= to > + // definitions in the same module (UEFI has no shared librar= ies), > + // and so there is never a reason to jump via a PLT entry, > + // allowing us to resolve the reference using the symbol dir= ectly. > + // > + VerboseMsg ("Treating R_X86_64_PLT32 as R_X86_64_PC32 ..."); > + /* fall through */ > case R_X86_64_PC32: > // > // Relative relocation: Symbol - Ip + Addend > -- > 2.7.4