Re: [Patch] UefiCpuPkg/S3Resume2Pei: disable paging before creating new page table.

["Ni, Ruiyu" <ruiyu.ni@Intel.com>]

On 10/9/2018 10:05 AM, Dong, Eric wrote:
> Add BZ link for this issue: https://bugzilla.tianocore.org/show_bug.cgi?id=1232
> 
> Thanks,
> Eric
> 
>> -----Original Message-----
>> From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of
>> Eric Dong
>> Sent: Tuesday, October 9, 2018 9:51 AM
>> To: edk2-devel@lists.01.org
>> Cc: Ni, Ruiyu <ruiyu.ni@intel.com>; Laszlo Ersek <lersek@redhat.com>
>> Subject: [edk2] [Patch] UefiCpuPkg/S3Resume2Pei: disable paging before
>> creating new page table.
>>
>> PEI Stack Guard needs to enable paging. This might cause #GP in the
>> transition from 32-bit PEI to 64-bit SMM due to the code trying to write CR3
>> register with PML4 page table while the processor is enabled with PAE paging.
>>
>> Simply disabling paging before updating CR3 can solve this conflict.
>>
>> Change-Id: I99bfdba5daa48a95a4c4ef97eeca1af086558957
>> Cc: Ruiyu Ni <ruiyu.ni@intel.com>
>> Cc: Laszlo Ersek <lersek@redhat.com>
>> Cc: Jian J Wang <jian.j.wang@intel.com>
>> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-
>> by:Eric Dong <eric.dong@intel.com>
>> Signed-off-by: Eric Dong <eric.dong@intel.com>
>> ---
>>   UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c       | 7 +++++++
>>   UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf | 1 +
>>   2 files changed, 8 insertions(+)
>>
>> diff --git a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c
>> b/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c
>> index f164c1713b..b3bf56e13d 100644
>> --- a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c
>> +++ b/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c
>> @@ -1105,6 +1105,13 @@ S3RestoreConfig2 (
>>         //
>>         SetInterruptState (InterruptStatus);
>>
>> +      if (PcdGetBool (PcdCpuStackGuard)) {
>> +        //
>> +        // Paging already been enabled, to avoid conflict configuration,
>> +        // disable paging first anyway.
>> +        //
>> +        AsmWriteCr0 (AsmReadCr0 () & (~BIT31));
>> +      }

Two comments:
1. We'd better not map the PcdCpuStackGuard to paging-enable. Maybe some 
other feature also enables the paging in PEI phase but the 
PcdCpuStackGuard is FALSE.
2. When PEI is in 64bit mode, disabling paging may not work because 
paging-enable is a must in 64bit mode.

>>         AsmWriteCr3 ((UINTN)SmmS3ResumeState->SmmS3Cr3);
>>
>>         //
>> diff --git a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
>> b/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
>> index 6ce1bf944c..0f131d19df 100644
>> --- a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
>> +++ b/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
>> @@ -90,6 +90,7 @@
>>   [Pcd]
>>     gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable  ##
>> SOMETIMES_CONSUMES
>>
>> gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrM
>> ask    ## CONSUMES
>> +  gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard                       ##
>> CONSUMES
>>
>>   [Depex]
>>     TRUE
>> --
>> 2.15.0.windows.1
>>
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-- 
Thanks,
Ray