From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id DA713817E2 for ; Thu, 5 Jan 2017 02:36:21 -0800 (PST) Received: from int-mx13.intmail.prod.int.phx2.redhat.com (int-mx13.intmail.prod.int.phx2.redhat.com [10.5.11.26]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 668E08FCF8; Thu, 5 Jan 2017 10:36:22 +0000 (UTC) Received: from lacos-laptop-7.usersys.redhat.com (ovpn-116-100.phx2.redhat.com [10.3.116.100]) by int-mx13.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id v05AaKxX029963; Thu, 5 Jan 2017 05:36:21 -0500 To: Anthony PERARD , edk2-devel@ml01.01.org, xen-devel@lists.xenproject.org References: <20161208153340.2285-1-anthony.perard@citrix.com> <20161208153340.2285-8-anthony.perard@citrix.com> From: Laszlo Ersek Message-ID: <081da4b3-31bb-b28f-79c9-0ace3f5ef1a8@redhat.com> Date: Thu, 5 Jan 2017 11:36:19 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.6.0 MIME-Version: 1.0 In-Reply-To: <20161208153340.2285-8-anthony.perard@citrix.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.26 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Thu, 05 Jan 2017 10:36:22 +0000 (UTC) Subject: Re: [PATCH RFC 07/14] OvmfPkg/XenResetVector: Add new entry point for Xen PVH X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 05 Jan 2017 10:36:22 -0000 Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit On 12/08/16 16:33, Anthony PERARD wrote: > This one enter directly in 32bits > > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Anthony PERARD > --- > OvmfPkg/XenResetVector/Ia16/ResetVectorVtf0.asm | 79 +++++++++++++++++++++++++ > OvmfPkg/XenResetVector/Ia32/XenPVHMain.asm | 23 +++++++ > OvmfPkg/XenResetVector/XenResetVector.nasmb | 1 + > 3 files changed, 103 insertions(+) > create mode 100644 OvmfPkg/XenResetVector/Ia16/ResetVectorVtf0.asm > create mode 100644 OvmfPkg/XenResetVector/Ia32/XenPVHMain.asm (1) The new file "XenPVHMain.asm" is missing a license block (incl. a Citrix copyright notice). (2) You might want to add a similar (C) to the other new file, "ResetVectorVtf0.asm", as well. Thanks Laszlo > diff --git a/OvmfPkg/XenResetVector/Ia16/ResetVectorVtf0.asm b/OvmfPkg/XenResetVector/Ia16/ResetVectorVtf0.asm > new file mode 100644 > index 0000000..70436d8 > --- /dev/null > +++ b/OvmfPkg/XenResetVector/Ia16/ResetVectorVtf0.asm > @@ -0,0 +1,79 @@ > +;------------------------------------------------------------------------------ > +; @file > +; First code executed by processor after resetting. > +; > +; Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.
> +; This program and the accompanying materials > +; are licensed and made available under the terms and conditions of the BSD License > +; which accompanies this distribution. The full text of the license may be found at > +; http://opensource.org/licenses/bsd-license.php > +; > +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. > +; > +;------------------------------------------------------------------------------ > + > +BITS 16 > + > +ALIGN 16 > + > +; > +; Pad the image size to 4k when page tables are in VTF0 > +; > +; If the VTF0 image has page tables built in, then we need to make > +; sure the end of VTF0 is 4k above where the page tables end. > +; > +; This is required so the page tables will be 4k aligned when VTF0 is > +; located just below 0x100000000 (4GB) in the firmware device. > +; > +%ifdef ALIGN_TOP_TO_4K_FOR_PAGING > + TIMES (0x1000 - ($ - EndOfPageTables) - (fourGigabytes - xenPVHEntryPoint)) DB 0 > +%endif > + > +BITS 32 > +xenPVHEntryPoint: > +; this is probably 0xffffffd0 > + jmp xenPVHMain > + > +BITS 16 > +ALIGN 16 > + > +applicationProcessorEntryPoint: > +; > +; Application Processors entry point > +; > +; GenFv generates code aligned on a 4k boundary which will jump to this > +; location. (0xffffffe0) This allows the Local APIC Startup IPI to be > +; used to wake up the application processors. > +; > + jmp EarlyApInitReal16 > + > +ALIGN 8 > + > + DD 0 > + > +; > +; The VTF signature > +; > +; VTF-0 means that the VTF (Volume Top File) code does not require > +; any fixups. > +; > +vtfSignature: > + DB 'V', 'T', 'F', 0 > + > +ALIGN 16 > + > +resetVector: > +; > +; Reset Vector > +; > +; This is where the processor will begin execution > +; > + nop > + nop > + jmp EarlyBspInitReal16 > + > +ALIGN 16 > + > +fourGigabytes: > + > diff --git a/OvmfPkg/XenResetVector/Ia32/XenPVHMain.asm b/OvmfPkg/XenResetVector/Ia32/XenPVHMain.asm > new file mode 100644 > index 0000000..eb12f6c > --- /dev/null > +++ b/OvmfPkg/XenResetVector/Ia32/XenPVHMain.asm > @@ -0,0 +1,23 @@ > +BITS 32 > + > +xenPVHMain: > + mov di, 'BP' > + > + cli > + mov ebx, ADDR_OF(gdtr) > + lgdt [ebx] > + mov eax, SEC_DEFAULT_CR0 > + mov cr0, eax > + jmp LINEAR_CODE_SEL:ADDR_OF(jmpHerePVH) > +jmpHerePVH: > + mov eax, SEC_DEFAULT_CR4 > + mov cr4, eax > + > + mov ax, LINEAR_SEL > + mov ds, ax > + mov es, ax > + mov fs, ax > + mov gs, ax > + mov ss, ax > + > + OneTimeCallRet TransitionFromReal16To32BitFlat > diff --git a/OvmfPkg/XenResetVector/XenResetVector.nasmb b/OvmfPkg/XenResetVector/XenResetVector.nasmb > index 31ac06a..f9812fd 100644 > --- a/OvmfPkg/XenResetVector/XenResetVector.nasmb > +++ b/OvmfPkg/XenResetVector/XenResetVector.nasmb > @@ -61,6 +61,7 @@ > %include "Ia16/Init16.asm" > > %include "Main.asm" > +%include "Ia32/XenPVHMain.asm" > > %include "Ia16/ResetVectorVtf0.asm" > >