From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.126; helo=mga18.intel.com; envelope-from=bob.c.feng@intel.com; receiver=edk2-devel@lists.01.org Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 6E713211A1E4D for ; Thu, 27 Dec 2018 21:52:00 -0800 (PST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 27 Dec 2018 21:52:00 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,408,1539673200"; d="scan'208";a="101944155" Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by orsmga007.jf.intel.com with ESMTP; 27 Dec 2018 21:52:00 -0800 Received: from fmsmsx119.amr.corp.intel.com (10.18.124.207) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.408.0; Thu, 27 Dec 2018 21:51:59 -0800 Received: from shsmsx103.ccr.corp.intel.com (10.239.4.69) by FMSMSX119.amr.corp.intel.com (10.18.124.207) with Microsoft SMTP Server (TLS) id 14.3.408.0; Thu, 27 Dec 2018 21:51:58 -0800 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.196]) by SHSMSX103.ccr.corp.intel.com ([169.254.4.150]) with mapi id 14.03.0415.000; Fri, 28 Dec 2018 13:51:40 +0800 From: "Feng, Bob C" To: "Chiu, Chasel" , "edk2-devel@lists.01.org" CC: "Gao, Liming" , "Zhu, Yonghong" , "Feng, Bob C" Thread-Topic: [PATCH] BaseTools/GenFv: Support SecCore and PeiCore in different FV Thread-Index: AQHUnSN/XQPNxTgWSECPIAeSu+ER+6WTqEkA Date: Fri, 28 Dec 2018 05:51:39 +0000 Message-ID: <08650203BA1BD64D8AD9B6D5D74A85D160045FB4@SHSMSX101.ccr.corp.intel.com> References: <20181226140049.14228-1-chasel.chiu@intel.com> In-Reply-To: <20181226140049.14228-1-chasel.chiu@intel.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH] BaseTools/GenFv: Support SecCore and PeiCore in different FV X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 28 Dec 2018 05:52:02 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable This patch looks good to me. Reviewed-by: Bob Feng -----Original Message----- From: Chiu, Chasel=20 Sent: Wednesday, December 26, 2018 10:01 PM To: edk2-devel@lists.01.org Cc: Feng, Bob C ; Gao, Liming ;= Zhu, Yonghong ; Chiu, Chasel Subject: [PATCH] BaseTools/GenFv: Support SecCore and PeiCore in different = FV REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1423 There is usage model that SecCore and PeiCore are in different FVs. Update BaseTools to support this usage model. Test: Verified on internal platform with the case SecCore and PeiCore in di= fferent FVs and built/booted successfully. Cc: Bob Feng Cc: Liming Gao Cc: Yonghong Zhu Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Chasel Chiu --- BaseTools/Source/C/GenFv/GenFvInternalLib.c | 82 +++++++++++++++++++++++++= ++++++++++++++++----------------------------------------- 1 file changed, 41 insertions(+), 41 deletions(-) diff --git a/BaseTools/Source/C/GenFv/GenFvInternalLib.c b/BaseTools/Source= /C/GenFv/GenFvInternalLib.c index 6a874f4e94..32bbcce0a6 100644 --- a/BaseTools/Source/C/GenFv/GenFvInternalLib.c +++ b/BaseTools/Source/C/GenFv/GenFvInternalLib.c @@ -1655,43 +1655,42 @@ Returns: // // Find the PEI Core // + PeiCorePhysicalAddress =3D 0; Status =3D GetFileByType (EFI_FV_FILETYPE_PEI_CORE, 1, &PeiCoreFile); - if (EFI_ERROR (Status) || PeiCoreFile =3D=3D NULL) { - Error (NULL, 0, 3000, "Invalid", "could not find the PEI core in the F= V."); - return EFI_ABORTED; - } - // - // PEI Core found, now find PE32 or TE section - // - Status =3D GetSectionByType (PeiCoreFile, EFI_SECTION_PE32, 1, &Pe32Sect= ion); - if (Status =3D=3D EFI_NOT_FOUND) { - Status =3D GetSectionByType (PeiCoreFile, EFI_SECTION_TE, 1, &Pe32Sect= ion); - } + if (!EFI_ERROR (Status) && (PeiCoreFile !=3D NULL)) { + // + // PEI Core found, now find PE32 or TE section + // + Status =3D GetSectionByType (PeiCoreFile, EFI_SECTION_PE32, 1, &Pe32Se= ction); + if (Status =3D=3D EFI_NOT_FOUND) { + Status =3D GetSectionByType (PeiCoreFile, EFI_SECTION_TE, 1, &Pe32Se= ction); + } =20 - if (EFI_ERROR (Status)) { - Error (NULL, 0, 3000, "Invalid", "could not find either a PE32 or a TE= section in PEI core file."); - return EFI_ABORTED; - } + if (EFI_ERROR (Status)) { + Error (NULL, 0, 3000, "Invalid", "could not find either a PE32 or a = TE section in PEI core file."); + return EFI_ABORTED; + } =20 - SecHeaderSize =3D GetSectionHeaderLength(Pe32Section.CommonHeader); - Status =3D GetPe32Info ( - (VOID *) ((UINTN) Pe32Section.Pe32Section + SecHeaderSize), - &EntryPoint, - &BaseOfCode, - &MachineType - ); + SecHeaderSize =3D GetSectionHeaderLength(Pe32Section.CommonHeader); + Status =3D GetPe32Info ( + (VOID *) ((UINTN) Pe32Section.Pe32Section + SecHeaderSize), + &EntryPoint, + &BaseOfCode, + &MachineType + ); =20 - if (EFI_ERROR (Status)) { - Error (NULL, 0, 3000, "Invalid", "could not get the PE32 entry point f= or the PEI core."); - return EFI_ABORTED; + if (EFI_ERROR (Status)) { + Error (NULL, 0, 3000, "Invalid", "could not get the PE32 entry point= for the PEI core."); + return EFI_ABORTED; + } + // + // Physical address is FV base + offset of PE32 + offset of the entry = point + // + PeiCorePhysicalAddress =3D FvInfo->BaseAddress; + PeiCorePhysicalAddress +=3D (UINTN) Pe32Section.Pe32Section + SecHeade= rSize - (UINTN) FvImage->FileImage; + PeiCorePhysicalAddress +=3D EntryPoint; + DebugMsg (NULL, 0, 9, "PeiCore physical entry point address",=20 + "Address =3D 0x%llX", (unsigned long long) PeiCorePhysicalAddress); } - // - // Physical address is FV base + offset of PE32 + offset of the entry po= int - // - PeiCorePhysicalAddress =3D FvInfo->BaseAddress; - PeiCorePhysicalAddress +=3D (UINTN) Pe32Section.Pe32Section + SecHeaderS= ize - (UINTN) FvImage->FileImage; - PeiCorePhysicalAddress +=3D EntryPoint; - DebugMsg (NULL, 0, 9, "PeiCore physical entry point address", "Address = =3D 0x%llX", (unsigned long long) PeiCorePhysicalAddress); =20 if (MachineType =3D=3D EFI_IMAGE_MACHINE_IA64) { // @@ -1749,16 +1748,17 @@ Returns: *SecCoreEntryAddressPtr =3D SecCorePhysicalAddress; =20 } else if (MachineType =3D=3D EFI_IMAGE_MACHINE_IA32 || MachineType =3D= =3D EFI_IMAGE_MACHINE_X64) { - // - // Get the location to update - // - Ia32ResetAddressPtr =3D (UINT32 *) ((UINTN) FvImage->Eof - IA32_PEI_C= ORE_ENTRY_OFFSET); - - // - // Write lower 32 bits of physical address for Pei Core entry - // - *Ia32ResetAddressPtr =3D (UINT32) PeiCorePhysicalAddress; + if (PeiCorePhysicalAddress !=3D 0) { + // + // Get the location to update + // + Ia32ResetAddressPtr =3D (UINT32 *) ((UINTN) FvImage->Eof -=20 + IA32_PEI_CORE_ENTRY_OFFSET); =20 + // + // Write lower 32 bits of physical address for Pei Core entry + // + *Ia32ResetAddressPtr =3D (UINT32) PeiCorePhysicalAddress; + } // // Write SecCore Entry point relative address into the jmp instruction= in reset vector. // -- 2.13.3.windows.1