Re: [edk2-devel] [PATCH] PL031: Actually disable interrupts

["Alexander Graf" <graf@amazon.com>]

> Am 11.07.2019 um 19:07 schrieb Laszlo Ersek <lersek@redhat.com>:
> 
>> On 07/10/19 19:13, Leif Lindholm wrote:
>>> On Wed, Jul 10, 2019 at 04:53:11PM +0200, Alexander Graf via Groups.Io wrote:
>>> The PL031 interrupt mask register (IMSC) is not very clearly documented
>>> in the PL031 specification. However, bit 0 (RTCIMSC) indicates whether
>>> interrupts are enabled, not disabled.
>> 
>> 3.3.5. Interrupt Mask Set or Clear register, RTCIMSC
>> ... Writing 1 sets the mask. ...
>> 
>> 3.6. Interrupts
>> ... This interrupt is enabled or disabled by changing the mask bit in
>> RTCIMSC. To enable the interrupt, set bit[0] HIGH. ...
>> 
>> *boggle*
> 
> Heh :)
> 
> Alex, out of interest, what were the symptoms of this issue on your end?
> Spurious interrupt confusing the firmware's exception handler, perhaps?

No symptoms that I've encountered. I just stumbled over it while studying the device and its respective UEFI code :).

But yes, you would see a spurious interrupt once the RTC wraps around to 0, so in 2038. Not that that would matter, as by that time you lost the only wall clock reference available on your ARM system anyway :).


Alex