From: "Lendacky, Thomas" <thomas.lendacky@amd.com>
To: devel@edk2.groups.io
Cc: Jordan Justen <jordan.l.justen@intel.com>,
Laszlo Ersek <lersek@redhat.com>,
Ard Biesheuvel <ard.biesheuvel@linaro.org>,
Michael D Kinney <michael.d.kinney@intel.com>,
Liming Gao <liming.gao@intel.com>,
Eric Dong <eric.dong@intel.com>, Ray Ni <ray.ni@intel.com>,
Brijesh Singh <brijesh.singh@amd.com>
Subject: [RFC PATCH v3 13/43] UefiCpuPkg/CpuExceptionHandler: Add support for NPF NAE events (MMIO)
Date: Wed, 20 Nov 2019 14:06:35 -0600 [thread overview]
Message-ID: <099d821fe084410f0b38ced234dd7b5d10a8981a.1574280425.git.thomas.lendacky@amd.com> (raw)
In-Reply-To: <cover.1574280425.git.thomas.lendacky@amd.com>
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198
Under SEV-ES, a NPF intercept for an NPT entry with a reserved bit set
generates a #VC exception. This condition is assumed to be an MMIO access.
VMGEXIT must be used to allow the hypervisor to handle this intercept.
Add support to construct the required GHCB values to support a NPF NAE
event for MMIO. Parse the instruction that generated the #VC exception,
setting the required register values in the GHCB and creating the proper
SW_EXIT_INFO1, SW_EXITINFO2 and SW_SCRATCH values in the GHCB.
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
---
.../X64/AMDSevVcCommon.c | 308 +++++++++++++++++-
1 file changed, 306 insertions(+), 2 deletions(-)
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/AMDSevVcCommon.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/AMDSevVcCommon.c
index 578fee7deaad..d82121c3fa1c 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/AMDSevVcCommon.c
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/AMDSevVcCommon.c
@@ -86,8 +86,8 @@ typedef struct {
UINT8 Scale;
} Sib;
- UINTN RegData;
- UINTN RmData;
+ INTN RegData;
+ INTN RmData;
} SEV_ES_INSTRUCTION_OPCODE_EXT;
typedef struct {
@@ -159,6 +159,198 @@ GhcbSetRegValid (
Ghcb->SaveArea.ValidBitmap[RegIndex] |= (1 << RegBit);
}
+STATIC
+INT64 *
+GetRegisterPointer (
+ EFI_SYSTEM_CONTEXT_X64 *Regs,
+ UINT8 Register
+ )
+{
+ UINT64 *Reg;
+
+ switch (Register) {
+ case 0:
+ Reg = &Regs->Rax;
+ break;
+ case 1:
+ Reg = &Regs->Rcx;
+ break;
+ case 2:
+ Reg = &Regs->Rdx;
+ break;
+ case 3:
+ Reg = &Regs->Rbx;
+ break;
+ case 4:
+ Reg = &Regs->Rsp;
+ break;
+ case 5:
+ Reg = &Regs->Rbp;
+ break;
+ case 6:
+ Reg = &Regs->Rsi;
+ break;
+ case 7:
+ Reg = &Regs->Rdi;
+ break;
+ case 8:
+ Reg = &Regs->R8;
+ break;
+ case 9:
+ Reg = &Regs->R9;
+ break;
+ case 10:
+ Reg = &Regs->R10;
+ break;
+ case 11:
+ Reg = &Regs->R11;
+ break;
+ case 12:
+ Reg = &Regs->R12;
+ break;
+ case 13:
+ Reg = &Regs->R13;
+ break;
+ case 14:
+ Reg = &Regs->R14;
+ break;
+ case 15:
+ Reg = &Regs->R15;
+ break;
+ default:
+ Reg = NULL;
+ }
+ ASSERT (Reg != NULL);
+
+ return (INT64 *) Reg;
+}
+
+STATIC
+VOID
+UpdateForDisplacement (
+ SEV_ES_INSTRUCTION_DATA *InstructionData,
+ UINTN Size
+ )
+{
+ InstructionData->DisplacementSize = Size;
+ InstructionData->Immediate += Size;
+ InstructionData->End += Size;
+}
+
+STATIC
+BOOLEAN
+IsRipRelative (
+ SEV_ES_INSTRUCTION_DATA *InstructionData
+ )
+{
+ SEV_ES_INSTRUCTION_OPCODE_EXT *Ext = &InstructionData->Ext;
+
+ return ((InstructionData == LongMode64Bit) &&
+ (Ext->ModRm.Mod == 0) &&
+ (Ext->ModRm.Rm == 5) &&
+ (InstructionData->SibPresent == FALSE));
+}
+
+STATIC
+UINTN
+GetEffectiveMemoryAddress (
+ EFI_SYSTEM_CONTEXT_X64 *Regs,
+ SEV_ES_INSTRUCTION_DATA *InstructionData
+ )
+{
+ SEV_ES_INSTRUCTION_OPCODE_EXT *Ext = &InstructionData->Ext;
+ INTN EffectiveAddress = 0;
+
+ if (IsRipRelative (InstructionData)) {
+ /* RIP-relative displacement is a 32-bit signed value */
+ INT32 RipRelative = *(INT32 *) InstructionData->Displacement;
+
+ UpdateForDisplacement (InstructionData, 4);
+ return (UINTN) ((INTN) Regs->Rip + RipRelative);
+ }
+
+ switch (Ext->ModRm.Mod) {
+ case 1:
+ UpdateForDisplacement (InstructionData, 1);
+ EffectiveAddress += (INT8) (*(INT8 *) (InstructionData->Displacement));
+ break;
+ case 2:
+ switch (InstructionData->AddrSize) {
+ case Size16Bits:
+ UpdateForDisplacement (InstructionData, 2);
+ EffectiveAddress += (INT16) (*(INT16 *) (InstructionData->Displacement));
+ break;
+ default:
+ UpdateForDisplacement (InstructionData, 4);
+ EffectiveAddress += (INT32) (*(INT32 *) (InstructionData->Displacement));
+ break;
+ }
+ break;
+ }
+
+ if (InstructionData->SibPresent) {
+ if (Ext->Sib.Index != 4) {
+ EffectiveAddress += (*GetRegisterPointer (Regs, Ext->Sib.Index) << Ext->Sib.Scale);
+ }
+
+ if ((Ext->Sib.Base != 5) || Ext->ModRm.Mod) {
+ EffectiveAddress += *GetRegisterPointer (Regs, Ext->Sib.Base);
+ } else {
+ UpdateForDisplacement (InstructionData, 4);
+ EffectiveAddress += (INT32) (*(INT32 *) (InstructionData->Displacement));
+ }
+ } else {
+ EffectiveAddress += *GetRegisterPointer (Regs, Ext->ModRm.Rm);
+ }
+
+ return (UINTN) EffectiveAddress;
+}
+
+STATIC
+VOID
+DecodeModRm (
+ EFI_SYSTEM_CONTEXT_X64 *Regs,
+ SEV_ES_INSTRUCTION_DATA *InstructionData
+ )
+{
+ SEV_ES_INSTRUCTION_REX_PREFIX *RexPrefix = &InstructionData->RexPrefix;
+ SEV_ES_INSTRUCTION_OPCODE_EXT *Ext = &InstructionData->Ext;
+ SEV_ES_INSTRUCTION_MODRM *ModRm = &InstructionData->ModRm;
+ SEV_ES_INSTRUCTION_SIB *Sib = &InstructionData->Sib;
+
+ InstructionData->ModRmPresent = TRUE;
+ ModRm->Uint8 = *(InstructionData->End);
+
+ InstructionData->Displacement++;
+ InstructionData->Immediate++;
+ InstructionData->End++;
+
+ Ext->ModRm.Mod = ModRm->Bits.Mod;
+ Ext->ModRm.Reg = (RexPrefix->Bits.R << 3) | ModRm->Bits.Reg;
+ Ext->ModRm.Rm = (RexPrefix->Bits.B << 3) | ModRm->Bits.Rm;
+
+ Ext->RegData = *GetRegisterPointer (Regs, Ext->ModRm.Reg);
+
+ if (Ext->ModRm.Mod == 3) {
+ Ext->RmData = *GetRegisterPointer (Regs, Ext->ModRm.Rm);
+ } else {
+ if (ModRm->Bits.Rm == 4) {
+ InstructionData->SibPresent = TRUE;
+ Sib->Uint8 = *(InstructionData->End);
+
+ InstructionData->Displacement++;
+ InstructionData->Immediate++;
+ InstructionData->End++;
+
+ Ext->Sib.Scale = Sib->Bits.Scale;
+ Ext->Sib.Index = (RexPrefix->Bits.X << 3) | Sib->Bits.Index;
+ Ext->Sib.Base = (RexPrefix->Bits.B << 3) | Sib->Bits.Base;
+ }
+
+ Ext->RmData = GetEffectiveMemoryAddress (Regs, InstructionData);
+ }
+}
+
STATIC
VOID
DecodePrefixes (
@@ -269,6 +461,114 @@ InitInstructionData (
DecodePrefixes (Regs, InstructionData);
}
+STATIC
+UINTN
+MmioExit (
+ GHCB *Ghcb,
+ EFI_SYSTEM_CONTEXT_X64 *Regs,
+ SEV_ES_INSTRUCTION_DATA *InstructionData
+ )
+{
+ UINT64 ExitInfo1, ExitInfo2;
+ UINTN Status;
+ UINTN Bytes;
+ INTN *Register;
+
+ Bytes = 0;
+
+ switch (*(InstructionData->OpCodes)) {
+ /* MMIO write */
+ case 0x88:
+ Bytes = 1;
+ case 0x89:
+ DecodeModRm (Regs, InstructionData);
+ Bytes = (Bytes) ? Bytes
+ : (InstructionData->DataSize == Size16Bits) ? 2
+ : (InstructionData->DataSize == Size32Bits) ? 4
+ : (InstructionData->DataSize == Size64Bits) ? 8
+ : 0;
+
+ if (InstructionData->Ext.ModRm.Mod == 3) {
+ /* NPF on two register operands??? */
+ VmgExit (Ghcb, SvmExitUnsupported, SvmExitNpf, 0);
+ ASSERT (0);
+ }
+
+ ExitInfo1 = InstructionData->Ext.RmData;
+ ExitInfo2 = Bytes;
+ CopyMem (Ghcb->SharedBuffer, &InstructionData->Ext.RegData, Bytes);
+
+ Ghcb->SaveArea.SwScratch = (UINT64) Ghcb->SharedBuffer;
+ Status = VmgExit (Ghcb, SvmExitMmioWrite, ExitInfo1, ExitInfo2);
+ if (Status) {
+ return Status;
+ }
+ break;
+
+ case 0xC6:
+ Bytes = 1;
+ case 0xC7:
+ DecodeModRm (Regs, InstructionData);
+ Bytes = (Bytes) ? Bytes
+ : (InstructionData->DataSize == Size16Bits) ? 2
+ : (InstructionData->DataSize == Size32Bits) ? 4
+ : 0;
+
+ InstructionData->ImmediateSize = Bytes;
+ InstructionData->End += Bytes;
+
+ ExitInfo1 = InstructionData->Ext.RmData;
+ ExitInfo2 = Bytes;
+ CopyMem (Ghcb->SharedBuffer, InstructionData->Immediate, Bytes);
+
+ Ghcb->SaveArea.SwScratch = (UINT64) Ghcb->SharedBuffer;
+ Status = VmgExit (Ghcb, SvmExitMmioWrite, ExitInfo1, ExitInfo2);
+ if (Status) {
+ return Status;
+ }
+ break;
+
+ /* MMIO read */
+ case 0x8A:
+ Bytes = 1;
+ case 0x8B:
+ DecodeModRm (Regs, InstructionData);
+ Bytes = (Bytes) ? Bytes
+ : (InstructionData->DataSize == Size16Bits) ? 2
+ : (InstructionData->DataSize == Size32Bits) ? 4
+ : (InstructionData->DataSize == Size64Bits) ? 8
+ : 0;
+ if (InstructionData->Ext.ModRm.Mod == 3) {
+ /* NPF on two register operands??? */
+ VmgExit (Ghcb, SvmExitUnsupported, SvmExitNpf, 0);
+ ASSERT (0);
+ }
+
+ ExitInfo1 = InstructionData->Ext.RmData;
+ ExitInfo2 = Bytes;
+
+ Ghcb->SaveArea.SwScratch = (UINT64) Ghcb->SharedBuffer;
+ Status = VmgExit (Ghcb, SvmExitMmioRead, ExitInfo1, ExitInfo2);
+ if (Status) {
+ return Status;
+ }
+
+ Register = GetRegisterPointer (Regs, InstructionData->Ext.ModRm.Reg);
+ if (Bytes == 4) {
+ /* Zero-extend for 32-bit operation */
+ *Register = 0;
+ }
+ CopyMem (Register, Ghcb->SharedBuffer, Bytes);
+ break;
+
+ default:
+ Status = GP_EXCEPTION;
+ ASSERT (0);
+ }
+
+ return Status;
+}
+
STATIC
UINTN
UnsupportedExit (
@@ -605,6 +905,10 @@ DoVcCommon (
NaeExit = MsrExit;
break;
+ case SvmExitNpf:
+ NaeExit = MmioExit;
+ break;
+
default:
NaeExit = UnsupportedExit;
}
--
2.17.1
next prev parent reply other threads:[~2019-11-20 20:07 UTC|newest]
Thread overview: 82+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-20 20:06 [RFC PATCH v3 00/43] SEV-ES guest support Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 01/43] MdePkg: Create PCDs to be used in support of SEV-ES Lendacky, Thomas
2019-12-12 6:53 ` Ni, Ray
2019-12-12 20:48 ` Lendacky, Thomas
2019-12-13 1:21 ` Ni, Ray
2019-11-20 20:06 ` [RFC PATCH v3 02/43] MdePkg: Add the MSR definition for the GHCB register Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 03/43] MdePkg: Add a structure definition for the GHCB Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 04/43] MdeModulePkg/DxeIplPeim: Support GHCB pages when creating page tables Lendacky, Thomas
2019-12-12 6:53 ` [edk2-devel] " Ni, Ray
2019-12-12 20:58 ` Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 05/43] MdePkg/BaseLib: Add support for the XGETBV instruction Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 06/43] MdePkg/BaseLib: Add support for the VMGEXIT instruction Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 07/43] UefiCpuPkg: Implement library support for VMGEXIT Lendacky, Thomas
2019-11-21 11:15 ` [edk2-devel] " Laszlo Ersek
2019-11-21 16:48 ` Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 08/43] UefiCpuPkg/CpuExceptionHandler: Add base support for the #VC exception Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 09/43] UefiCpuPkg/CpuExceptionHandler: Add support for IOIO_PROT NAE events Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 10/43] UefiCpuPkg/CpuExceptionHandler: Support string IO " Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 11/43] UefiCpuPkg/CpuExceptionHandler: Add support for CPUID " Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 12/43] UefiCpuPkg/CpuExceptionHandler: Add support for MSR_PROT " Lendacky, Thomas
2019-11-20 20:06 ` Lendacky, Thomas [this message]
2019-11-20 20:06 ` [RFC PATCH v3 14/43] UefiCpuPkg/CpuExceptionHandler: Add support for WBINVD " Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 15/43] UefiCpuPkg/CpuExceptionHandler: Add support for RDTSC " Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 16/43] UefiCpuPkg/CpuExceptionHandler: Add support for RDPMC " Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 17/43] UefiCpuPkg/CpuExceptionHandler: Add support for INVD " Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 18/43] UefiCpuPkg/CpuExceptionHandler: Add support for VMMCALL " Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 19/43] UefiCpuPkg/CpuExceptionHandler: Add support for RDTSCP " Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 20/43] UefiCpuPkg/CpuExceptionHandler: Add support for MONITOR/MONITORX " Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 21/43] UefiCpuPkg/CpuExceptionHandler: Add support for MWAIT/MWAITX " Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 22/43] UefiCpuPkg/CpuExceptionHandler: Add support for DR7 Read/Write " Lendacky, Thomas
2019-12-12 6:53 ` Ni, Ray
2019-12-12 20:27 ` Lendacky, Thomas
2019-12-12 6:53 ` Ni, Ray
2019-12-12 20:39 ` Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 23/43] OvmfPkg/MemEncryptSevLib: Add an SEV-ES guest indicator function Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 24/43] OvmfPkg: Add support to perform SEV-ES initialization Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 25/43] OvmfPkg/ResetVector: Add support for a 32-bit SEV check Lendacky, Thomas
2019-11-21 11:02 ` [edk2-devel] " Laszlo Ersek
2019-11-20 20:06 ` [RFC PATCH v3 26/43] OvmfPkg: Create a GHCB page for use during Sec phase Lendacky, Thomas
2019-11-21 11:29 ` [edk2-devel] " Laszlo Ersek
2019-11-20 20:06 ` [RFC PATCH v3 27/43] OvmfPkg/PlatformPei: Reserve GHCB-related areas if S3 is supported Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 28/43] OvmfPkg: Create GHCB pages for use during Pei and Dxe phase Lendacky, Thomas
2019-12-12 6:54 ` Ni, Ray
2019-12-12 21:03 ` Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 29/43] OvmfPkg/PlatformPei: Move early GDT into ram when SEV-ES is enabled Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 30/43] OvmfPkg/Sec: Add #VC exception handling for Sec phase Lendacky, Thomas
2019-11-21 12:06 ` [edk2-devel] " Laszlo Ersek
2019-11-21 20:46 ` Lendacky, Thomas
2019-11-22 12:52 ` Laszlo Ersek
2019-11-22 16:30 ` Lendacky, Thomas
2019-11-22 21:10 ` Laszlo Ersek
2019-11-22 22:48 ` Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 31/43] OvmfPkg/Sec: Enable cache early to speed up booting Lendacky, Thomas
2019-11-21 12:08 ` [edk2-devel] " Laszlo Ersek
2019-11-20 20:06 ` [RFC PATCH v3 32/43] OvmfPkg/QemuFlashFvbServicesRuntimeDxe: Bypass flash detection with SEV-ES is enabled Lendacky, Thomas
2019-11-21 12:31 ` [edk2-devel] " Laszlo Ersek
2019-11-21 21:11 ` Lendacky, Thomas
2019-11-22 12:20 ` Laszlo Ersek
2019-11-20 20:06 ` [RFC PATCH v3 33/43] MdeModulePkg: Reserve a 16-bit protected mode code segment descriptor Lendacky, Thomas
2019-12-12 6:57 ` Ni, Ray
2019-12-12 21:19 ` [edk2-devel] " Lendacky, Thomas
2019-12-13 1:20 ` Ni, Ray
2019-11-20 20:06 ` [RFC PATCH v3 34/43] UefiCpuPkg: Add " Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 35/43] UefiCpuPkg/MpInitLib: Add a CPU MP data flag to indicate if SEV-ES is enabled Lendacky, Thomas
2019-12-12 7:01 ` Ni, Ray
2019-12-12 21:21 ` Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 36/43] UefiCpuPkg: Allow AP booting under SEV-ES Lendacky, Thomas
2019-11-20 20:06 ` [RFC PATCH v3 37/43] OvmfPkg: Reserve a page in memory for the SEV-ES AP reset vector Lendacky, Thomas
2019-11-21 19:27 ` [edk2-devel] " Laszlo Ersek
2019-11-21 22:49 ` Lendacky, Thomas
2019-11-22 16:06 ` Laszlo Ersek
2019-11-22 16:40 ` Lendacky, Thomas
2019-11-20 20:07 ` [RFC PATCH v3 38/43] OvmfPkg: Move the GHCB allocations into reserved memory Lendacky, Thomas
2019-11-20 20:07 ` [RFC PATCH v3 39/43] MdePkg: Add a finalization function to the CPU protocol Lendacky, Thomas
2019-11-20 21:32 ` [RFC PATCH v3 40/43] UefiCpuPkg/MpInitLib: Add MP finalization interface to MpInitLib Lendacky, Thomas
2019-11-20 21:32 ` [RFC PATCH v3 41/43] UefiCpuPkg/MpInitLib: Prepare SEV-ES guest APs for OS use Lendacky, Thomas
2019-11-20 21:32 ` [RFC PATCH v3 42/43] UefiCpuPkg/CpuDxe: Provide an DXE MP finalization routine to support SEV-ES Lendacky, Thomas
2019-11-20 21:32 ` [RFC PATCH v3 43/43] MdeModulePkg/DxeCore: Perform the CPU protocol finalization support Lendacky, Thomas
2019-11-21 1:53 ` [edk2-devel] [RFC PATCH v3 00/43] SEV-ES guest support Nate DeSimone
2019-11-21 15:50 ` Lendacky, Thomas
2019-11-21 9:45 ` Laszlo Ersek
2019-11-21 9:48 ` Laszlo Ersek
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