From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 708D881783 for ; Thu, 9 Feb 2017 01:17:27 -0800 (PST) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga104.jf.intel.com with ESMTP; 09 Feb 2017 01:17:27 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.35,349,1484035200"; d="scan'208";a="931860520" Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by orsmga003.jf.intel.com with ESMTP; 09 Feb 2017 01:17:26 -0800 Received: from FMSMSX110.amr.corp.intel.com (10.18.116.10) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.248.2; Thu, 9 Feb 2017 01:17:26 -0800 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by fmsmsx110.amr.corp.intel.com (10.18.116.10) with Microsoft SMTP Server (TLS) id 14.3.248.2; Thu, 9 Feb 2017 01:17:26 -0800 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.88]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.132]) with mapi id 14.03.0248.002; Thu, 9 Feb 2017 17:17:24 +0800 From: "Zeng, Star" To: Laszlo Ersek , "Yao, Jiewen" , "Duran, Leo" , "edk2-devel@ml01.01.org" CC: "Tian, Feng" , "Singh, Brijesh" , "Justen, Jordan L" , "Zeng, Star" Thread-Topic: [edk2] [PATCH] MdeModulePkg: Add dynamic PCD PcdPteMemoryEncryptionAddressOrMask Thread-Index: AQHSgXv3kYvDfsCSd0elIZPifE0NYaFeYq5AgABtvQCAAAF/gIAAAYyAgAAB+YCAAAK9gIAABs2AgAAIAQCAABhsgIABImZggAACfiD//7wcgIAAhxWw Date: Thu, 9 Feb 2017 09:17:24 +0000 Message-ID: <0C09AFA07DD0434D9E2A0C6AEB0483103B825588@shsmsx102.ccr.corp.intel.com> References: <1486497223-22694-1-git-send-email-leo.duran@amd.com> <1486497223-22694-2-git-send-email-leo.duran@amd.com> <0C09AFA07DD0434D9E2A0C6AEB0483103B8215CE@shsmsx102.ccr.corp.intel.com> <74D8A39837DF1E4DA445A8C0B3885C503A8EB0DA@shsmsx102.ccr.corp.intel.com> <74D8A39837DF1E4DA445A8C0B3885C503A8EB10D@shsmsx102.ccr.corp.intel.com> <74D8A39837DF1E4DA445A8C0B3885C503A8EB122@shsmsx102.ccr.corp.intel.com> <9b935505-7da8-0b4d-f800-68ae4362476c@redhat.com> <74D8A39837DF1E4DA445A8C0B3885C503A8EB219@shsmsx102.ccr.corp.intel.com> <895f5bcb-acf8-eeb2-889e-04bb1c70fbee@redhat.com> <0C09AFA07DD0434D9E2A0C6AEB0483103B825154@shsmsx102.ccr.corp.intel.com> <0C09AFA07DD0434D9E2A0C6AEB0483103B8251CA@shsmsx102.ccr.corp.intel.com> In-Reply-To: Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH] MdeModulePkg: Add dynamic PCD PcdPteMemoryEncryptionAddressOrMask X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 09 Feb 2017 09:17:27 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable EFI_HOB_CPU? Is there discussion in PIWG for it? Thanks, Star -----Original Message----- From: Laszlo Ersek [mailto:lersek@redhat.com]=20 Sent: Thursday, February 9, 2017 5:13 PM To: Zeng, Star ; Yao, Jiewen ; D= uran, Leo ; edk2-devel@ml01.01.org Cc: Tian, Feng ; Singh, Brijesh ; Justen, Jordan L Subject: Re: [edk2] [PATCH] MdeModulePkg: Add dynamic PCD PcdPteMemoryEncry= ptionAddressOrMask On 02/09/17 06:26, Zeng, Star wrote: > Correct typo in below email. >=20 > "about how to determine DXE is 32BITs or 64BITs" should be "about how=20 > to determine PEI is 32BITs or 64BITs". >=20 > At that time, we were discussing if the code needs to allocate <4G=20 > ACPI table for PEI phase at S3 resume. Indeed. Although OVMF X64 has a 64-bit PEI phase, that PEI phase can access= only <4G RAM. IIRC one suggestion was to introduce a new HOB for this, so = that PEI can advertise such a limitation to DXE. Thanks Laszlo >=20 > Thanks, > Star > -----Original Message----- > From: Zeng, Star > Sent: Thursday, February 9, 2017 1:12 PM > To: Laszlo Ersek ; Yao, Jiewen=20 > ; Duran, Leo ;=20 > edk2-devel@ml01.01.org > Cc: Tian, Feng ; Singh, Brijesh=20 > ; Justen, Jordan L ;=20 > Zeng, Star > Subject: RE: [edk2] [PATCH] MdeModulePkg: Add dynamic PCD=20 > PcdPteMemoryEncryptionAddressOrMask >=20 > In fact, X64 DxeIplPeim does not refer PcdDxeIplSwitchToLongMode at all. >=20 > DxeIpl.inf: > [FeaturePcd.IA32] > gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode ## CONSUM= ES >=20 > As I remember, I did a draft patch below before for the discussion about = how to determine DXE is 32BITs or 64BITs in title "[edk2] [PATCH v3 2/4] In= telFrameworkModulePkg: BdsDxe: only allocate below 4 GB if needed", I can't= find the archive link any more. >=20 > --- > MdeModulePkg/Core/DxeIplPeim/X64/DxeLoadFunc.c | 5 +++++ > MdeModulePkg/MdeModulePkg.dec | 4 +++- > 2 files changed, 8 insertions(+), 1 deletion(-) >=20 > diff --git a/MdeModulePkg/Core/DxeIplPeim/X64/DxeLoadFunc.c=20 > b/MdeModulePkg/Core/DxeIplPeim/X64/DxeLoadFunc.c > index 6488880..348e084 100644 > --- a/MdeModulePkg/Core/DxeIplPeim/X64/DxeLoadFunc.c > +++ b/MdeModulePkg/Core/DxeIplPeim/X64/DxeLoadFunc.c > @@ -43,6 +43,11 @@ HandOffToDxeCore ( > EFI_PEI_VECTOR_HANDOFF_INFO_PPI *VectorHandoffInfoPpi; > =20 > // > + // It should be FALSE for both PEI and DXE are 64-bit. > + // > + ASSERT (PcdGetBool (PcdDxeIplSwitchToLongMode) =3D=3D FALSE); > + > + // > // Get Vector Hand-off Info PPI and build Guided HOB > // > Status =3D PeiServicesLocatePpi ( > diff --git a/MdeModulePkg/MdeModulePkg.dec=20 > b/MdeModulePkg/MdeModulePkg.dec index af7bcab..4a73f7b 100644 > --- a/MdeModulePkg/MdeModulePkg.dec > +++ b/MdeModulePkg/MdeModulePkg.dec > @@ -712,8 +712,10 @@ > ## Indicates if DxeIpl should switch to long mode to enter DXE phase. > # It is assumed that 64-bit DxeCore is built in firmware if it is tru= e; otherwise 32-bit DxeCore > # is built in firmware.

> + # And it should be FALSE for both PEI and DXE are 64-bit. > # TRUE - DxeIpl will load a 64-bit DxeCore and switch to long mode = to hand over to DxeCore.
> - # FALSE - DxeIpl will load a 32-bit DxeCore and perform stack switch= to hand over to DxeCore.
> + # FALSE - DxeIpl will load a 32-bit DxeCore and perform stack switch= to hand over to DxeCore,
> + # or both PEI and DXE are 64-bit.
> # @Prompt DxeIpl switch to long mode. > =20 > gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode|TRUE|BOOLEAN| > 0x0001003b > =20 > -- >=20 >=20 > Thanks, > Star > -----Original Message----- > From: Laszlo Ersek [mailto:lersek@redhat.com] > Sent: Thursday, February 9, 2017 3:48 AM > To: Yao, Jiewen ; Duran, Leo=20 > ; Zeng, Star ;=20 > edk2-devel@ml01.01.org > Cc: Tian, Feng ; Singh, Brijesh=20 > ; Justen, Jordan L > Subject: Re: [edk2] [PATCH] MdeModulePkg: Add dynamic PCD=20 > PcdPteMemoryEncryptionAddressOrMask >=20 > On 02/08/17 19:20, Yao, Jiewen wrote: >> Got it. >> >> =20 >> >> If the means of PcdDxeIplSwitchtoLongMode is unclear, we may add=20 >> more description to make it clear. >> >> =20 >> >> If we believe "PcdDxeIplSwitchtoLongMode =3D=3D DXE is Long mode" as=20 >> final conclusion, can we treat that as a bug and fix OVMF X64? >=20 > I don't know how to "fix" that. What is there to fix? >=20 > Flipping the PCD to TRUE in OVMF X64 would break OVMF X64, and likely OVM= F Ia32X64 too. For two reasons: >=20 >=20 > (1) Toggling the PCD would alter the behavior of the DXE IPL PEIM and/or = the DXE Core, and that behavior has never ever been tested with OVMF X64. >=20 > The PcdDxeIplSwitchToLongMode=3DFALSE setting in the X64 DSC dates back t= o: >=20 > commit 8fa729a8b1401f01c6fd8ddbcab45e4a4904fa9a > Author: lgao4 > Date: Mon Mar 15 01:40:59 2010 +0000 >=20 > Merge the same type PCD section. >=20 > git-svn-id:=20 > https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10243=20 > 6f19259b-4bc3-4df7-8a09-765794883524 >=20 > and before that, to: >=20 > commit 49ba9447c92d6fca214476381107a180d08e59d1 > Author: jljusten > Date: Wed May 27 21:10:18 2009 +0000 >=20 > Add initial version of Open Virtual Machine Firmware (OVMF) platfor= m. >=20 > git-svn-id:=20 > https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@8398=20 > 6f19259b-4bc3-4df7-8a09-765794883524 >=20 > In other words, OVMF X64 has always worked like this, since its inception= . >=20 >=20 > (2) PEI code under OvmfPkg itself uses this PCD to identify a 32-bit DXE = phase. >=20 > // > // If DXE is 32-bit, then we're done; PciBusDxe will degrade 64-bit M= MIO > // resources to 32-bit anyway. See DegradeResource() in > // "PciResourceSupport.c". > // > #ifdef MDE_CPU_IA32 > if (!FeaturePcdGet (PcdDxeIplSwitchToLongMode)) { > return FirstNonAddress; > } > #endif >=20 > and >=20 > // > // If DXE is 32-bit, then just return the traditional 64 MB cap. > // > #ifdef MDE_CPU_IA32 > if (!FeaturePcdGet (PcdDxeIplSwitchToLongMode)) { > return SIZE_64MB; > } > #endif >=20 > Thanks > Laszlo >=20 >> >> =20 >> >> Thank you >> >> Yao Jiewen >> >> =20 >> >> =20 >> >> *From:*Laszlo Ersek [mailto:lersek@redhat.com] >> *Sent:* Wednesday, February 8, 2017 9:52 AM >> *To:* Yao, Jiewen ; Duran, Leo=20 >> ; Zeng, Star ;=20 >> edk2-devel@ml01.01.org >> *Cc:* Tian, Feng ; Singh, Brijesh=20 >> ; Justen, Jordan L >> *Subject:* Re: [edk2] [PATCH] MdeModulePkg: Add dynamic PCD=20 >> PcdPteMemoryEncryptionAddressOrMask >> >> =20 >> >> On 02/08/17 18:27, Yao, Jiewen wrote: >>> I believe PcdDxeIplSwitchtoLongMode =3D=3D DXE is Long mode. >>> >>> =20 >>> >>> See DEC description: >>> >>> # It is assumed that 64-bit DxeCore is built in firmware if it is=20 >>> true; otherwise 32-bit DxeCore >>> >>> # is built in firmware.

>> >> Unfortunately, I have no historical context or background for this=20 >> PCD; all I can say is that the X64 OVMF platform does not set the PCD. >> >> It enters long mode, and sets up page tables for the first 4GB of=20 >> RAM, in SEC. Then SEC decompresses the flash contents to RAM, which=20 >> covers both PEIFV and DXEFV. PEI runs from RAM. >> >> This is possible because on QEMU/KVM, there's no need to initialize=20 >> RAM, thus only SEC runs from flash, in-place. >> >> Perhaps Jordan can provide more insight. >> >> If Brijesh and Leo would like to run the X64 OVMF platform as a SEV=20 >> guest too, then this should be considered, in my opinion. >> >> One more comment below: >> >>> >>> =20 >>> >>> And the code MdeModulePkg\Universal\Acpi\S3SaveStateDxe\AcpiS3ContextSa= ve.c: >>> >>> =20 >>> >>> BOOLEAN >>> >>> IsLongModeWakingVectorSupport ( >>> >>> IN EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE*Facs >>> >>> ) >>> >>> { >>> >>> if((Facs =3D=3D NULL) || >>> >>> (Facs->Signature !=3D >>> EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE) ) { >>> >>> // >>> >>> // Something wrong with FACS. >>> >>> // >>> >>> returnFALSE; >>> >>> } >>> >>> if((Facs->Version =3D=3D >>> EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION) && >>> >>> ((Facs->Flags & EFI_ACPI_4_0_64BIT_WAKE_SUPPORTED_F) !=3D 0)) { >>> >>> // >>> >>> // BIOS supports 64bit waking vector. >>> >>> // >>> >>> if(FeaturePcdGet (PcdDxeIplSwitchToLongMode)) { >>> >>> returnTRUE; >>> >>> } >>> >>> } >>> >>> returnFALSE; >>> >>> } >> >> In practice, it's okay if the OVMF X64 platform is recognized as "not=20 >> supporting a 64-bit waking vector for S3 resume". All the 64-bit=20 >> guest OSes that I've tested with OVMF X64 (Linux, and the Windows 7 /=20 >> 8 / 10 families, both client and server) use a real mode (16-bit)=20 >> waking vector, in practice. >> >> ... Actually, upon reviewing the above code more carefully, we don't=20 >> even reach the FeaturePcdGet() call: the FACS that QEMU generates=20 >> (and OVMF downloads and installs) corresponds to ACPI 1.0, that is,=20 >> EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION. >> >> Thanks >> Laszlo >> >> >>> >>> =20 >>> >>> =20 >>> >>> Thank you >>> >>> Yao Jiewen >>> >>> =20 >>> >>> *From:*edk2-devel [mailto:edk2-devel-bounces@lists.01.org] *On=20 >>> Behalf Of *Yao, Jiewen >>> *Sent:* Wednesday, February 8, 2017 9:18 AM >>> *To:* Laszlo Ersek > >; Duran, Leo > >; >>> Zeng, Star > >; edk2-devel@ml01.01.org=20 >> >>> *Cc:* Tian, Feng >;=20 >>> Singh, Brijesh >> > >>> *Subject:* Re: [edk2] [PATCH] MdeModulePkg: Add dynamic PCD=20 >>> PcdPteMemoryEncryptionAddressOrMask >>> >>> =20 >>> >>> Good reminder. I take back my word. >>> >>> In this case, we need consume PcdPteMemoryEncryptionAddressOrMask in I= A32 mode to build X64 paging. >>> >>> We need >>> >>> From: Laszlo Ersek [mailto:lersek@redhat.com] >>> Sent: Wednesday, February 8, 2017 9:11 AM >>> To: Yao, Jiewen > > >;=20 >> Duran, Leo >=20 >> >; Zeng, Star > > >;=20 >> edk2-devel@ml01.01.org >>> >>> Cc: Tian, Feng > > >;=20 >> Singh, Brijesh > > >> > >>> Subject: Re: [edk2] [PATCH] MdeModulePkg: Add dynamic PCD=20 >>> PcdPteMemoryEncryptionAddressOrMask >>> >>> On 02/08/17 18:05, Yao, Jiewen wrote: >>>> HI Leo >>>> >>>> Thanks to clarify that. >>>> >>>> >>>> >>>> If that is the case, do you think it will be better to limit this=20 >>>> PCD to >>>> X64 only in DEC file. Such as [PcdsDynamic.X64, PcdsDynamicEx.X64] >>> >>> Not sure if this is the best place to raise the following=20 >>> observation, but it should do: >>> >>> please everyone remember that PcdDxeIplSwitchToLongMode is only TRUE=20 >>> if PEI is 32-bit and DXE is 64-bit. It is FALSE in *two* cases: >>> - both PEI and DXE are 32-bit, and >>> - both PEI and DXE are 64-bit. >>> >>> This doesn't necessarily invalidate anything said thus fair in the=20 >>> thread, but the following statement from Leo: >>> >>> The SEV feature requires 64-bit LongMode, so the >>> PcdDxeIplSwitchtoLongMode *must* set to TRUE at build-time >>> >>> does not follow. The PCD is FALSE in OvmfPkgX64.dsc. >>> >>> Thanks, >>> Laszlo >>> >>>> >>>> >>>> >>>> Thank you >>>> >>>> Yao Jiewen >>>> >>>> >>>> >>>> *From:*Duran, Leo [mailto:leo.duran@amd.com] >>>> *Sent:* Wednesday, February 8, 2017 9:00 AM >>>> *To:* Zeng, Star > > >> >>; >> edk2-devel@ml01.01.org> >>> > >>>> *Cc:* Laszlo Ersek > > >> >>; Tian, Feng >>>> > > >> >>; Singh,=20 >> Brijesh > > >> >>; Yao, >>>> Jiewen > > >> >> >>>> *Subject:* RE: [edk2] [PATCH] MdeModulePkg: Add dynamic PCD=20 >>>> PcdPteMemoryEncryptionAddressOrMask >>>> >>>> >>>> >>>> Pease see reply below. >>>> Leo >>>> >>>>> -----Original Message----- >>>>> From: Zeng, Star [mailto:star.zeng@intel.com] >>>>> Sent: Tuesday, February 07, 2017 8:27 PM >>>>> To: Duran, Leo >>>> >>>> %3cmailto:leo.duran@amd.com >> > %3cmailto:leo.duran@amd.com%3cmailto:leo.duran@amd.com >> %3cmailto:leo.duran@amd.com%0b>> > %3cmailto:leo.duran@amd.com%3cmailto:leo.duran@amd.com >> %3cmailto:leo.duran@amd.com>>>>; >> edk2-devel@ml01.01.org> >>> > >>>> >>>>> Cc: Laszlo Ersek > > > >=20 >> >> >> >; Tian, Feng > > > > >> >> >> >; >>>>> Singh, Brijesh > > > > >> >> >> >; Zeng, Star > > > > >> >> >> >; >>>>> Yao, Jiewen >>>> >>>> %3cmailto:jiewen.yao@intel.com >> > %3cmailto:jiewen.yao@intel.com%3cmailto:jiewen.yao@intel.com >> %3cmailto:jiewen.yao@intel.com%0b>> > %3cmailto:jiewen.yao@intel.com%3cmailto:jiewen.yao@intel.com >> %3cmailto:jiewen.yao@intel.com>>>> >>>>> Subject: RE: [edk2] [PATCH] MdeModulePkg: Add dynamic PCD=20 >>>>> PcdPteMemoryEncryptionAddressOrMask >>>>> >>>>> Does Create4GPageTablesIa32Pae() also need to be updated? >>>>> >>>>> Thanks, >>>>> Star >>>> [Duran, Leo] >>>> Hi Star, >>>> No, I do not think Create4GPageTablesIa32Pae() is in the execution pat= h. >>>> >>>> The SEV feature requires 64-bit LongMode, so the=20 >>>> PcdDxeIplSwitchtoLongMode *must* set to TRUE at build-time, in which c= ase Create4GPageTablesIa32Pae() would *not* be called by HandOffToDxeCore()= . >>>> >>>>> -----Original Message----- >>>>> From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On=20 >>>>> Behalf Of Leo Duran >>>>> Sent: Wednesday, February 8, 2017 3:54 AM >>>>> To: edk2-devel@ml01.01.org> >>> > >>> >>>>> Cc: Laszlo Ersek > > > >=20 >> >> >> >; Tian, Feng > > > > >> >> >> >; >>>>> Brijesh Singh > > > > >> >> >> >; Zeng, Star > > > > >> >> >> >; >>>>> Leo Duran >>>> >>>> %3cmailto:leo.duran@amd.com >> > %3cmailto:leo.duran@amd.com%3cmailto:leo.duran@amd.com >> %3cmailto:leo.duran@amd.com%0b>> > %3cmailto:leo.duran@amd.com%3cmailto:leo.duran@amd.com >> %3cmailto:leo.duran@amd.com>>>> >>>>> Subject: [edk2] [PATCH] MdeModulePkg: Add dynamic PCD=20 >>>>> PcdPteMemoryEncryptionAddressOrMask >>>>> >>>>> From: Brijesh Singh >>>> >>>> %3cmailto:brijesh.singh@amd.com >> > %3cmailto:brijesh.singh@amd.com%3cmailto:brijesh.singh@amd.com >> %3cmailto:brijesh.singh@amd.com%0b>> > %3cmailto:brijesh.singh@amd.com%3cmailto:brijesh.singh@amd.com >> %3cmailto:brijesh.singh@amd.com>>>> >>>>> >>>>> This dynamic PCD holds the address mask for page table entries=20 >>>>> when memory encryption is enabled on AMD processors supporting the=20 >>>>> Secure Encrypted Virtualization (SEV) feature. >>>>> >>>>> Cc: Feng Tian >>>> >>>> %3cmailto:feng.tian@intel.com >> > %3cmailto:feng.tian@intel.com%3cmailto:feng.tian@intel.com >> %3cmailto:feng.tian@intel.com%0b>> > %3cmailto:feng.tian@intel.com%3cmailto:feng.tian@intel.com >> %3cmailto:feng.tian@intel.com>>>> >>>>> Cc: Star Zeng >>>> >>>> %3cmailto:star.zeng@intel.com >> > %3cmailto:star.zeng@intel.com%3cmailto:star.zeng@intel.com >> %3cmailto:star.zeng@intel.com%0b>> > %3cmailto:star.zeng@intel.com%3cmailto:star.zeng@intel.com >> %3cmailto:star.zeng@intel.com>>>> >>>>> Cc: Laszlo Ersek >>>> >>>> %3cmailto:lersek@redhat.com >> > %3cmailto:lersek@redhat.com%3cmailto:lersek@redhat.com >> %3cmailto:lersek@redhat.com%0b>> > %3cmailto:lersek@redhat.com%3cmailto:lersek@redhat.com >> %3cmailto:lersek@redhat.com>>>> >>>>> Contributed-under: TianoCore Contribution Agreement 1.0 >>>>> Signed-off-by: Leo Duran >>>> >>>> %3cmailto:leo.duran@amd.com >> > %3cmailto:leo.duran@amd.com%3cmailto:leo.duran@amd.com >> %3cmailto:leo.duran@amd.com%0b>> > %3cmailto:leo.duran@amd.com%3cmailto:leo.duran@amd.com >> %3cmailto:leo.duran@amd.com>>>> >>>>> --- >>>>> MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf | 5 ++++- >>>>> MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c | 18=20 >>>>> ++++++++++-- >>>>> ------ >>>>> MdeModulePkg/MdeModulePkg.dec | 8 ++++++++ >>>>> 3 files changed, 22 insertions(+), 9 deletions(-) >>>>> >>>>> diff --git a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf >>>>> b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf >>>>> index 2bc41be..d62bd9b 100644 >>>>> --- a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf >>>>> +++ b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf >>>>> @@ -6,6 +6,8 @@ >>>>> # needed to run the DXE Foundation. >>>>> # >>>>> # Copyright (c) 2006 - 2016, Intel Corporation. All rights=20 >>>>> reserved.
>>>>> +# Copyright (c) 2017, AMD Incorporated. All rights reserved.
=20 >>>>> +# >>>>> # This program and the accompanying materials # are licensed=20 >>>>> and made available under the terms and conditions of the BSD=20 >>>>> License # which accompanies this distribution. The full text of=20 >>>>> the license may be found at @@ -111,7 +113,8 @@ [FeaturePcd] >>>>> gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSupportUefiDecompress=20 >>>>> ## CONSUMES >>>>> >>>>> [Pcd.IA32,Pcd.X64] >>>>> - gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable ## >>>>> SOMETIMES_CONSUMES >>>>> + gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable = ## >>>>> SOMETIMES_CONSUMES >>>>> + >>>>> gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrM >>>>> ask ## CONSUMES >>>>> >>>>> [Pcd.IA32,Pcd.X64,Pcd.ARM,Pcd.AARCH64] >>>>> gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack ## >>>>> SOMETIMES_CONSUMES >>>>> diff --git a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c >>>>> b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c >>>>> index 790f6ab..2c52389 100644 >>>>> --- a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c >>>>> +++ b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c >>>>> @@ -16,6 +16,8 @@ >>>>> 3) IA-32 Intel(R) Architecture Software Developer's Manual=20 >>>>> Volume 3:System Programmer's Guide, Intel >>>>> >>>>> Copyright (c) 2006 - 2016, Intel Corporation. All rights=20 >>>>> reserved.
>>>>> +Copyright (c) 2017, AMD Incorporated. All rights reserved.
>>>>> + >>>>> This program and the accompanying materials are licensed and=20 >>>>> made available under the terms and conditions of the BSD License =20 >>>>> which accompanies this distribution. The full text of the license=20 >>>>> may be found at @@ -71,14 +73,14 @@ Split2MPageTo4K ( >>>>> // >>>>> // Fill in 2M page entry. >>>>> // >>>>> - *PageEntry2M =3D (UINT64) (UINTN) PageTableEntry | IA32_PG_P |=20 >>>>> IA32_PG_RW; >>>>> + *PageEntry2M =3D (UINT64) (UINTN) PageTableEntry | PcdGet64 >>>>> + (PcdPteMemoryEncryptionAddressOrMask) | IA32_PG_P | IA32_PG_RW; >>>>> >>>>> PhysicalAddress4K =3D PhysicalAddress; >>>>> for (IndexOfPageTableEntries =3D 0; IndexOfPageTableEntries <=20 >>>>> 512; >>>>> IndexOfPageTableEntries++, PageTableEntry++, PhysicalAddress4K +=3D >>>>> SIZE_4KB) { >>>>> // >>>>> // Fill in the Page Table entries >>>>> // >>>>> - PageTableEntry->Uint64 =3D (UINT64) PhysicalAddress4K; >>>>> + PageTableEntry->Uint64 =3D (UINT64) PhysicalAddress4K |=20 >>>>> + PcdGet64 (PcdPteMemoryEncryptionAddressOrMask); >>>>> PageTableEntry->Bits.ReadWrite =3D 1; >>>>> PageTableEntry->Bits.Present =3D 1; >>>>> if ((PhysicalAddress4K >=3D StackBase) && (PhysicalAddress4K <=20 >>>>> StackBase + >>>>> StackSize)) { @@ -116,7 +118,7 @@ Split1GPageTo2M ( >>>>> // >>>>> // Fill in 1G page entry. >>>>> // >>>>> - *PageEntry1G =3D (UINT64) (UINTN) PageDirectoryEntry | IA32_PG_P=20 >>>>> | IA32_PG_RW; >>>>> + *PageEntry1G =3D (UINT64) (UINTN) PageDirectoryEntry | PcdGet64 >>>>> + (PcdPteMemoryEncryptionAddressOrMask) | IA32_PG_P | IA32_PG_RW; >>>>> >>>>> PhysicalAddress2M =3D PhysicalAddress; >>>>> for (IndexOfPageDirectoryEntries =3D 0;=20 >>>>> IndexOfPageDirectoryEntries < 512; >>>>> IndexOfPageDirectoryEntries++, PageDirectoryEntry++,=20 >>>>> IndexOfPageDirectoryEntries++PhysicalAddress2M >>>>> +=3D SIZE_2MB) { @@ -129,7 +131,7 @@ Split1GPageTo2M ( >>>>> // >>>>> // Fill in the Page Directory entries >>>>> // >>>>> - PageDirectoryEntry->Uint64 =3D (UINT64) PhysicalAddress2M; >>>>> + PageDirectoryEntry->Uint64 =3D (UINT64) PhysicalAddress2M | >>>>> + PcdGet64 (PcdPteMemoryEncryptionAddressOrMask); >>>>> PageDirectoryEntry->Bits.ReadWrite =3D 1; >>>>> PageDirectoryEntry->Bits.Present =3D 1; >>>>> PageDirectoryEntry->Bits.MustBe1 =3D 1; @@ -248,7 +250,7 @@=20 >>>>> CreateIdentityMappingPageTables ( >>>>> // >>>>> // Make a PML4 Entry >>>>> // >>>>> - PageMapLevel4Entry->Uint64 =3D >>>>> (UINT64)(UINTN)PageDirectoryPointerEntry; >>>>> + PageMapLevel4Entry->Uint64 =3D >>>>> + (UINT64)(UINTN)PageDirectoryPointerEntry | PcdGet64=20 >>>>> + (PcdPteMemoryEncryptionAddressOrMask); >>>>> PageMapLevel4Entry->Bits.ReadWrite =3D 1; >>>>> PageMapLevel4Entry->Bits.Present =3D 1; >>>>> >>>>> @@ -262,7 +264,7 @@ CreateIdentityMappingPageTables ( >>>>> // >>>>> // Fill in the Page Directory entries >>>>> // >>>>> - PageDirectory1GEntry->Uint64 =3D (UINT64)PageAddress; >>>>> + PageDirectory1GEntry->Uint64 =3D (UINT64)PageAddress | >>>>> + PcdGet64 (PcdPteMemoryEncryptionAddressOrMask); >>>>> PageDirectory1GEntry->Bits.ReadWrite =3D 1; >>>>> PageDirectory1GEntry->Bits.Present =3D 1; >>>>> PageDirectory1GEntry->Bits.MustBe1 =3D 1; @@ -280,7=20 >>>>> +282,7 @@ CreateIdentityMappingPageTables ( >>>>> // >>>>> // Fill in a Page Directory Pointer Entries >>>>> // >>>>> - PageDirectoryPointerEntry->Uint64 =3D >>>>> (UINT64)(UINTN)PageDirectoryEntry; >>>>> + PageDirectoryPointerEntry->Uint64 =3D=20 >>>>> + (UINT64)(UINTN)PageDirectoryEntry | PcdGet64=20 >>>>> + (PcdPteMemoryEncryptionAddressOrMask); >>>>> PageDirectoryPointerEntry->Bits.ReadWrite =3D 1; >>>>> PageDirectoryPointerEntry->Bits.Present =3D 1; >>>>> >>>>> @@ -294,7 +296,7 @@ CreateIdentityMappingPageTables ( >>>>> // >>>>> // Fill in the Page Directory entries >>>>> // >>>>> - PageDirectoryEntry->Uint64 =3D (UINT64)PageAddress; >>>>> + PageDirectoryEntry->Uint64 =3D (UINT64)PageAddress | >>>>> + PcdGet64 (PcdPteMemoryEncryptionAddressOrMask); >>>>> PageDirectoryEntry->Bits.ReadWrite =3D 1; >>>>> PageDirectoryEntry->Bits.Present =3D 1; >>>>> PageDirectoryEntry->Bits.MustBe1 =3D 1; diff --git=20 >>>>> a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec=20 >>>>> index 273cd7e..207384f 100644 >>>>> --- a/MdeModulePkg/MdeModulePkg.dec >>>>> +++ b/MdeModulePkg/MdeModulePkg.dec >>>>> @@ -6,6 +6,8 @@ >>>>> # Copyright (c) 2007 - 2017, Intel Corporation. All rights=20 >>>>> reserved.
# Copyright (c) 2016, Linaro Ltd. All rights=20 >>>>> reserved.
# (C) Copyright 2016 Hewlett Packard Enterprise=20 >>>>> Development LP
>>>>> +# Copyright (c) 2017, AMD Incorporated. All rights reserved.
=20 >>>>> +# >>>>> # This program and the accompanying materials are licensed and=20 >>>>> made available under # the terms and conditions of the BSD=20 >>>>> License that accompanies this distribution. >>>>> # The full text of the license may be found at @@ -1738,5=20 >>>>> +1740,11 @@ [PcdsDynamic, PcdsDynamicEx] >>>>> # @Prompt If there is any test key used by the platform. >>>>> >>>>> gEfiMdeModulePkgTokenSpaceGuid.PcdTestKeyUsed|FALSE|BOOLEAN|0x0 >>>>> 0030003 >>>>> >>>>> + ## This dynamic PCD holds the address mask for page table=20 >>>>> + entries when memory encryption is # enabled on AMD processors=20 >>>>> + supporting the >>>>> Secure Encrypted Virtualization (SEV) feature. >>>>> + # This mask should be applied when creating 1:1 virtual to=20 >>>>> + physical >>>>> mapping tables. >>>>> + # >>>>> + >>>>> + >>>>> gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrM >>>>> ask|0x0 >>>>> + |UINT64|0x00030004 >>>>> + >>>>> [UserExtensions.TianoCore."ExtraFiles"] >>>>> MdeModulePkgExtra.uni >>>>> -- >>>>> 1.9.1 >>>>> >>>>> _______________________________________________ >>>>> edk2-devel mailing list >>>>> edk2-devel@lists.01.org> >>> > >>> >>>>> https://lists.01.org/mailman/listinfo/edk2-devel >>>> >>> _______________________________________________ >>> edk2-devel mailing list >>> edk2-devel@lists.01.org >> >>> https://lists.01.org/mailman/listinfo/edk2-devel >>> >> >=20